|
|
|
|
|
|
|
|
#define KINETIS_I2C3 (*(KINETIS_I2C_t *)0x400E7000) |
|
|
#define KINETIS_I2C3 (*(KINETIS_I2C_t *)0x400E7000) |
|
|
#define I2C0_A1 (KINETIS_I2C0.A1) // I2C Address Register 1 |
|
|
#define I2C0_A1 (KINETIS_I2C0.A1) // I2C Address Register 1 |
|
|
#define I2C0_F (KINETIS_I2C0.F) // I2C Frequency Divider register |
|
|
#define I2C0_F (KINETIS_I2C0.F) // I2C Frequency Divider register |
|
|
|
|
|
#define I2C_F_DIV20 ((uint8_t)0x00) |
|
|
|
|
|
#define I2C_F_DIV22 ((uint8_t)0x01) |
|
|
|
|
|
#define I2C_F_DIV24 ((uint8_t)0x02) |
|
|
|
|
|
#define I2C_F_DIV26 ((uint8_t)0x03) |
|
|
|
|
|
#define I2C_F_DIV28 ((uint8_t)0x04) |
|
|
|
|
|
#define I2C_F_DIV30 ((uint8_t)0x05) |
|
|
|
|
|
#define I2C_F_DIV32 ((uint8_t)0x09) |
|
|
|
|
|
#define I2C_F_DIV34 ((uint8_t)0x06) |
|
|
|
|
|
#define I2C_F_DIV36 ((uint8_t)0x0A) |
|
|
|
|
|
#define I2C_F_DIV40 ((uint8_t)0x07) |
|
|
|
|
|
#define I2C_F_DIV44 ((uint8_t)0x0C) |
|
|
|
|
|
#define I2C_F_DIV48 ((uint8_t)0x0D) |
|
|
|
|
|
#define I2C_F_DIV56 ((uint8_t)0x0E) |
|
|
|
|
|
#define I2C_F_DIV64 ((uint8_t)0x12) |
|
|
|
|
|
#define I2C_F_DIV68 ((uint8_t)0x0F) |
|
|
|
|
|
#define I2C_F_DIV72 ((uint8_t)0x13) |
|
|
|
|
|
#define I2C_F_DIV80 ((uint8_t)0x14) |
|
|
|
|
|
#define I2C_F_DIV88 ((uint8_t)0x15) |
|
|
|
|
|
#define I2C_F_DIV96 ((uint8_t)0x19) |
|
|
|
|
|
#define I2C_F_DIV104 ((uint8_t)0x16) |
|
|
|
|
|
#define I2C_F_DIV112 ((uint8_t)0x1A) |
|
|
|
|
|
#define I2C_F_DIV128 ((uint8_t)0x17) |
|
|
|
|
|
#define I2C_F_DIV144 ((uint8_t)0x1C) |
|
|
|
|
|
#define I2C_F_DIV160 ((uint8_t)0x1D) |
|
|
|
|
|
#define I2C_F_DIV192 ((uint8_t)0x1E) |
|
|
|
|
|
#define I2C_F_DIV224 ((uint8_t)0x22) |
|
|
|
|
|
#define I2C_F_DIV240 ((uint8_t)0x1F) |
|
|
|
|
|
#define I2C_F_DIV256 ((uint8_t)0x23) |
|
|
|
|
|
#define I2C_F_DIV288 ((uint8_t)0x24) |
|
|
|
|
|
#define I2C_F_DIV320 ((uint8_t)0x25) |
|
|
|
|
|
#define I2C_F_DIV384 ((uint8_t)0x26) |
|
|
|
|
|
#define I2C_F_DIV480 ((uint8_t)0x27) |
|
|
|
|
|
#define I2C_F_DIV448 ((uint8_t)0x2A) |
|
|
|
|
|
#define I2C_F_DIV512 ((uint8_t)0x2B) |
|
|
|
|
|
#define I2C_F_DIV576 ((uint8_t)0x2C) |
|
|
|
|
|
#define I2C_F_DIV640 ((uint8_t)0x2D) |
|
|
|
|
|
#define I2C_F_DIV768 ((uint8_t)0x2E) |
|
|
|
|
|
#define I2C_F_DIV896 ((uint8_t)0x32) |
|
|
|
|
|
#define I2C_F_DIV960 ((uint8_t)0x2F) |
|
|
|
|
|
#define I2C_F_DIV1024 ((uint8_t)0x33) |
|
|
|
|
|
#define I2C_F_DIV1152 ((uint8_t)0x34) |
|
|
|
|
|
#define I2C_F_DIV1280 ((uint8_t)0x35) |
|
|
|
|
|
#define I2C_F_DIV1536 ((uint8_t)0x36) |
|
|
|
|
|
#define I2C_F_DIV1920 ((uint8_t)0x37) |
|
|
|
|
|
#define I2C_F_DIV1792 ((uint8_t)0x3A) |
|
|
|
|
|
#define I2C_F_DIV2048 ((uint8_t)0x3B) |
|
|
|
|
|
#define I2C_F_DIV2304 ((uint8_t)0x3C) |
|
|
|
|
|
#define I2C_F_DIV2560 ((uint8_t)0x3D) |
|
|
|
|
|
#define I2C_F_DIV3072 ((uint8_t)0x3E) |
|
|
|
|
|
#define I2C_F_DIV3840 ((uint8_t)0x3F) |
|
|
|
|
|
//#define I2C_F_DIV28 ((uint8_t)0x08) |
|
|
|
|
|
//#define I2C_F_DIV40 ((uint8_t)0x0B) |
|
|
|
|
|
//#define I2C_F_DIV48 ((uint8_t)0x10) |
|
|
|
|
|
//#define I2C_F_DIV56 ((uint8_t)0x11) |
|
|
|
|
|
//#define I2C_F_DIV80 ((uint8_t)0x18) |
|
|
|
|
|
//#define I2C_F_DIV128 ((uint8_t)0x1B) |
|
|
|
|
|
//#define I2C_F_DIV160 ((uint8_t)0x20) |
|
|
|
|
|
//#define I2C_F_DIV192 ((uint8_t)0x21) |
|
|
|
|
|
//#define I2C_F_DIV320 ((uint8_t)0x28) |
|
|
|
|
|
//#define I2C_F_DIV384 ((uint8_t)0x29) |
|
|
|
|
|
//#define I2C_F_DIV640 ((uint8_t)0x30) |
|
|
|
|
|
//#define I2C_F_DIV768 ((uint8_t)0x31) |
|
|
|
|
|
//#define I2C_F_DIV1280 ((uint8_t)0x38) |
|
|
|
|
|
//#define I2C_F_DIV1536 ((uint8_t)0x39) |
|
|
#define I2C0_C1 (KINETIS_I2C0.C1) // I2C Control Register 1 |
|
|
#define I2C0_C1 (KINETIS_I2C0.C1) // I2C Control Register 1 |
|
|
#define I2C_C1_IICEN ((uint8_t)0x80) // I2C Enable |
|
|
#define I2C_C1_IICEN ((uint8_t)0x80) // I2C Enable |
|
|
#define I2C_C1_IICIE ((uint8_t)0x40) // I2C Interrupt Enable |
|
|
#define I2C_C1_IICIE ((uint8_t)0x40) // I2C Interrupt Enable |