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teensy-core-4.1
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teensy4-core
Kurt Eckhardt 8 years ago
parent
db1e687b18
commit
eef956bb2d
2 changed files with 17 additions and 17 deletions
Unified View Show Diff Stats
  1. +9
    -9
      teensy3/serial2.c
  2. +8
    -8
      teensy3/serial4.c

+ 9
- 9
teensy3/serial2.c View File

switch (rx_pin_num) { switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
} }
switch (tx_pin_num) { switch (tx_pin_num) {
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 58: CORE_PIN58_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 58: CORE_PIN58_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1 case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 59: CORE_PIN59_CONFIG = 0; break; case 59: CORE_PIN59_CONFIG = 0; break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0 case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 58: CORE_PIN58_CONFIG = 0; break; case 58: CORE_PIN58_CONFIG = 0; break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0 case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 58: CORE_PIN58_CONFIG = 0; break; case 58: CORE_PIN58_CONFIG = 0; break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break;
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 58: CORE_PIN58_CONFIG = cfg | PORT_PCR_MUX(3); break; case 58: CORE_PIN58_CONFIG = cfg | PORT_PCR_MUX(3); break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 26: CORE_PIN26_CONFIG = 0; break; // PTE1 case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 59: CORE_PIN59_CONFIG = 0; break; case 59: CORE_PIN59_CONFIG = 0; break;
#endif #endif
} }
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6 #if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
} }
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
if (pin == 23) { if (pin == 23) {
CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
} else if (pin == 60) { } else if (pin == 60) {
CORE_PIN60_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown CORE_PIN60_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
#endif #endif

+ 8
- 8
teensy3/serial4.c View File

transmitting = 0; transmitting = 0;
switch (rx_pin_num) { switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
} }
switch (tx_pin_num) { switch (tx_pin_num) {
case 32: CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 32: CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 62: CORE_PIN62_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 62: CORE_PIN62_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#endif #endif
} }
CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
switch (rx_pin_num) { switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3 case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 63: CORE_PIN63_CONFIG = 0; break; case 63: CORE_PIN63_CONFIG = 0; break;
#endif #endif
} }
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 32: CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4 case 32: CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 62: CORE_PIN62_CONFIG = 0; break; case 62: CORE_PIN62_CONFIG = 0; break;
#endif #endif
} }
if ((SIM_SCGC4 & SIM_SCGC4_UART3)) { if ((SIM_SCGC4 & SIM_SCGC4_UART3)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 32: CORE_PIN32_CONFIG = 0; break; // PTB11 case 32: CORE_PIN32_CONFIG = 0; break; // PTB11
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 62: CORE_PIN62_CONFIG = 0; break; case 62: CORE_PIN62_CONFIG = 0; break;
#endif #endif
} }
} }
switch (pin & 127) { switch (pin & 127) {
case 32: CORE_PIN32_CONFIG = cfg | PORT_PCR_MUX(3); break; case 32: CORE_PIN32_CONFIG = cfg | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 62: CORE_PIN62_CONFIG = cfg | PORT_PCR_MUX(3);; break; case 62: CORE_PIN62_CONFIG = cfg | PORT_PCR_MUX(3);; break;
#endif #endif
} }
if ((SIM_SCGC4 & SIM_SCGC4_UART3)) { if ((SIM_SCGC4 & SIM_SCGC4_UART3)) {
switch (rx_pin_num) { switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = 0; break; // PTC3 case 31: CORE_PIN31_CONFIG = 0; break; // PTC3
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 63: CORE_PIN63_CONFIG = 0; break; case 63: CORE_PIN63_CONFIG = 0; break;
#endif #endif
} }
switch (pin) { switch (pin) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.4 or T3.5
#if defined USE_SDCARD_PINS && (defined(__MK64FX512__) || defined(__MK66FX1M0__)) // on T3.5 or T3.6
case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
} }

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