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teensy-core-4.1
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8 Commits (3d439aa1d977245488027e717e0faffe958ceff2)

Author SHA1 Message Date
  PaulStoffregen 9c1e41e70e Change room() to writeBufferFree() 10 years ago
  PaulStoffregen 71160e91c2 Add Serial.room() 10 years ago
  PaulStoffregen d783be33c1 Clean up trailing whitespace 10 years ago
  PaulStoffregen 7bee55654c Support more CPU and bus frequencies 10 years ago
  Frank Bösing 6942a12ff4 Stripped to overclock add. 144MHz only for Paul 10 years ago
  Frank Bösing bbd726f690 Update to 168MHz, 42 MHZ Bus, 28MHz Flash 10 years ago
  Frank Bösing 856a79b321 Modified for additional 120MHz Core-Clock 10 years ago
  PaulStoffregen 5cecdee933 Initial commit, version 1.17-rc1 11 years ago