duff2013
70e53f0986
Teensy 3.5 does not have 32ch llwu ( #204 )
8 lat temu
PaulStoffregen
f9813d201b
Rewrite IntervalTimer
8 lat temu
Alexander Shtuchkin
c7c0ce05aa
Fix compile warnings related to kinetis_hsrun_enable
8 lat temu
PaulStoffregen
809482c72e
Only implement HSRUN changes when F_CPU > 120 MHz
8 lat temu
PaulStoffregen
27fa2e2a52
Use USB clock recovery when running USB from IRC48M oscillator
8 lat temu
PaulStoffregen
1bdf4faa90
Add HSRUN functions
8 lat temu
PaulStoffregen
b04b9f6689
Add HAS_KINETIS_SDHC for Teensy 3.5 & 3.6
8 lat temu
concreteboot
1ec34883ca
nbytes transfer count when minor loop enabled is 10 bits not 5
8 lat temu
Kurt Eckhardt
310f359860
Wrong DMAMUX Source for SPI0_TX
8 lat temu
Kurt Eckhardt
426a53c281
Fix Serial6 for Teensy 3.5
Needed to add new Define for clock gate
Plus defines to use the new clock gate, plus correct case name for the
serial6 isr to match what is in system isr table
8 lat temu
PaulStoffregen
0ed6ba9a96
Fix USB serial number on K64 & K66
8 lat temu
PaulStoffregen
ce27c4c50b
Add misc SDHC register bitfield defs
8 lat temu
Kurt Eckhardt
899cbecc02
Enable Uart 2 stop bit capabilities
The T-LC and the new beta boards T3.6 and soon T3.5 hardware uarts have
ability to turn on 2 stop bits. So enabled on these boards.
8 lat temu
Kurt Eckhardt
7352ea7791
Add Serial6 - T3.4 Uart5, T3.5 LPUart0
This is a WIP, But I have now been able to create Serial6 on T3.4 beta,
and so far have tested Send/Receive basic stuff at 115200 and have tried
at several CPU speeds in MHZ (192, 216, 180, 120, 96)
8 lat temu
duff2013
c5c14007bb
trigger mode enable cmp register def
8 lat temu
Frank
61dce339b0
fix SDHC_XFERTYP_RSPTYP
8 lat temu
PaulStoffregen
31c9626281
Fix some USBHS register bit names
8 lat temu
duff2013
484098c794
update LLWU reg.
8 lat temu
PaulStoffregen
9f1f15a53e
Add SDHC register bit defs
8 lat temu
PaulStoffregen
0e35a31068
Add ethernet register bit defs
8 lat temu
PaulStoffregen
fdf57f66c6
Add USBHS register bit defs
8 lat temu
Kurt Eckhardt
1c2f6dca35
Optional: Add SPI2...
Just in case the extra pads are added to bottom of 3.4/3.5 board,
define is in place...
8 lat temu
Kurt Eckhardt
305fb4da93
SPI1 on T3.4/3.5 - Add SPCR1
8 lat temu
Kurt Eckhardt
91f8f30c04
Add SPI1 to kinetis.h for T3.4 and T3.5
Added define for SPI1 registers
8 lat temu
PaulStoffregen
d79723c252
Easier F_BUS overclocking
8 lat temu
PaulStoffregen
be42e0574e
Fix DMA on K66
8 lat temu
PaulStoffregen
e2e07e5394
Fix DMAMUX for K66
8 lat temu
PaulStoffregen
ddb7fb0267
Add I2C clock divider names
8 lat temu
PaulStoffregen
759ba1b417
Fix touchRead on K66
8 lat temu
PaulStoffregen
7a2c0037b8
Use IRC48M clock for USB when F_CPU is 180 or 216 MHz
8 lat temu
PaulStoffregen
6856d4eedc
Fix analogRead on K66
8 lat temu
PaulStoffregen
7c963d5269
Use SIM_SCGC6 for RNG to match register defs
8 lat temu
PaulStoffregen
6040145aac
More K66 overclocking options
8 lat temu
PaulStoffregen
663d7eaa7b
Fix Random Number Generator registers (thanks manitou)
fixes 136
8 lat temu
duff2013
524efc02b4
add compare and llwu register defs
8 lat temu
PaulStoffregen
adca415331
Add AudioInputUSB - receive USB audio into audio library
8 lat temu
duff2013
e16a2e99eb
Update CMP register definitions
9 lat temu
duff2013
ba2057383c
Get enabled NVIC ISR's
9 lat temu
PaulStoffregen
e0dd146824
More defs
9 lat temu
PaulStoffregen
d54debdb91
Add more register defs & PLL config
9 lat temu
PaulStoffregen
70a24272aa
Fix DMA_TCD_NBYTES_MLOFFNO_NBYTES
9 lat temu
duff2013
abc81a9670
Add SCB_SCR register definitions
9 lat temu
PaulStoffregen
7e46ee291b
Add 2 channel enable flags for I2S
9 lat temu
PaulStoffregen
aa212b61e0
Defs for MK66FX1M0
9 lat temu
Frank
628addbd49
See Reference Manual Page 1350
50.6.2 SCAN Control register
Bug found by Chronologist, https://forum.pjrc.com/threads/29624-Using-TSI-for-capacitance-measurement
9 lat temu
PaulStoffregen
7dd78d023a
Reduce flash clock in 168 MHz overclock mode
9 lat temu
PaulStoffregen
f2948bd195
Add UART register bit definitions
9 lat temu
PaulStoffregen
05fa587cc4
Add more register defs
9 lat temu
PaulStoffregen
1e49af2dd2
Add register definitions
9 lat temu
PaulStoffregen
0bdac50dcb
Add PDB channel 1 register definitions
https://forum.pjrc.com/threads/25153-PDB0CH1-register-definitions
9 lat temu