teensy-core-4.1

Commit graph

Autor	SHA1	Nachricht	Datum
PaulStoffregen	aee29bc892	Fix compiler warnings	vor 6 Jahren
Frank	2a8b5d066e	rmv warning "implicit declaration of function 'delay'"	vor 6 Jahren
PaulStoffregen	a1ff3e9256	Fix USB serial issues printing before device ready	vor 6 Jahren
PaulStoffregen	7153086e77	Don't disturb pin 13 (leftover debugging code)	vor 6 Jahren
PaulStoffregen	addd88d076	basic usb serial on imxrt	vor 6 Jahren
PaulStoffregen	e687673ddf	First commit, Teensy4 work-in-progress	vor 6 Jahren
Frank Bösing	11bd76352d	FCPU 256MHz	vor 6 Jahren
PaulStoffregen	7099935c0e	Update open source license info	vor 7 Jahren
Frank	9febfa653b	Fix: write returns zero (#202 ) https://forum.pjrc.com/threads/40893-Incorrect-return-for-Serial-write()-on-Teensy-3-6?p=127732#post127732 I'm not sure if this fix has some side-effects - how will other functions react when it does not return zero anymore ?	vor 8 Jahren
PaulStoffregen	6040145aac	More K66 overclocking options	vor 8 Jahren
PaulStoffregen	c364608480	Even more defs	vor 9 Jahren
PaulStoffregen	1225f43fd0	Report Serial bool operator true only after 25 ms Sometimes the PC or Mac drivers are not actually ready to begin receiving data immediately after they cause DTR or RTS to assert. This delay allows the PC to become ready before we tell sketches the Serial device is true (ready).	vor 9 Jahren
PaulStoffregen	caa5312fbc	Opps, fix compile for slow speeds	vor 10 Jahren
PaulStoffregen	8bdc442fdf	Add TODO comment in USB Serial	vor 10 Jahren
PaulStoffregen	9c1e41e70e	Change room() to writeBufferFree() https://groups.google.com/a/arduino.cc/d/msg/developers/ls3hkviFYM4/XWT2LbfzNcgJ	vor 10 Jahren
PaulStoffregen	71160e91c2	Add Serial.room()	vor 10 Jahren
PaulStoffregen	d783be33c1	Clean up trailing whitespace	vor 10 Jahren
PaulStoffregen	7bee55654c	Support more CPU and bus frequencies	vor 10 Jahren
Frank Bösing	6942a12ff4	Stripped to overclock add. 144MHz only for Paul	vor 10 Jahren
Frank Bösing	bbd726f690	Update to 168MHz, 42 MHZ Bus, 28MHz Flash	vor 10 Jahren
Frank Bösing	856a79b321	Modified for additional 120MHz Core-Clock	vor 10 Jahren
PaulStoffregen	5cecdee933	Initial commit, version 1.17-rc1	vor 11 Jahren

6 Commits (a5aa846df7650be67539a64614f943bf4c3a7476)