4 Commit (af96d7af1e4bdc27ef1e3dbd83bb6d13b3fd2d2c)

Autore SHA1 Messaggio Data
  PaulStoffregen 7bee55654c Support more CPU and bus frequencies 10 anni fa
  Frank Bösing fdcaeb932e Stripped to 144MHz only for Paul 10 anni fa
  Frank Bösing bbd726f690 Update to 168MHz, 42 MHZ Bus, 28MHz Flash 10 anni fa
  Frank Bösing 856a79b321 Modified for additional 120MHz Core-Clock 10 anni fa
  PaulStoffregen a781e92f77 Fix analogRead(39) (Vref) on Teensy 3.1 11 anni fa
  PaulStoffregen 729c211500 Support for Teensy 3.1 11 anni fa
  PaulStoffregen 5cecdee933 Initial commit, version 1.17-rc1 11 anni fa