Teensy 4.1 core updated for C++20
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  1. #include "imxrt.h"
  2. #include "core_pins.h"
  3. #include "debug/printf.h"
  4. struct pwm_pin_info_struct {
  5. uint8_t type; // 0=no pwm, 1=flexpwm, 2=quad
  6. uint8_t module; // 0-3, 0-3
  7. uint8_t channel; // 0=X, 1=A, 2=B
  8. uint8_t muxval; //
  9. };
  10. uint8_t analog_write_res = 8;
  11. #define M(a, b) ((((a) - 1) << 4) | (b))
  12. const struct pwm_pin_info_struct pwm_pin_info[] = {
  13. {1, M(1, 1), 0, 4}, // FlexPWM1_1_X 0 // AD_B0_03
  14. {1, M(1, 0), 0, 4}, // FlexPWM1_0_X 1 // AD_B0_02
  15. {1, M(4, 2), 1, 1}, // FlexPWM4_2_A 2 // EMC_04
  16. {1, M(4, 2), 2, 1}, // FlexPWM4_2_B 3 // EMC_05
  17. {1, M(2, 0), 1, 1}, // FlexPWM2_0_A 4 // EMC_06
  18. {1, M(2, 0), 2, 1}, // FlexPWM2_0_B 5 // EMC_07
  19. {1, M(1, 3), 2, 6}, // FlexPWM1_3_B 6 // B1_01
  20. {1, M(1, 3), 1, 6}, // FlexPWM1_3_A 7 // B1_00
  21. {1, M(2, 2), 1, 2}, // FlexPWM2_2_A 8 // B0_10
  22. {1, M(2, 2), 2, 2}, // FlexPWM2_2_B 9 // B0_11
  23. {2, M(1, 0), 0, 1}, // QuadTimer1_0 10 // B0_00
  24. {2, M(1, 2), 0, 1}, // QuadTimer1_2 11 // B0_02
  25. {2, M(1, 1), 0, 1}, // QuadTimer1_1 12 // B0_01
  26. {2, M(2, 0), 0, 1}, // QuadTimer2_0 13 // B0_03
  27. {2, M(3, 2), 0, 1}, // QuadTimer3_2 14 // AD_B1_02
  28. {2, M(3, 3), 0, 1}, // QuadTimer3_3 15 // AD_B1_03
  29. {0, M(1, 0), 0, 0},
  30. {0, M(1, 0), 0, 0},
  31. {2, M(3, 1), 0, 1}, // QuadTimer3_1 18 // AD_B1_01
  32. {2, M(3, 0), 0, 1}, // QuadTimer3_0 19 // AD_B1_00
  33. {0, M(1, 0), 0, 0},
  34. {0, M(1, 0), 0, 0},
  35. {1, M(4, 0), 1, 1}, // FlexPWM4_0_A 22 // AD_B1_08
  36. {1, M(4, 1), 1, 1}, // FlexPWM4_1_A 23 // AD_B1_09
  37. {1, M(1, 2), 0, 4}, // FlexPWM1_2_X 24 // AD_B0_12
  38. {1, M(1, 3), 0, 4}, // FlexPWM1_3_X 25 // AD_B0_13
  39. {0, M(1, 0), 0, 0},
  40. {0, M(1, 0), 0, 0},
  41. {1, M(3, 1), 2, 1}, // FlexPWM3_1_B 28 // EMC_32
  42. {1, M(3, 1), 1, 1}, // FlexPWM3_1_A 29 // EMC_31
  43. {1, M(1, 0), 2, 1}, // FlexPWM1_0_B 30 // EMC_24
  44. {1, M(1, 0), 1, 1}, // FlexPWM1_0_A 31 // EMC_23
  45. {0, M(1, 0), 0, 0},
  46. {1, M(2, 1), 1, 1}, // FlexPWM2_1_A 33 // EMC_08
  47. };
  48. void flexpwmWrite(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, uint16_t val)
  49. {
  50. uint16_t mask = 1 << submodule;
  51. uint32_t modulo = p->SM[submodule].VAL1;
  52. uint32_t cval = ((uint32_t)val * (modulo + 1)) >> analog_write_res;
  53. if (cval > modulo) cval = modulo; // TODO: is this check correct?
  54. //printf("flexpwmWrite, p=%08lX, sm=%d, ch=%c, cval=%ld\n",
  55. //(uint32_t)p, submodule, channel == 0 ? 'X' : (channel == 1 ? 'A' : 'B'), cval);
  56. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);
  57. switch (channel) {
  58. case 0: // X
  59. p->SM[submodule].VAL0 = modulo - cval;
  60. p->OUTEN |= FLEXPWM_OUTEN_PWMX_EN(mask);
  61. //printf(" write channel X\n");
  62. break;
  63. case 1: // A
  64. p->SM[submodule].VAL3 = cval;
  65. p->OUTEN |= FLEXPWM_OUTEN_PWMA_EN(mask);
  66. //printf(" write channel A\n");
  67. break;
  68. case 2: // B
  69. p->SM[submodule].VAL5 = cval;
  70. p->OUTEN |= FLEXPWM_OUTEN_PWMB_EN(mask);
  71. //printf(" write channel B\n");
  72. }
  73. p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);
  74. }
  75. void flexpwmFrequency(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, float frequency)
  76. {
  77. uint16_t mask = 1 << submodule;
  78. uint32_t olddiv = p->SM[submodule].VAL1;
  79. uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5);
  80. uint32_t prescale = 0;
  81. //printf(" div=%lu\n", newdiv);
  82. while (newdiv > 65535 && prescale < 7) {
  83. newdiv = newdiv >> 1;
  84. prescale = prescale + 1;
  85. }
  86. if (newdiv > 65535) {
  87. newdiv = 65535;
  88. } else if (newdiv < 2) {
  89. newdiv = 2;
  90. }
  91. //printf(" div=%lu, scale=%lu\n", newdiv, prescale);
  92. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);
  93. p->SM[submodule].CTRL = FLEXPWM_SMCTRL_FULL | FLEXPWM_SMCTRL_PRSC(prescale);
  94. p->SM[submodule].VAL1 = newdiv - 1;
  95. p->SM[submodule].VAL0 = (p->SM[submodule].VAL0 * newdiv) / olddiv;
  96. p->SM[submodule].VAL3 = (p->SM[submodule].VAL3 * newdiv) / olddiv;
  97. p->SM[submodule].VAL5 = (p->SM[submodule].VAL5 * newdiv) / olddiv;
  98. p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);
  99. }
  100. void quadtimerWrite(IMXRT_TMR_t *p, unsigned int submodule, uint16_t val)
  101. {
  102. uint32_t modulo = 65537 - p->CH[submodule].LOAD + p->CH[submodule].CMPLD1;
  103. uint32_t high = ((uint32_t)val * (modulo - 1)) >> analog_write_res;
  104. if (high >= modulo) high = modulo - 1; // TODO: is this check correct?
  105. //printf(" modulo=%lu\n", modulo);
  106. //printf(" high=%lu\n", high);
  107. uint32_t low = modulo - high; // TODO: low must never be 0 or 1 - can it be??
  108. //printf(" low=%lu\n", low);
  109. p->CH[submodule].LOAD = 65537 - low;
  110. p->CH[submodule].CMPLD1 = high;
  111. }
  112. void quadtimerFrequency(IMXRT_TMR_t *p, unsigned int submodule, float frequency)
  113. {
  114. uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5);
  115. uint32_t prescale = 0;
  116. //printf(" div=%lu\n", newdiv);
  117. while (newdiv > 65534 && prescale < 7) {
  118. newdiv = newdiv >> 1;
  119. prescale = prescale + 1;
  120. }
  121. if (newdiv > 65534) {
  122. newdiv = 65534;
  123. } else if (newdiv < 2) {
  124. newdiv = 2;
  125. }
  126. //printf(" div=%lu, scale=%lu\n", newdiv, prescale);
  127. uint32_t oldhigh = p->CH[submodule].CMPLD1;
  128. uint32_t oldlow = 65537 - p->CH[submodule].LOAD;
  129. uint32_t high = (oldhigh * newdiv) / (oldhigh + oldlow);
  130. // TODO: low must never be less than 2 - can it happen with this?
  131. uint32_t low = newdiv - high;
  132. //printf(" high=%lu, low=%lu\n", high, low);
  133. p->CH[submodule].LOAD = 65537 - low;
  134. p->CH[submodule].CMPLD1 = high;
  135. p->CH[submodule].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8 + prescale) |
  136. TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);
  137. }
  138. void analogWrite(uint8_t pin, int val)
  139. {
  140. const struct pwm_pin_info_struct *info;
  141. if (pin >= CORE_NUM_DIGITAL) return;
  142. //printf("analogWrite, pin %d, val %d\n", pin, val);
  143. info = pwm_pin_info + pin;
  144. if (info->type == 1) {
  145. // FlexPWM pin
  146. IMXRT_FLEXPWM_t *flexpwm;
  147. switch ((info->module >> 4) & 3) {
  148. case 0: flexpwm = &IMXRT_FLEXPWM1; break;
  149. case 1: flexpwm = &IMXRT_FLEXPWM2; break;
  150. case 2: flexpwm = &IMXRT_FLEXPWM3; break;
  151. default: flexpwm = &IMXRT_FLEXPWM4;
  152. }
  153. flexpwmWrite(flexpwm, info->module & 0x03, info->channel, val);
  154. } else if (info->type == 2) {
  155. // QuadTimer pin
  156. IMXRT_TMR_t *qtimer;
  157. switch ((info->module >> 4) & 3) {
  158. case 0: qtimer = &IMXRT_TMR1; break;
  159. case 1: qtimer = &IMXRT_TMR2; break;
  160. case 2: qtimer = &IMXRT_TMR3; break;
  161. default: qtimer = &IMXRT_TMR4;
  162. }
  163. quadtimerWrite(qtimer, info->module & 0x03, val);
  164. } else {
  165. return;
  166. }
  167. *(portConfigRegister(pin)) = info->muxval;
  168. // TODO: pad config register
  169. }
  170. void analogWriteFrequency(uint8_t pin, float frequency)
  171. {
  172. const struct pwm_pin_info_struct *info;
  173. if (pin >= CORE_NUM_DIGITAL) return;
  174. //printf("analogWriteFrequency, pin %d, freq %d\n", pin, (int)frequency);
  175. info = pwm_pin_info + pin;
  176. if (info->type == 1) {
  177. // FlexPWM pin
  178. IMXRT_FLEXPWM_t *flexpwm;
  179. switch ((info->module >> 4) & 3) {
  180. case 0: flexpwm = &IMXRT_FLEXPWM1; break;
  181. case 1: flexpwm = &IMXRT_FLEXPWM2; break;
  182. case 2: flexpwm = &IMXRT_FLEXPWM3; break;
  183. default: flexpwm = &IMXRT_FLEXPWM4;
  184. }
  185. flexpwmFrequency(flexpwm, info->module & 0x03, info->channel, frequency);
  186. } else if (info->type == 2) {
  187. // QuadTimer pin
  188. IMXRT_TMR_t *qtimer;
  189. switch ((info->module >> 4) & 3) {
  190. case 0: qtimer = &IMXRT_TMR1; break;
  191. case 1: qtimer = &IMXRT_TMR2; break;
  192. case 2: qtimer = &IMXRT_TMR3; break;
  193. default: qtimer = &IMXRT_TMR4;
  194. }
  195. quadtimerFrequency(qtimer, info->module & 0x03, frequency);
  196. }
  197. }
  198. void flexpwm_init(IMXRT_FLEXPWM_t *p)
  199. {
  200. int i;
  201. p->FCTRL0 = FLEXPWM_FCTRL0_FLVL(15); // logic high = fault
  202. p->FSTS0 = 0x000F; // clear fault status
  203. p->FFILT0 = 0;
  204. p->MCTRL |= FLEXPWM_MCTRL_CLDOK(15);
  205. for (i=0; i < 4; i++) {
  206. p->SM[i].CTRL2 = FLEXPWM_SMCTRL2_INDEP | FLEXPWM_SMCTRL2_WAITEN
  207. | FLEXPWM_SMCTRL2_DBGEN;
  208. p->SM[i].CTRL = FLEXPWM_SMCTRL_FULL;
  209. p->SM[i].OCTRL = 0;
  210. p->SM[i].DTCNT0 = 0;
  211. p->SM[i].INIT = 0;
  212. p->SM[i].VAL0 = 0;
  213. p->SM[i].VAL1 = 33464;
  214. p->SM[i].VAL2 = 0;
  215. p->SM[i].VAL3 = 0;
  216. p->SM[i].VAL4 = 0;
  217. p->SM[i].VAL5 = 0;
  218. }
  219. p->MCTRL |= FLEXPWM_MCTRL_LDOK(15);
  220. p->MCTRL |= FLEXPWM_MCTRL_RUN(15);
  221. }
  222. void quadtimer_init(IMXRT_TMR_t *p)
  223. {
  224. int i;
  225. for (i=0; i < 4; i++) {
  226. p->CH[i].CTRL = 0; // stop timer
  227. p->CH[i].CNTR = 0;
  228. p->CH[i].SCTRL = TMR_SCTRL_OEN | TMR_SCTRL_OPS | TMR_SCTRL_VAL | TMR_SCTRL_FORCE;
  229. p->CH[i].CSCTRL = TMR_CSCTRL_CL1(1) | TMR_CSCTRL_ALT_LOAD;
  230. // COMP must be less than LOAD - otherwise output is always low
  231. p->CH[i].LOAD = 24000; // low time (65537 - x) -
  232. p->CH[i].COMP1 = 0; // high time (0 = always low, max = LOAD-1)
  233. p->CH[i].CMPLD1 = 0;
  234. p->CH[i].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8) |
  235. TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);
  236. }
  237. }
  238. void pwm_init(void)
  239. {
  240. //printf("pwm init\n");
  241. CCM_CCGR4 |= CCM_CCGR4_PWM1(CCM_CCGR_ON) | CCM_CCGR4_PWM2(CCM_CCGR_ON) |
  242. CCM_CCGR4_PWM3(CCM_CCGR_ON) | CCM_CCGR4_PWM4(CCM_CCGR_ON);
  243. CCM_CCGR6 |= CCM_CCGR6_QTIMER1(CCM_CCGR_ON) | CCM_CCGR6_QTIMER2(CCM_CCGR_ON) |
  244. CCM_CCGR6_QTIMER3(CCM_CCGR_ON) | CCM_CCGR6_QTIMER4(CCM_CCGR_ON);
  245. flexpwm_init(&IMXRT_FLEXPWM1);
  246. flexpwm_init(&IMXRT_FLEXPWM2);
  247. flexpwm_init(&IMXRT_FLEXPWM3);
  248. flexpwm_init(&IMXRT_FLEXPWM4);
  249. quadtimer_init(&IMXRT_TMR1);
  250. quadtimer_init(&IMXRT_TMR2);
  251. quadtimer_init(&IMXRT_TMR3);
  252. }
  253. void xbar_connect(unsigned int input, unsigned int output)
  254. {
  255. if (input >= 88) return;
  256. if (output >= 132) return;
  257. #if 1
  258. volatile uint16_t *xbar = &XBARA1_SEL0 + (output / 2);
  259. uint16_t val = *xbar;
  260. if (!(output & 1)) {
  261. val = (val & 0xFF00) | input;
  262. } else {
  263. val = (val & 0x00FF) | (input << 8);
  264. }
  265. *xbar = val;
  266. #else
  267. // does not work, seems 8 bit access is not allowed
  268. volatile uint8_t *xbar = (volatile uint8_t *)XBARA1_SEL0;
  269. xbar[output] = input;
  270. #endif
  271. }
  272. uint32_t analogWriteRes(uint32_t bits)
  273. {
  274. uint32_t prior;
  275. if (bits < 1) {
  276. bits = 1;
  277. } else if (bits > 16) {
  278. bits = 16;
  279. }
  280. prior = analog_write_res;
  281. analog_write_res = bits;
  282. return prior;
  283. }