Teensy 4.1 core updated for C++20
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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2013 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "mk20dx128.h"
  31. #include "core_pins.h"
  32. #include "HardwareSerial.h"
  33. // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
  34. // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
  35. #ifdef SERIAL_9BIT_SUPPORT
  36. static uint8_t use9Bits = 0;
  37. #define BUFTYPE uint16_t
  38. #else
  39. #define BUFTYPE uint8_t
  40. #define use9Bits 0
  41. #endif
  42. #define TX_BUFFER_SIZE 40
  43. static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE];
  44. static volatile uint8_t transmitting = 0;
  45. #if TX_BUFFER_SIZE > 255
  46. static volatile uint16_t tx_buffer_head = 0;
  47. static volatile uint16_t tx_buffer_tail = 0;
  48. #else
  49. static volatile uint8_t tx_buffer_head = 0;
  50. static volatile uint8_t tx_buffer_tail = 0;
  51. #endif
  52. #define RX_BUFFER_SIZE 64
  53. static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE];
  54. static volatile uint8_t rx_buffer_head = 0;
  55. static volatile uint8_t rx_buffer_tail = 0;
  56. #define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE
  57. #define C2_TX_ACTIVE C2_ENABLE | UART_C2_TIE
  58. #define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
  59. #define C2_TX_INACTIVE C2_ENABLE
  60. void serial2_begin(uint32_t divisor)
  61. {
  62. SIM_SCGC4 |= SIM_SCGC4_UART1; // turn on clock, TODO: use bitband
  63. rx_buffer_head = 0;
  64. rx_buffer_tail = 0;
  65. tx_buffer_head = 0;
  66. tx_buffer_tail = 0;
  67. transmitting = 0;
  68. CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
  69. CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
  70. UART1_BDH = (divisor >> 13) & 0x1F;
  71. UART1_BDL = (divisor >> 5) & 0xFF;
  72. UART1_C4 = divisor & 0x1F;
  73. UART1_C1 = 0;
  74. UART1_PFIFO = 0;
  75. UART1_C2 = C2_TX_INACTIVE;
  76. NVIC_SET_PRIORITY(IRQ_UART1_STATUS, 64);
  77. NVIC_ENABLE_IRQ(IRQ_UART1_STATUS);
  78. }
  79. void serial2_format(uint32_t format)
  80. {
  81. uint8_t c;
  82. c = UART1_C1;
  83. c = (c & ~0x13) | (format & 0x03); // configure parity
  84. if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
  85. UART1_C1 = c;
  86. if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
  87. c = UART1_S2 & ~0x10;
  88. if (format & 0x10) c |= 0x10; // rx invert
  89. UART1_S2 = c;
  90. c = UART1_C3 & ~0x10;
  91. if (format & 0x20) c |= 0x10; // tx invert
  92. UART1_C3 = c;
  93. #ifdef SERIAL_9BIT_SUPPORT
  94. c = UART1_C4 & 0x1F;
  95. if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits)
  96. UART1_C4 = c;
  97. use9Bits = format & 0x80;
  98. #endif
  99. // UART1_C1.0 = parity, 0=even, 1=odd
  100. // UART1_C1.1 = parity, 0=disable, 1=enable
  101. // UART1_C1.4 = mode, 1=9bit, 0=8bit
  102. // UART1_C4.5 = mode, 1=10bit, 0=8bit
  103. // UART1_C3.4 = txinv, 0=normal, 1=inverted
  104. // UART1_S2.4 = rxinv, 0=normal, 1=inverted
  105. }
  106. void serial2_end(void)
  107. {
  108. if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
  109. while (transmitting) yield(); // wait for buffered data to send
  110. NVIC_DISABLE_IRQ(IRQ_UART1_STATUS);
  111. UART1_C2 = 0;
  112. CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  113. CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  114. rx_buffer_head = 0;
  115. rx_buffer_tail = 0;
  116. }
  117. void serial2_putchar(uint32_t c)
  118. {
  119. uint32_t head;
  120. if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
  121. head = tx_buffer_head;
  122. if (++head >= TX_BUFFER_SIZE) head = 0;
  123. while (tx_buffer_tail == head) {
  124. yield(); // wait
  125. }
  126. tx_buffer[head] = c;
  127. transmitting = 1;
  128. tx_buffer_head = head;
  129. UART1_C2 = C2_TX_ACTIVE;
  130. }
  131. void serial2_write(const void *buf, unsigned int count)
  132. {
  133. const uint8_t *p = (const uint8_t *)buf;
  134. while (count-- > 0) serial2_putchar(*p++);
  135. }
  136. void serial2_flush(void)
  137. {
  138. while (transmitting) yield(); // wait
  139. }
  140. int serial2_available(void)
  141. {
  142. uint32_t head, tail;
  143. head = rx_buffer_head;
  144. tail = rx_buffer_tail;
  145. if (head >= tail) return head - tail;
  146. return RX_BUFFER_SIZE + head - tail;
  147. }
  148. int serial2_getchar(void)
  149. {
  150. uint32_t head, tail;
  151. int c;
  152. head = rx_buffer_head;
  153. tail = rx_buffer_tail;
  154. if (head == tail) return -1;
  155. if (++tail >= RX_BUFFER_SIZE) tail = 0;
  156. c = rx_buffer[tail];
  157. rx_buffer_tail = tail;
  158. return c;
  159. }
  160. int serial2_peek(void)
  161. {
  162. uint32_t head, tail;
  163. head = rx_buffer_head;
  164. tail = rx_buffer_tail;
  165. if (head == tail) return -1;
  166. if (++tail >= RX_BUFFER_SIZE) tail = 0;
  167. return rx_buffer[tail];
  168. }
  169. void serial2_clear(void)
  170. {
  171. rx_buffer_head = rx_buffer_tail;
  172. }
  173. // status interrupt combines
  174. // Transmit data below watermark UART_S1_TDRE
  175. // Transmit complete UART_S1_TC
  176. // Idle line UART_S1_IDLE
  177. // Receive data above watermark UART_S1_RDRF
  178. // LIN break detect UART_S2_LBKDIF
  179. // RxD pin active edge UART_S2_RXEDGIF
  180. void uart1_status_isr(void)
  181. {
  182. uint32_t head, tail, n;
  183. uint8_t c;
  184. //digitalWriteFast(4, HIGH);
  185. if (UART1_S1 & UART_S1_RDRF) {
  186. //digitalWriteFast(5, HIGH);
  187. n = UART1_D;
  188. if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
  189. head = rx_buffer_head + 1;
  190. if (head >= RX_BUFFER_SIZE) head = 0;
  191. if (head != rx_buffer_tail) {
  192. rx_buffer[head] = n;
  193. rx_buffer_head = head;
  194. }
  195. //digitalWriteFast(5, LOW);
  196. }
  197. c = UART1_C2;
  198. if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) {
  199. //digitalWriteFast(5, HIGH);
  200. head = tx_buffer_head;
  201. tail = tx_buffer_tail;
  202. if (head == tail) {
  203. UART1_C2 = C2_TX_COMPLETING;
  204. } else {
  205. if (++tail >= TX_BUFFER_SIZE) tail = 0;
  206. n = tx_buffer[tail];
  207. if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
  208. UART1_D = n;
  209. tx_buffer_tail = tail;
  210. }
  211. //digitalWriteFast(5, LOW);
  212. }
  213. if ((c & UART_C2_TCIE) && (UART1_S1 & UART_S1_TC)) {
  214. transmitting = 0;
  215. UART1_C2 = C2_TX_INACTIVE;
  216. }
  217. //digitalWriteFast(4, LOW);
  218. }