Teensy 4.1 core updated for C++20
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  1. #include "imxrt.h"
  2. #include "core_pins.h"
  3. #include "debug/printf.h"
  4. static uint8_t calibrating;
  5. static uint8_t analog_config_bits = 10;
  6. static uint8_t analog_num_average = 4;
  7. const uint8_t pin_to_channel[] = { // pg 482
  8. 7, // 0/A0 AD_B1_02
  9. 8, // 1/A1 AD_B1_03
  10. 12, // 2/A2 AD_B1_07
  11. 11, // 3/A3 AD_B1_06
  12. 6, // 4/A4 AD_B1_01
  13. 5, // 5/A5 AD_B1_00
  14. 15, // 6/A6 AD_B1_10
  15. 0, // 7/A7 AD_B1_11
  16. 13, // 8/A8 AD_B1_08
  17. 14, // 9/A9 AD_B1_09
  18. 128, // 10
  19. 128, // 11
  20. 128, // 12
  21. 128, // 13
  22. 7, // 14/A0 AD_B1_02
  23. 8, // 15/A1 AD_B1_03
  24. 12, // 16/A2 AD_B1_07
  25. 11, // 17/A3 AD_B1_06
  26. 6, // 18/A4 AD_B1_01
  27. 5, // 19/A5 AD_B1_00
  28. 15, // 20/A6 AD_B1_10
  29. 0, // 21/A7 AD_B1_11
  30. 13, // 22/A8 AD_B1_08
  31. 14, // 23/A9 AD_B1_09
  32. 1, // 24/A10 AD_B0_12
  33. 2 // 25/A11 AD_B0_13
  34. // 26/A12 AD_B1_14 - only on ADC2
  35. // 27/A13 AD_B1_15 - only on ADC2
  36. };
  37. static void wait_for_cal(void)
  38. {
  39. printf("wait_for_cal\n");
  40. while (ADC1_GC & ADC_GC_CAL) ;
  41. // TODO: check CALF, but what do to about CAL failure?
  42. calibrating = 0;
  43. printf("cal complete\n");
  44. }
  45. int analogRead(uint8_t pin)
  46. {
  47. if (pin > sizeof(pin_to_channel)) return 0;
  48. if (calibrating) wait_for_cal();
  49. uint8_t ch = pin_to_channel[pin];
  50. if (ch > 15) return 0;
  51. ADC1_HC0 = ch;
  52. while (!(ADC1_HS & ADC_HS_COCO0)) ; // wait
  53. return ADC1_R0;
  54. }
  55. void analogReference(uint8_t type)
  56. {
  57. }
  58. void analogReadRes(unsigned int bits)
  59. {
  60. }
  61. void analogReadAveraging(unsigned int num)
  62. {
  63. }
  64. #define MAX_ADC_CLOCK 20000000
  65. void analog_init(void)
  66. {
  67. uint32_t mode, avg=0;
  68. printf("analogInit\n");
  69. CCM_CCGR1 |= CCM_CCGR1_ADC1(CCM_CCGR_ON);
  70. if (analog_config_bits == 8) {
  71. // 8 bit conversion (17 clocks) plus 8 clocks for input settling
  72. mode = ADC_CFG_MODE(0) | ADC_CFG_ADSTS(3);
  73. } else if (analog_config_bits == 10) {
  74. // 10 bit conversion (17 clocks) plus 20 clocks for input settling
  75. mode = ADC_CFG_MODE(1) | ADC_CFG_ADSTS(2) | ADC_CFG_ADLSMP;
  76. } else {
  77. // 12 bit conversion (25 clocks) plus 24 clocks for input settling
  78. mode = ADC_CFG_MODE(2) | ADC_CFG_ADSTS(3) | ADC_CFG_ADLSMP;
  79. }
  80. if (analog_num_average >= 4) {
  81. if (analog_num_average >= 32) {
  82. mode |= ADC_CFG_AVGS(3);
  83. } else if (analog_num_average >= 16) {
  84. mode |= ADC_CFG_AVGS(2);
  85. } else if (analog_num_average >= 8) {
  86. mode |= ADC_CFG_AVGS(1);
  87. }
  88. avg = ADC_GC_AVGE;
  89. }
  90. #if 1
  91. mode |= ADC_CFG_ADIV(1) | ADC_CFG_ADICLK(3); // async clock
  92. #else
  93. uint32_t clock = F_BUS;
  94. if (clock > MAX_ADC_CLOCK*8) {
  95. mode |= ADC_CFG_ADIV(3) | ADC_CFG_ADICLK(1); // use IPG/16
  96. } else if (clock > MAX_ADC_CLOCK*4) {
  97. mode |= ADC_CFG_ADIV(2) | ADC_CFG_ADICLK(1); // use IPG/8
  98. } else if (clock > MAX_ADC_CLOCK*2) {
  99. mode |= ADC_CFG_ADIV(1) | ADC_CFG_ADICLK(1); // use IPG/4
  100. } else if (clock > MAX_ADC_CLOCK) {
  101. mode |= ADC_CFG_ADIV(0) | ADC_CFG_ADICLK(1); // use IPG/2
  102. } else {
  103. mode |= ADC_CFG_ADIV(0) | ADC_CFG_ADICLK(0); // use IPG
  104. }
  105. #endif
  106. ADC1_CFG = mode | ADC_HC_AIEN | ADC_CFG_ADHSC;
  107. ADC1_GC = avg | ADC_GC_CAL; // begin cal
  108. calibrating = 1;
  109. }