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Teensy 4.1 core updated for C++20
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teensy-core-4.1/teensy3/mk20dx128.c

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  1. /* Teensyduino Core Library

  2.  * http://www.pjrc.com/teensy/

  3.  * Copyright (c) 2013 PJRC.COM, LLC.

  4.  *

  5.  * Permission is hereby granted, free of charge, to any person obtaining

  6.  * a copy of this software and associated documentation files (the

  7.  * "Software"), to deal in the Software without restriction, including

  8.  * without limitation the rights to use, copy, modify, merge, publish,

  9.  * distribute, sublicense, and/or sell copies of the Software, and to

  10.  * permit persons to whom the Software is furnished to do so, subject to

  11.  * the following conditions:

  12.  *

  13.  * 1. The above copyright notice and this permission notice shall be 

  14.  * included in all copies or substantial portions of the Software.

  15.  *

  16.  * 2. If the Software is incorporated into a build system that allows 

  17.  * selection among a list of target devices, then similar target

  18.  * devices manufactured by PJRC.COM must be included in the list of

  19.  * target devices and selectable in the same manner.

  20.  *

  21.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

  22.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

  23.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

  24.  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS

  25.  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN

  26.  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

  27.  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

  28.  * SOFTWARE.

  29.  */

  30. 

  31. #include "mk20dx128.h"

  32. 

  33. 

  34. extern unsigned long _stext;

  35. extern unsigned long _etext;

  36. extern unsigned long _sdata;

  37. extern unsigned long _edata;

  38. extern unsigned long _sbss;

  39. extern unsigned long _ebss;

  40. extern unsigned long _estack;

  41. //extern void __init_array_start(void);

  42. //extern void __init_array_end(void);

  43. extern int main (void);

  44. void ResetHandler(void);

  45. void _init_Teensyduino_internal_(void);

  46. void __libc_init_array(void);

  47. 

  48. 

  49. void fault_isr(void)

  50. {

  51. 	while (1) {

  52. 		// keep polling some communication while in fault

  53. 		// mode, so we don't completely die.

  54. 		if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr();

  55. 		if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr();

  56. 		if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr();

  57. 		if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr();

  58. 	}

  59. }

  60. 

  61. void unused_isr(void)

  62. {

  63. 	fault_isr();

  64. }

  65. 

  66. extern volatile uint32_t systick_millis_count;

  67. void systick_default_isr(void)

  68. {

  69. 	systick_millis_count++;

  70. }

  71. 

  72. void nmi_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  73. void hard_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  74. void memmanage_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  75. void bus_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  76. void usage_fault_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  77. void svcall_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  78. void debugmonitor_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  79. void pendablesrvreq_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  80. void systick_isr(void)		__attribute__ ((weak, alias("systick_default_isr")));

  81. 

  82. void dma_ch0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  83. void dma_ch1_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  84. void dma_ch2_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  85. void dma_ch3_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  86. void dma_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  87. void flash_cmd_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  88. void flash_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  89. void low_voltage_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  90. void wakeup_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  91. void watchdog_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  92. void i2c0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  93. void spi0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  94. void i2s0_tx_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  95. void i2s0_rx_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  96. void uart0_lon_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  97. void uart0_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  98. void uart0_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  99. void uart1_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  100. void uart1_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  101. void uart2_status_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  102. void uart2_error_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  103. void adc0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  104. void cmp0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  105. void cmp1_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  106. void ftm0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  107. void ftm1_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  108. void cmt_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  109. void rtc_alarm_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  110. void rtc_seconds_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  111. void pit0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  112. void pit1_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  113. void pit2_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  114. void pit3_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  115. void pdb_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  116. void usb_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  117. void usb_charge_isr(void)	__attribute__ ((weak, alias("unused_isr")));

  118. void tsi0_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  119. void mcg_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  120. void lptmr_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  121. void porta_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  122. void portb_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  123. void portc_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  124. void portd_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  125. void porte_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  126. void software_isr(void)		__attribute__ ((weak, alias("unused_isr")));

  127. 

  128. 

  129. // TODO: create AVR-stype ISR() macro, with default linkage to undefined handler

  130. //

  131. __attribute__ ((section(".vectors"), used))

  132. void (* const gVectors[])(void) =

  133. {

  134.         (void (*)(void))((unsigned long)&_estack),	//  0 ARM: Initial Stack Pointer

  135.         ResetHandler,					//  1 ARM: Initial Program Counter

  136. 	nmi_isr,					//  2 ARM: Non-maskable Interrupt (NMI)

  137. 	hard_fault_isr,					//  3 ARM: Hard Fault

  138. 	memmanage_fault_isr,				//  4 ARM: MemManage Fault

  139. 	bus_fault_isr,					//  5 ARM: Bus Fault

  140. 	usage_fault_isr,				//  6 ARM: Usage Fault

  141. 	fault_isr,					//  7 --

  142. 	fault_isr,					//  8 --

  143. 	fault_isr,					//  9 --

  144. 	fault_isr,					// 10 --

  145. 	svcall_isr,					// 11 ARM: Supervisor call (SVCall)

  146. 	debugmonitor_isr,				// 12 ARM: Debug Monitor

  147. 	fault_isr,					// 13 --

  148. 	pendablesrvreq_isr,				// 14 ARM: Pendable req serv(PendableSrvReq)

  149. 	systick_isr,					// 15 ARM: System tick timer (SysTick)

  150. 	dma_ch0_isr,					// 16 DMA channel 0 transfer complete

  151. 	dma_ch1_isr,					// 17 DMA channel 1 transfer complete

  152. 	dma_ch2_isr,					// 18 DMA channel 2 transfer complete

  153. 	dma_ch3_isr,					// 19 DMA channel 3 transfer complete

  154. 	dma_error_isr,					// 20 DMA error interrupt channel

  155. 	unused_isr,					// 21 DMA --

  156. 	flash_cmd_isr,					// 22 Flash Memory Command complete

  157. 	flash_error_isr,				// 23 Flash Read collision

  158. 	low_voltage_isr,				// 24 Low-voltage detect/warning

  159. 	wakeup_isr,					// 25 Low Leakage Wakeup

  160. 	watchdog_isr,					// 26 Both EWM and WDOG interrupt

  161. 	i2c0_isr,					// 27 I2C0

  162. 	spi0_isr,					// 28 SPI0

  163. 	i2s0_tx_isr,					// 29 I2S0 Transmit

  164. 	i2s0_rx_isr,					// 30 I2S0 Receive

  165. 	uart0_lon_isr,					// 31 UART0 CEA709.1-B (LON) status

  166. 	uart0_status_isr,				// 32 UART0 status

  167. 	uart0_error_isr,				// 33 UART0 error

  168. 	uart1_status_isr,				// 34 UART1 status

  169. 	uart1_error_isr,				// 35 UART1 error

  170. 	uart2_status_isr,				// 36 UART2 status

  171. 	uart2_error_isr,				// 37 UART2 error

  172. 	adc0_isr,					// 38 ADC0

  173. 	cmp0_isr,					// 39 CMP0

  174. 	cmp1_isr,					// 40 CMP1

  175. 	ftm0_isr,					// 41 FTM0

  176. 	ftm1_isr,					// 42 FTM1

  177. 	cmt_isr,					// 43 CMT

  178. 	rtc_alarm_isr,					// 44 RTC Alarm interrupt

  179. 	rtc_seconds_isr,				// 45 RTC Seconds interrupt

  180. 	pit0_isr,					// 46 PIT Channel 0

  181. 	pit1_isr,					// 47 PIT Channel 1

  182. 	pit2_isr,					// 48 PIT Channel 2

  183. 	pit3_isr,					// 49 PIT Channel 3

  184. 	pdb_isr,					// 50 PDB Programmable Delay Block

  185. 	usb_isr,					// 51 USB OTG

  186. 	usb_charge_isr,					// 52 USB Charger Detect

  187. 	tsi0_isr,					// 53 TSI0

  188. 	mcg_isr,					// 54 MCG

  189. 	lptmr_isr,					// 55 Low Power Timer

  190. 	porta_isr,					// 56 Pin detect (Port A)

  191. 	portb_isr,					// 57 Pin detect (Port B)

  192. 	portc_isr,					// 58 Pin detect (Port C)

  193. 	portd_isr,					// 59 Pin detect (Port D)

  194. 	porte_isr,					// 60 Pin detect (Port E)

  195. 	software_isr,					// 61 Software interrupt

  196. };

  197. 

  198. //void usb_isr(void)

  199. //{

  200. //}

  201. 

  202. __attribute__ ((section(".flashconfig"), used))

  203. const uint8_t flashconfigbytes[16] = {

  204. 	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,

  205. 	0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF

  206. };

  207. 

  208. 

  209. // Automatically initialize the RTC.  When the build defines the compile

  210. // time, and the user has added a crystal, the RTC will automatically

  211. // begin at the time of the first upload.

  212. #ifndef TIME_T

  213. #define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this)

  214. #endif

  215. extern void rtc_set(unsigned long t);

  216. 

  217. 

  218. 

  219. static void startup_unused_hook(void) {}

  220. void startup_early_hook(void)		__attribute__ ((weak, alias("startup_unused_hook")));

  221. void startup_late_hook(void)		__attribute__ ((weak, alias("startup_unused_hook")));

  222. 

  223. 

  224. __attribute__ ((section(".startup")))

  225. void ResetHandler(void)

  226. {

  227.         uint32_t *src = &_etext;

  228.         uint32_t *dest = &_sdata;

  229. 	unsigned int i;

  230. 

  231. 	WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;

  232. 	WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;

  233. 	WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;

  234. 	startup_early_hook();

  235. 

  236. 	// enable clocks to always-used peripherals

  237. 	SIM_SCGC5 = 0x00043F82;		// clocks active to all GPIO

  238. 	SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;

  239. 	// if the RTC oscillator isn't enabled, get it started early

  240. 	if (!(RTC_CR & RTC_CR_OSCE)) {

  241. 		RTC_SR = 0;

  242. 		RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;

  243. 	}

  244. 

  245. 	// release I/O pins hold, if we woke up from VLLS mode

  246. 	if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;

  247. 

  248. 	// TODO: do this while the PLL is waiting to lock....

  249.         while (dest < &_edata) *dest++ = *src++;

  250.         dest = &_sbss;

  251.         while (dest < &_ebss) *dest++ = 0;

  252. 	SCB_VTOR = 0;	// use vector table in flash

  253. 

  254. 	// default all interrupts to medium priority level

  255. 	for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);

  256. 

  257.         // start in FEI mode

  258.         // enable capacitors for crystal

  259.         OSC0_CR = OSC_SC8P | OSC_SC2P;

  260.         // enable osc, 8-32 MHz range, low power mode

  261.         MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;

  262.         // switch to crystal as clock source, FLL input = 16 MHz / 512

  263.         MCG_C1 =  MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);

  264.         // wait for crystal oscillator to begin

  265.         while ((MCG_S & MCG_S_OSCINIT0) == 0) ;

  266.         // wait for FLL to use oscillator

  267.         while ((MCG_S & MCG_S_IREFST) != 0) ;

  268.         // wait for MCGOUT to use oscillator

  269.         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;

  270.         // now we're in FBE mode

  271.         // config PLL input for 16 MHz Crystal / 4 = 4 MHz

  272.         MCG_C5 = MCG_C5_PRDIV0(3);

  273.         // config PLL for 96 MHz output

  274.         MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);

  275.         // wait for PLL to start using xtal as its input

  276.         while (!(MCG_S & MCG_S_PLLST)) ;

  277.         // wait for PLL to lock

  278.         while (!(MCG_S & MCG_S_LOCK0)) ;

  279.         // now we're in PBE mode

  280. #if F_CPU == 96000000

  281.         // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash

  282.         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);

  283. #elif F_CPU == 48000000

  284.         // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash

  285.         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) |  SIM_CLKDIV1_OUTDIV4(3);

  286. #elif F_CPU == 24000000

  287.         // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash

  288.         SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) |  SIM_CLKDIV1_OUTDIV4(3);

  289. #else

  290. #error "Error, F_CPU must be 96000000, 48000000, or 24000000"

  291. #endif

  292.         // switch to PLL as clock source, FLL input = 16 MHz / 512

  293.         MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);

  294.         // wait for PLL clock to be used

  295.         while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;

  296.         // now we're in PEE mode

  297.         // configure USB for 48 MHz clock

  298.         SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); // USB = 96 MHz PLL / 2

  299.         // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0

  300.         SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);

  301. 

  302.         // initialize the SysTick counter

  303.         SYST_RVR = (F_CPU / 1000) - 1;

  304.         SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;

  305. 

  306. 	//init_pins();

  307. 	__enable_irq();

  308. 

  309. 	_init_Teensyduino_internal_();

  310. 	if (RTC_SR & RTC_SR_TIF) rtc_set(TIME_T);

  311. 

  312. 	__libc_init_array();

  313. 

  314. /*

  315. 	for (ptr = &__init_array_start; ptr < &__init_array_end; ptr++) {

  316. 		(*ptr)();

  317. 	}

  318. */

  319. 	startup_late_hook();

  320.         main();

  321.         while (1) ;

  322. }

  323. 

  324. // TODO: is this needed for c++ and where does it come from?

  325. /*

  326. void _init(void)

  327. {

  328. }

  329. */

  330. 

  331. char *__brkval = (char *)&_ebss;

  332. 

  333. void * _sbrk(int incr)

  334. {

  335.         //static char *heap_end = (char *)&_ebss;

  336. 	//char *prev = heap_end;

  337. 	//heap_end += incr;

  338. 

  339. 	char *prev = __brkval;

  340. 	__brkval += incr;

  341. 	return prev;

  342. }

  343. 

  344. int _read(int file, char *ptr, int len)

  345. {

  346. 	return 0;

  347. }

  348. 

  349. int _write(int file, char *ptr, int len)

  350. {

  351. 	return 0;

  352. }

  353. 

  354. int _close(int fd)

  355. {

  356. 	return -1;

  357. }

  358. 

  359. #include <sys/stat.h>

  360. 

  361. int _fstat(int fd, struct stat *st)

  362. {

  363. 	st->st_mode = S_IFCHR;

  364. 	return 0;

  365. }

  366. 

  367. int _isatty(int fd)

  368. {

  369. 	return 1;

  370. }

  371. 

  372. int _lseek(int fd, long long offset, int whence)

  373. {

  374. 	return -1;

  375. }

  376. 

  377. void _exit(int status)

  378. {

  379. 	while (1);

  380. }

  381. 

  382. void __cxa_pure_virtual()

  383. {

  384. 	while (1);

  385. }

  386. 

  387. int __cxa_guard_acquire (int *g) 

  388. {

  389. 	return 1;

  390. }

  391. 

  392. void __cxa_guard_release(int *g)

  393. {

  394. }

  395. 

  396. int nvic_execution_priority(void)

  397. {

  398. 	int priority=256;

  399. 	uint32_t primask, faultmask, basepri, ipsr;

  400. 

  401. 	// full algorithm in ARM DDI0403D, page B1-639

  402. 	// this isn't quite complete, but hopefully good enough

  403. 	asm volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);

  404. 	if (faultmask) return -1;

  405. 	asm volatile("mrs %0, primask\n" : "=r" (primask)::);

  406. 	if (primask) return 0;

  407. 	asm volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);

  408. 	if (ipsr) {

  409. 		if (ipsr < 16) priority = 0; // could be non-zero

  410. 		else priority = NVIC_GET_PRIORITY(ipsr - 16);

  411. 	}

  412. 	asm volatile("mrs %0, basepri\n" : "=r" (basepri)::);

  413. 	if (basepri > 0 && basepri < priority) priority = basepri;

  414. 	return priority;

  415. }