Teensy 4.1 core updated for C++20
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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2013 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "core_pins.h"
  31. #include "pins_arduino.h"
  32. #include "HardwareSerial.h"
  33. #if 0
  34. // moved to pins_arduino.h
  35. struct digital_pin_bitband_and_config_table_struct {
  36. volatile uint32_t *reg;
  37. volatile uint32_t *config;
  38. };
  39. const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
  40. // compatibility macros
  41. #define digitalPinToPort(pin) (pin)
  42. #define digitalPinToBitMask(pin) (1)
  43. #define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0))
  44. #define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32))
  45. #define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64))
  46. #define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96))
  47. #define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128))
  48. #define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160))
  49. #define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config))
  50. #endif
  51. //#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) )
  52. //#define analogInPinToBit(P) (P)
  53. #define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
  54. #define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
  55. //#define GPIO_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
  56. //#define GPIO_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
  57. const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[] = {
  58. {GPIO_BITBAND_PTR(CORE_PIN0_PORTREG, CORE_PIN0_BIT), &CORE_PIN0_CONFIG},
  59. {GPIO_BITBAND_PTR(CORE_PIN1_PORTREG, CORE_PIN1_BIT), &CORE_PIN1_CONFIG},
  60. {GPIO_BITBAND_PTR(CORE_PIN2_PORTREG, CORE_PIN2_BIT), &CORE_PIN2_CONFIG},
  61. {GPIO_BITBAND_PTR(CORE_PIN3_PORTREG, CORE_PIN3_BIT), &CORE_PIN3_CONFIG},
  62. {GPIO_BITBAND_PTR(CORE_PIN4_PORTREG, CORE_PIN4_BIT), &CORE_PIN4_CONFIG},
  63. {GPIO_BITBAND_PTR(CORE_PIN5_PORTREG, CORE_PIN5_BIT), &CORE_PIN5_CONFIG},
  64. {GPIO_BITBAND_PTR(CORE_PIN6_PORTREG, CORE_PIN6_BIT), &CORE_PIN6_CONFIG},
  65. {GPIO_BITBAND_PTR(CORE_PIN7_PORTREG, CORE_PIN7_BIT), &CORE_PIN7_CONFIG},
  66. {GPIO_BITBAND_PTR(CORE_PIN8_PORTREG, CORE_PIN8_BIT), &CORE_PIN8_CONFIG},
  67. {GPIO_BITBAND_PTR(CORE_PIN9_PORTREG, CORE_PIN9_BIT), &CORE_PIN9_CONFIG},
  68. {GPIO_BITBAND_PTR(CORE_PIN10_PORTREG, CORE_PIN10_BIT), &CORE_PIN10_CONFIG},
  69. {GPIO_BITBAND_PTR(CORE_PIN11_PORTREG, CORE_PIN11_BIT), &CORE_PIN11_CONFIG},
  70. {GPIO_BITBAND_PTR(CORE_PIN12_PORTREG, CORE_PIN12_BIT), &CORE_PIN12_CONFIG},
  71. {GPIO_BITBAND_PTR(CORE_PIN13_PORTREG, CORE_PIN13_BIT), &CORE_PIN13_CONFIG},
  72. {GPIO_BITBAND_PTR(CORE_PIN14_PORTREG, CORE_PIN14_BIT), &CORE_PIN14_CONFIG},
  73. {GPIO_BITBAND_PTR(CORE_PIN15_PORTREG, CORE_PIN15_BIT), &CORE_PIN15_CONFIG},
  74. {GPIO_BITBAND_PTR(CORE_PIN16_PORTREG, CORE_PIN16_BIT), &CORE_PIN16_CONFIG},
  75. {GPIO_BITBAND_PTR(CORE_PIN17_PORTREG, CORE_PIN17_BIT), &CORE_PIN17_CONFIG},
  76. {GPIO_BITBAND_PTR(CORE_PIN18_PORTREG, CORE_PIN18_BIT), &CORE_PIN18_CONFIG},
  77. {GPIO_BITBAND_PTR(CORE_PIN19_PORTREG, CORE_PIN19_BIT), &CORE_PIN19_CONFIG},
  78. {GPIO_BITBAND_PTR(CORE_PIN20_PORTREG, CORE_PIN20_BIT), &CORE_PIN20_CONFIG},
  79. {GPIO_BITBAND_PTR(CORE_PIN21_PORTREG, CORE_PIN21_BIT), &CORE_PIN21_CONFIG},
  80. {GPIO_BITBAND_PTR(CORE_PIN22_PORTREG, CORE_PIN22_BIT), &CORE_PIN22_CONFIG},
  81. {GPIO_BITBAND_PTR(CORE_PIN23_PORTREG, CORE_PIN23_BIT), &CORE_PIN23_CONFIG},
  82. {GPIO_BITBAND_PTR(CORE_PIN24_PORTREG, CORE_PIN24_BIT), &CORE_PIN24_CONFIG},
  83. {GPIO_BITBAND_PTR(CORE_PIN25_PORTREG, CORE_PIN25_BIT), &CORE_PIN25_CONFIG},
  84. {GPIO_BITBAND_PTR(CORE_PIN26_PORTREG, CORE_PIN26_BIT), &CORE_PIN26_CONFIG},
  85. {GPIO_BITBAND_PTR(CORE_PIN27_PORTREG, CORE_PIN27_BIT), &CORE_PIN27_CONFIG},
  86. {GPIO_BITBAND_PTR(CORE_PIN28_PORTREG, CORE_PIN28_BIT), &CORE_PIN28_CONFIG},
  87. {GPIO_BITBAND_PTR(CORE_PIN29_PORTREG, CORE_PIN29_BIT), &CORE_PIN29_CONFIG},
  88. {GPIO_BITBAND_PTR(CORE_PIN30_PORTREG, CORE_PIN30_BIT), &CORE_PIN30_CONFIG},
  89. {GPIO_BITBAND_PTR(CORE_PIN31_PORTREG, CORE_PIN31_BIT), &CORE_PIN31_CONFIG},
  90. {GPIO_BITBAND_PTR(CORE_PIN32_PORTREG, CORE_PIN32_BIT), &CORE_PIN32_CONFIG},
  91. {GPIO_BITBAND_PTR(CORE_PIN33_PORTREG, CORE_PIN33_BIT), &CORE_PIN33_CONFIG}
  92. };
  93. typedef void (*voidFuncPtr)(void);
  94. volatile static voidFuncPtr intFunc[CORE_NUM_DIGITAL];
  95. void init_pin_interrupts(void)
  96. {
  97. //SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO
  98. NVIC_ENABLE_IRQ(IRQ_PORTA);
  99. NVIC_ENABLE_IRQ(IRQ_PORTB);
  100. NVIC_ENABLE_IRQ(IRQ_PORTC);
  101. NVIC_ENABLE_IRQ(IRQ_PORTD);
  102. NVIC_ENABLE_IRQ(IRQ_PORTE);
  103. // TODO: maybe these should be set to a lower priority
  104. // so if the user puts lots of slow code on attachInterrupt
  105. // fast interrupts will still be serviced quickly?
  106. }
  107. void attachInterrupt(uint8_t pin, void (*function)(void), int mode)
  108. {
  109. volatile uint32_t *config;
  110. uint32_t cfg, mask;
  111. if (pin >= CORE_NUM_DIGITAL) return;
  112. switch (mode) {
  113. case CHANGE: mask = 0x0B; break;
  114. case RISING: mask = 0x09; break;
  115. case FALLING: mask = 0x0A; break;
  116. case LOW: mask = 0x08; break;
  117. case HIGH: mask = 0x0C; break;
  118. default: return;
  119. }
  120. mask = (mask << 16) | 0x01000000;
  121. config = portConfigRegister(pin);
  122. __disable_irq();
  123. cfg = *config;
  124. cfg &= ~0x000F0000; // disable any previous interrupt
  125. *config = cfg;
  126. intFunc[pin] = function; // set the function pointer
  127. cfg |= mask;
  128. *config = cfg; // enable the new interrupt
  129. __enable_irq();
  130. }
  131. void detachInterrupt(uint8_t pin)
  132. {
  133. volatile uint32_t *config;
  134. config = portConfigRegister(pin);
  135. __disable_irq();
  136. *config = ((*config & ~0x000F0000) | 0x01000000);
  137. intFunc[pin] = NULL;
  138. __enable_irq();
  139. }
  140. void porta_isr(void)
  141. {
  142. uint32_t isfr = PORTA_ISFR;
  143. PORTA_ISFR = isfr;
  144. if ((isfr & CORE_PIN3_BITMASK) && intFunc[3]) intFunc[3]();
  145. if ((isfr & CORE_PIN4_BITMASK) && intFunc[4]) intFunc[4]();
  146. if ((isfr & CORE_PIN24_BITMASK) && intFunc[24]) intFunc[24]();
  147. if ((isfr & CORE_PIN33_BITMASK) && intFunc[33]) intFunc[33]();
  148. }
  149. void portb_isr(void)
  150. {
  151. uint32_t isfr = PORTB_ISFR;
  152. PORTB_ISFR = isfr;
  153. if ((isfr & CORE_PIN0_BITMASK) && intFunc[0]) intFunc[0]();
  154. if ((isfr & CORE_PIN1_BITMASK) && intFunc[1]) intFunc[1]();
  155. if ((isfr & CORE_PIN16_BITMASK) && intFunc[16]) intFunc[16]();
  156. if ((isfr & CORE_PIN17_BITMASK) && intFunc[17]) intFunc[17]();
  157. if ((isfr & CORE_PIN18_BITMASK) && intFunc[18]) intFunc[18]();
  158. if ((isfr & CORE_PIN19_BITMASK) && intFunc[19]) intFunc[19]();
  159. if ((isfr & CORE_PIN25_BITMASK) && intFunc[25]) intFunc[25]();
  160. if ((isfr & CORE_PIN32_BITMASK) && intFunc[32]) intFunc[32]();
  161. }
  162. void portc_isr(void)
  163. {
  164. // TODO: these are inefficent. Use CLZ somehow....
  165. uint32_t isfr = PORTC_ISFR;
  166. PORTC_ISFR = isfr;
  167. if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9]();
  168. if ((isfr & CORE_PIN10_BITMASK) && intFunc[10]) intFunc[10]();
  169. if ((isfr & CORE_PIN11_BITMASK) && intFunc[11]) intFunc[11]();
  170. if ((isfr & CORE_PIN12_BITMASK) && intFunc[12]) intFunc[12]();
  171. if ((isfr & CORE_PIN13_BITMASK) && intFunc[13]) intFunc[13]();
  172. if ((isfr & CORE_PIN15_BITMASK) && intFunc[15]) intFunc[15]();
  173. if ((isfr & CORE_PIN22_BITMASK) && intFunc[22]) intFunc[22]();
  174. if ((isfr & CORE_PIN23_BITMASK) && intFunc[23]) intFunc[23]();
  175. if ((isfr & CORE_PIN27_BITMASK) && intFunc[27]) intFunc[27]();
  176. if ((isfr & CORE_PIN28_BITMASK) && intFunc[28]) intFunc[28]();
  177. if ((isfr & CORE_PIN29_BITMASK) && intFunc[29]) intFunc[29]();
  178. if ((isfr & CORE_PIN30_BITMASK) && intFunc[30]) intFunc[30]();
  179. }
  180. void portd_isr(void)
  181. {
  182. uint32_t isfr = PORTD_ISFR;
  183. PORTD_ISFR = isfr;
  184. if ((isfr & CORE_PIN2_BITMASK) && intFunc[2]) intFunc[2]();
  185. if ((isfr & CORE_PIN5_BITMASK) && intFunc[5]) intFunc[5]();
  186. if ((isfr & CORE_PIN6_BITMASK) && intFunc[6]) intFunc[6]();
  187. if ((isfr & CORE_PIN7_BITMASK) && intFunc[7]) intFunc[7]();
  188. if ((isfr & CORE_PIN8_BITMASK) && intFunc[8]) intFunc[8]();
  189. if ((isfr & CORE_PIN14_BITMASK) && intFunc[14]) intFunc[14]();
  190. if ((isfr & CORE_PIN20_BITMASK) && intFunc[20]) intFunc[20]();
  191. if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21]();
  192. }
  193. void porte_isr(void)
  194. {
  195. uint32_t isfr = PORTE_ISFR;
  196. PORTE_ISFR = isfr;
  197. if ((isfr & CORE_PIN26_BITMASK) && intFunc[26]) intFunc[26]();
  198. if ((isfr & CORE_PIN31_BITMASK) && intFunc[31]) intFunc[31]();
  199. }
  200. unsigned long rtc_get(void)
  201. {
  202. return RTC_TSR;
  203. }
  204. void rtc_set(unsigned long t)
  205. {
  206. RTC_SR = 0;
  207. RTC_TPR = 0;
  208. RTC_TSR = t;
  209. RTC_SR = RTC_SR_TCE;
  210. }
  211. // adjust is the amount of crystal error to compensate, 1 = 0.1192 ppm
  212. // For example, adjust = -100 is slows the clock by 11.92 ppm
  213. //
  214. void rtc_compensate(int adjust)
  215. {
  216. uint32_t comp, interval, tcr;
  217. // This simple approach tries to maximize the interval.
  218. // Perhaps minimizing TCR would be better, so the
  219. // compensation is distributed more evenly across
  220. // many seconds, rather than saving it all up and then
  221. // altering one second up to +/- 0.38%
  222. if (adjust >= 0) {
  223. comp = adjust;
  224. interval = 256;
  225. while (1) {
  226. tcr = comp * interval;
  227. if (tcr < 128*256) break;
  228. if (--interval == 1) break;
  229. }
  230. tcr = tcr >> 8;
  231. } else {
  232. comp = -adjust;
  233. interval = 256;
  234. while (1) {
  235. tcr = comp * interval;
  236. if (tcr < 129*256) break;
  237. if (--interval == 1) break;
  238. }
  239. tcr = tcr >> 8;
  240. tcr = 256 - tcr;
  241. }
  242. RTC_TCR = ((interval - 1) << 8) | tcr;
  243. }
  244. #if 0
  245. // TODO: build system should define this
  246. // so RTC is automatically initialized to approx correct time
  247. // at least when the program begins running right after upload
  248. #ifndef TIME_T
  249. #define TIME_T 1350160272
  250. #endif
  251. void init_rtc(void)
  252. {
  253. serial_print("init_rtc\n");
  254. //SIM_SCGC6 |= SIM_SCGC6_RTC;
  255. // enable the RTC crystal oscillator, for approx 12pf crystal
  256. if (!(RTC_CR & RTC_CR_OSCE)) {
  257. serial_print("start RTC oscillator\n");
  258. RTC_SR = 0;
  259. RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
  260. }
  261. // should wait for crystal to stabilize.....
  262. serial_print("SR=");
  263. serial_phex32(RTC_SR);
  264. serial_print("\n");
  265. serial_print("CR=");
  266. serial_phex32(RTC_CR);
  267. serial_print("\n");
  268. serial_print("TSR=");
  269. serial_phex32(RTC_TSR);
  270. serial_print("\n");
  271. serial_print("TCR=");
  272. serial_phex32(RTC_TCR);
  273. serial_print("\n");
  274. if (RTC_SR & RTC_SR_TIF) {
  275. // enable the RTC
  276. RTC_SR = 0;
  277. RTC_TPR = 0;
  278. RTC_TSR = TIME_T;
  279. RTC_SR = RTC_SR_TCE;
  280. }
  281. }
  282. #endif
  283. extern void usb_init(void);
  284. // create a default PWM at the same 488.28 Hz as Arduino Uno
  285. #if F_BUS == 48000000
  286. #define DEFAULT_FTM_MOD (49152 - 1)
  287. #define DEFAULT_FTM_PRESCALE 1
  288. #else
  289. #define DEFAULT_FTM_MOD (49152 - 1)
  290. #define DEFAULT_FTM_PRESCALE 0
  291. #endif
  292. //void init_pins(void)
  293. void _init_Teensyduino_internal_(void)
  294. {
  295. init_pin_interrupts();
  296. //SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write
  297. //SIM_SCGC6 |= SIM_SCGC6_FTM1;
  298. FTM0_CNT = 0;
  299. FTM0_MOD = DEFAULT_FTM_MOD;
  300. FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10
  301. FTM0_C1SC = 0x28;
  302. FTM0_C2SC = 0x28;
  303. FTM0_C3SC = 0x28;
  304. FTM0_C4SC = 0x28;
  305. FTM0_C5SC = 0x28;
  306. FTM0_C6SC = 0x28;
  307. FTM0_C7SC = 0x28;
  308. FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
  309. FTM1_CNT = 0;
  310. FTM1_MOD = DEFAULT_FTM_MOD;
  311. FTM1_C0SC = 0x28;
  312. FTM1_C1SC = 0x28;
  313. FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
  314. analog_init();
  315. //delay(100); // TODO: this is not necessary, right?
  316. usb_init();
  317. }
  318. // SOPT4 is SIM select clocks?
  319. // FTM is clocked by the bus clock, either 24 or 48 MHz
  320. // input capture can be FTM1_CH0, CMP0 or CMP1 or USB start of frame
  321. // 24 MHz with reload 49152 to match Arduino's speed = 488.28125 Hz
  322. static uint8_t analog_write_res = 8;
  323. void analogWrite(uint8_t pin, int val)
  324. {
  325. uint32_t cval, max;
  326. max = 1 << analog_write_res;
  327. if (val <= 0) {
  328. digitalWrite(pin, LOW);
  329. pinMode(pin, OUTPUT); // TODO: implement OUTPUT_LOW
  330. return;
  331. } else if (val >= max) {
  332. digitalWrite(pin, HIGH);
  333. pinMode(pin, OUTPUT); // TODO: implement OUTPUT_HIGH
  334. return;
  335. }
  336. //serial_print("analogWrite\n");
  337. //serial_print("val = ");
  338. //serial_phex32(val);
  339. //serial_print("\n");
  340. //serial_print("analog_write_res = ");
  341. //serial_phex(analog_write_res);
  342. //serial_print("\n");
  343. if (pin == 3 || pin == 4) {
  344. cval = ((uint32_t)val * (uint32_t)(FTM1_MOD + 1)) >> analog_write_res;
  345. //serial_print("FTM1_MOD = ");
  346. //serial_phex32(FTM1_MOD);
  347. //serial_print("\n");
  348. } else {
  349. cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res;
  350. //serial_print("FTM0_MOD = ");
  351. //serial_phex32(FTM0_MOD);
  352. //serial_print("\n");
  353. }
  354. //serial_print("cval = ");
  355. //serial_phex32(cval);
  356. //serial_print("\n");
  357. switch (pin) {
  358. case 3: // PTA12, FTM1_CH0
  359. FTM1_C0V = cval;
  360. CORE_PIN3_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
  361. break;
  362. case 4: // PTA13, FTM1_CH1
  363. FTM1_C1V = cval;
  364. CORE_PIN4_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
  365. break;
  366. case 5: // PTD7, FTM0_CH7
  367. FTM0_C7V = cval;
  368. CORE_PIN5_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  369. break;
  370. case 6: // PTD4, FTM0_CH4
  371. FTM0_C4V = cval;
  372. CORE_PIN6_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  373. break;
  374. case 9: // PTC3, FTM0_CH2
  375. FTM0_C2V = cval;
  376. CORE_PIN9_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  377. break;
  378. case 10: // PTC4, FTM0_CH3
  379. FTM0_C3V = cval;
  380. CORE_PIN10_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  381. break;
  382. case 20: // PTD5, FTM0_CH5
  383. FTM0_C5V = cval;
  384. CORE_PIN20_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  385. break;
  386. case 21: // PTD6, FTM0_CH6
  387. FTM0_C6V = cval;
  388. CORE_PIN21_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  389. break;
  390. case 22: // PTC1, FTM0_CH0
  391. FTM0_C0V = cval;
  392. CORE_PIN22_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  393. break;
  394. case 23: // PTC2, FTM0_CH1
  395. FTM0_C1V = cval;
  396. CORE_PIN23_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
  397. break;
  398. default:
  399. digitalWrite(pin, (val > 127) ? HIGH : LOW);
  400. pinMode(pin, OUTPUT);
  401. }
  402. }
  403. void analogWriteRes(uint32_t bits)
  404. {
  405. if (bits < 1) {
  406. bits = 1;
  407. } else if (bits > 16) {
  408. bits = 16;
  409. }
  410. analog_write_res = bits;
  411. }
  412. void analogWriteFrequency(uint8_t pin, uint32_t frequency)
  413. {
  414. uint32_t minfreq, prescale, mod;
  415. //serial_print("analogWriteFrequency: pin = ");
  416. //serial_phex(pin);
  417. //serial_print(", freq = ");
  418. //serial_phex32(frequency);
  419. //serial_print("\n");
  420. for (prescale = 0; prescale < 7; prescale++) {
  421. minfreq = (F_BUS >> 16) >> prescale;
  422. if (frequency > minfreq) break;
  423. }
  424. //serial_print("F_BUS = ");
  425. //serial_phex32(F_BUS >> prescale);
  426. //serial_print("\n");
  427. //serial_print("prescale = ");
  428. //serial_phex(prescale);
  429. //serial_print("\n");
  430. //mod = ((F_BUS >> prescale) / frequency) - 1;
  431. mod = (((F_BUS >> prescale) + (frequency >> 1)) / frequency) - 1;
  432. if (mod > 65535) mod = 65535;
  433. //serial_print("mod = ");
  434. //serial_phex32(mod);
  435. //serial_print("\n");
  436. if (pin == 3 || pin == 4) {
  437. FTM1_SC = 0;
  438. FTM1_CNT = 0;
  439. FTM1_MOD = mod;
  440. FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
  441. } else if (pin == 5 || pin == 6 || pin == 9 || pin == 10 ||
  442. (pin >= 20 && pin <= 23)) {
  443. FTM0_SC = 0;
  444. FTM0_CNT = 0;
  445. FTM0_MOD = mod;
  446. FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
  447. }
  448. }
  449. // TODO: startup code needs to initialize all pins to GPIO mode, input by default
  450. void digitalWrite(uint8_t pin, uint8_t val)
  451. {
  452. if (pin >= CORE_NUM_DIGITAL) return;
  453. if (*portModeRegister(pin)) {
  454. if (val) {
  455. *portSetRegister(pin) = 1;
  456. } else {
  457. *portClearRegister(pin) = 1;
  458. }
  459. } else {
  460. volatile uint32_t *config = portConfigRegister(pin);
  461. if (val) {
  462. // TODO use bitband for atomic read-mod-write
  463. *config |= (PORT_PCR_PE | PORT_PCR_PS);
  464. //*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS;
  465. } else {
  466. // TODO use bitband for atomic read-mod-write
  467. *config &= ~(PORT_PCR_PE);
  468. //*config = PORT_PCR_MUX(1);
  469. }
  470. }
  471. }
  472. uint8_t digitalRead(uint8_t pin)
  473. {
  474. if (pin >= CORE_NUM_DIGITAL) return 0;
  475. return *portInputRegister(pin);
  476. }
  477. void pinMode(uint8_t pin, uint8_t mode)
  478. {
  479. volatile uint32_t *config;
  480. if (pin >= CORE_NUM_DIGITAL) return;
  481. config = portConfigRegister(pin);
  482. if (mode == OUTPUT) {
  483. *portModeRegister(pin) = 1;
  484. *config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
  485. } else {
  486. *portModeRegister(pin) = 0;
  487. if (mode == INPUT) {
  488. *config = PORT_PCR_MUX(1);
  489. } else {
  490. *config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup
  491. }
  492. }
  493. }
  494. void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value)
  495. {
  496. if (bitOrder == LSBFIRST) {
  497. shiftOut_lsbFirst(dataPin, clockPin, value);
  498. } else {
  499. shiftOut_msbFirst(dataPin, clockPin, value);
  500. }
  501. }
  502. void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
  503. {
  504. uint8_t mask;
  505. for (mask=0x01; mask; mask <<= 1) {
  506. digitalWrite(dataPin, value & mask);
  507. digitalWrite(clockPin, HIGH);
  508. digitalWrite(clockPin, LOW);
  509. }
  510. }
  511. void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
  512. {
  513. uint8_t mask;
  514. for (mask=0x80; mask; mask >>= 1) {
  515. digitalWrite(dataPin, value & mask);
  516. digitalWrite(clockPin, HIGH);
  517. digitalWrite(clockPin, LOW);
  518. }
  519. }
  520. uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder)
  521. {
  522. if (bitOrder == LSBFIRST) {
  523. return shiftIn_lsbFirst(dataPin, clockPin);
  524. } else {
  525. return shiftIn_msbFirst(dataPin, clockPin);
  526. }
  527. }
  528. uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin)
  529. {
  530. uint8_t mask, value=0;
  531. for (mask=0x01; mask; mask <<= 1) {
  532. digitalWrite(clockPin, HIGH);
  533. if (digitalRead(dataPin)) value |= mask;
  534. digitalWrite(clockPin, LOW);
  535. }
  536. return value;
  537. }
  538. uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin)
  539. {
  540. uint8_t mask, value=0;
  541. for (mask=0x80; mask; mask >>= 1) {
  542. digitalWrite(clockPin, HIGH);
  543. if (digitalRead(dataPin)) value |= mask;
  544. digitalWrite(clockPin, LOW);
  545. }
  546. return value;
  547. }
  548. // the systick interrupt is supposed to increment this at 1 kHz rate
  549. volatile uint32_t systick_millis_count = 0;
  550. //uint32_t systick_current, systick_count, systick_istatus; // testing only
  551. uint32_t micros(void)
  552. {
  553. uint32_t count, current, istatus;
  554. __disable_irq();
  555. current = SYST_CVR;
  556. count = systick_millis_count;
  557. istatus = SCB_ICSR; // bit 26 indicates if systick exception pending
  558. __enable_irq();
  559. //systick_current = current;
  560. //systick_count = count;
  561. //systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0;
  562. if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++;
  563. current = ((F_CPU / 1000) - 1) - current;
  564. return count * 1000 + current / (F_CPU / 1000000);
  565. }
  566. void delay(uint32_t ms)
  567. {
  568. uint32_t start = micros();
  569. if (ms > 0) {
  570. while (1) {
  571. if ((micros() - start) >= 1000) {
  572. ms--;
  573. if (ms == 0) return;
  574. start += 1000;
  575. }
  576. yield();
  577. }
  578. }
  579. }
  580. #if F_CPU == 96000000
  581. #define PULSEIN_LOOPS_PER_USEC 14
  582. #elif F_CPU == 48000000
  583. #define PULSEIN_LOOPS_PER_USEC 7
  584. #elif F_CPU == 24000000
  585. #define PULSEIN_LOOPS_PER_USEC 4
  586. #endif
  587. uint32_t pulseIn_high(volatile uint8_t *reg, uint32_t timeout)
  588. {
  589. uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
  590. uint32_t usec_start, usec_stop;
  591. // wait for any previous pulse to end
  592. while (*reg) {
  593. if (--timeout_count == 0) return 0;
  594. }
  595. // wait for the pulse to start
  596. while (!*reg) {
  597. if (--timeout_count == 0) return 0;
  598. }
  599. usec_start = micros();
  600. // wait for the pulse to stop
  601. while (*reg) {
  602. if (--timeout_count == 0) return 0;
  603. }
  604. usec_stop = micros();
  605. return usec_stop - usec_start;
  606. }
  607. uint32_t pulseIn_low(volatile uint8_t *reg, uint32_t timeout)
  608. {
  609. uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
  610. uint32_t usec_start, usec_stop;
  611. // wait for any previous pulse to end
  612. while (!*reg) {
  613. if (--timeout_count == 0) return 0;
  614. }
  615. // wait for the pulse to start
  616. while (*reg) {
  617. if (--timeout_count == 0) return 0;
  618. }
  619. usec_start = micros();
  620. // wait for the pulse to stop
  621. while (!*reg) {
  622. if (--timeout_count == 0) return 0;
  623. }
  624. usec_stop = micros();
  625. return usec_stop - usec_start;
  626. }
  627. // TODO: an inline version should handle the common case where state is const
  628. uint32_t pulseIn(uint8_t pin, uint8_t state, uint32_t timeout)
  629. {
  630. if (pin >= CORE_NUM_DIGITAL) return 0;
  631. if (state) return pulseIn_high(portInputRegister(pin), timeout);
  632. return pulseIn_low(portInputRegister(pin), timeout);;
  633. }