Teensy 4.1 core updated for C++20
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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2017 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "kinetis.h"
  31. #include "core_pins.h"
  32. #include "HardwareSerial.h"
  33. #ifdef HAS_KINETISK_LPUART0
  34. #define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
  35. #define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
  36. #define BITBAND_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
  37. #define BITBAND_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
  38. #define TCIE_BIT 22
  39. #define TIE_BIT 23
  40. ////////////////////////////////////////////////////////////////
  41. // Tunable parameters (relatively safe to edit these numbers)
  42. ////////////////////////////////////////////////////////////////
  43. #ifndef SERIAL6_TX_BUFFER_SIZE
  44. #define SERIAL6_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer
  45. #endif
  46. #ifndef SERIAL6_RX_BUFFER_SIZE
  47. #define SERIAL6_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer
  48. #endif
  49. #define RTS_HIGH_WATERMARK (SERIAL6_RX_BUFFER_SIZE-24) // RTS requests sender to pause
  50. #define RTS_LOW_WATERMARK (SERIAL6_RX_BUFFER_SIZE-38) // RTS allows sender to resume
  51. #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest
  52. ////////////////////////////////////////////////////////////////
  53. // changes not recommended below this point....
  54. ////////////////////////////////////////////////////////////////
  55. #ifdef SERIAL_9BIT_SUPPORT
  56. static uint8_t use9Bits = 0;
  57. #define BUFTYPE uint16_t
  58. #else
  59. #define BUFTYPE uint8_t
  60. #define use9Bits 0
  61. #endif
  62. static volatile BUFTYPE tx_buffer[SERIAL6_TX_BUFFER_SIZE];
  63. static volatile BUFTYPE rx_buffer[SERIAL6_RX_BUFFER_SIZE];
  64. static volatile BUFTYPE *rx_buffer_storage_ = NULL;
  65. static volatile BUFTYPE *tx_buffer_storage_ = NULL;
  66. static size_t tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE;
  67. static size_t rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE;
  68. static size_t rts_low_watermark_ = RTS_LOW_WATERMARK;
  69. static size_t rts_high_watermark_ = RTS_HIGH_WATERMARK;
  70. static volatile uint8_t transmitting = 0;
  71. static volatile uint8_t *transmit_pin=NULL;
  72. #define transmit_assert() *transmit_pin = 1
  73. #define transmit_deassert() *transmit_pin = 0
  74. static volatile uint8_t *rts_pin=NULL;
  75. #define rts_assert() *rts_pin = 0
  76. #define rts_deassert() *rts_pin = 1
  77. #if SERIAL6_TX_BUFFER_SIZE > 255
  78. static volatile uint16_t tx_buffer_head = 0;
  79. static volatile uint16_t tx_buffer_tail = 0;
  80. #else
  81. static volatile uint8_t tx_buffer_head = 0;
  82. static volatile uint8_t tx_buffer_tail = 0;
  83. #endif
  84. #if SERIAL6_RX_BUFFER_SIZE > 255
  85. static volatile uint16_t rx_buffer_head = 0;
  86. static volatile uint16_t rx_buffer_tail = 0;
  87. #else
  88. static volatile uint8_t rx_buffer_head = 0;
  89. static volatile uint8_t rx_buffer_tail = 0;
  90. #endif
  91. static uint8_t tx_pin_num = 48;
  92. // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
  93. // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
  94. void serial6_begin(uint32_t desiredBaudRate)
  95. {
  96. #define F_LPUART_CLOCK_SPEED 48000000 //F_BUS
  97. // Make sure the clock for this uart is enabled, else the registers are not
  98. // vailable.
  99. SIM_SCGC2 |= SIM_SCGC2_LPUART0; // Turn on the clock
  100. // Convert the baud rate to best divisor and OSR, based off of code I found in posting
  101. // try to find an OSR > 4 with the minimum difference from the actual disired baud rate.
  102. uint16_t sbr, sbrTemp, osrCheck;
  103. uint32_t osr, baudDiffCheck, calculatedBaud, baudDiff;
  104. uint32_t clockSpeed;
  105. // First lets figure out what the LPUART Clock speed is.
  106. uint32_t PLLFLLSEL = SIM_SOPT2 & SIM_SOPT2_IRC48SEL; // Note: Bot bits on here
  107. if (PLLFLLSEL == SIM_SOPT2_IRC48SEL)
  108. clockSpeed = 48000000; // Fixed to 48mhz
  109. else if (PLLFLLSEL == SIM_SOPT2_PLLFLLSEL)
  110. clockSpeed = F_PLL; // Using PLL clock
  111. else
  112. clockSpeed = F_CPU/4; // FLL clock, guessing
  113. osr = 4;
  114. sbr = (clockSpeed/(desiredBaudRate * osr));
  115. /*set sbr to 1 if the clockSpeed can not satisfy the desired baud rate*/
  116. if(sbr == 0) {
  117. // Maybe print something.
  118. return; // can not initialize
  119. }
  120. // With integer math the divide*muliply implies the calculated baud will be >= desired baud
  121. calculatedBaud = (clockSpeed / (osr * sbr));
  122. baudDiff = calculatedBaud - desiredBaudRate;
  123. // Check if better off with sbr+1
  124. if (baudDiff != 0) {
  125. calculatedBaud = (clockSpeed / (osr * (sbr + 1)));
  126. baudDiffCheck = desiredBaudRate - calculatedBaud ;
  127. if (baudDiffCheck < baudDiff) {
  128. sbr++; // use the higher sbr
  129. baudDiff = baudDiffCheck;
  130. }
  131. }
  132. // loop to find the best osr value possible, one that generates minimum baudDiff
  133. for (osrCheck = 5; osrCheck <= 32; osrCheck++) {
  134. sbrTemp = (clockSpeed/(desiredBaudRate * osrCheck));
  135. if(sbrTemp == 0)
  136. break; // higher divisor returns 0 so can not use...
  137. // Remember integer math so (X/Y)*Y will always be <=X
  138. calculatedBaud = (clockSpeed / (osrCheck * sbrTemp));
  139. baudDiffCheck = calculatedBaud - desiredBaudRate;
  140. if (baudDiffCheck <= baudDiff) {
  141. baudDiff = baudDiffCheck;
  142. osr = osrCheck;
  143. sbr = sbrTemp;
  144. }
  145. // Lets try the rounded up one as well
  146. if (baudDiffCheck) {
  147. calculatedBaud = (clockSpeed / (osrCheck * ++sbrTemp));
  148. baudDiffCheck = desiredBaudRate - calculatedBaud;
  149. if (baudDiffCheck <= baudDiff) {
  150. baudDiff = baudDiffCheck;
  151. osr = osrCheck;
  152. sbr = sbrTemp;
  153. }
  154. }
  155. }
  156. // for lower OSR <= 7x turn on both edge sampling
  157. uint32_t lpb = LPUART_BAUD_OSR(osr-1) | LPUART_BAUD_SBR(sbr);
  158. if (osr < 8) {
  159. lpb |= LPUART_BAUD_BOTHEDGE;
  160. }
  161. LPUART0_BAUD = lpb;
  162. SIM_SOPT2 |= SIM_SOPT2_LPUARTSRC(1); // Lets use PLL?
  163. rx_buffer_head = 0;
  164. rx_buffer_tail = 0;
  165. tx_buffer_head = 0;
  166. tx_buffer_tail = 0;
  167. transmitting = 0;
  168. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(5);
  169. CORE_PIN48_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(5);
  170. LPUART0_CTRL = 0;
  171. LPUART0_MATCH = 0;
  172. LPUART0_STAT = 0;
  173. // Enable the transmitter, receiver and enable receiver interrupt
  174. LPUART0_CTRL |= LPUART_CTRL_RIE | LPUART_CTRL_TE | LPUART_CTRL_RE;
  175. NVIC_SET_PRIORITY(IRQ_LPUART0, IRQ_PRIORITY);
  176. NVIC_ENABLE_IRQ(IRQ_LPUART0);
  177. }
  178. void serial6_format(uint32_t format)
  179. {
  180. uint32_t c;
  181. // Bits 0-2 - Parity plus 9 bit.
  182. c = LPUART0_CTRL;
  183. //c = (c & ~(LPUART_CTRL_M | LPUART_CTRL_PE | LPUART_CTRL_PT)) | (format & (LPUART_CTRL_PE | LPUART_CTRL_PT)); // configure parity
  184. //if (format & 0x04) c |= LPUART_CTRL_M; // 9 bits (might include parity)
  185. c = (c & ~0x13) | (format & 0x03); // configure parity
  186. if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
  187. LPUART0_CTRL = c;
  188. if ((format & 0x0F) == 0x04) LPUART0_CTRL |= LPUART_CTRL_T8; // 8N2 is 9 bit with 9th bit always 1
  189. // Bit 3 10 bit - Will assume that begin already cleared it.
  190. if (format & 0x08)
  191. LPUART0_BAUD |= LPUART_BAUD_M10;
  192. // Bit 4 RXINVERT
  193. c = LPUART0_STAT & ~LPUART_STAT_RXINV;
  194. if (format & 0x10) c |= LPUART_STAT_RXINV; // rx invert
  195. LPUART0_STAT = c;
  196. // Bit 5 TXINVERT
  197. c = LPUART0_CTRL & ~LPUART_CTRL_TXINV;
  198. if (format & 0x20) c |= LPUART_CTRL_TXINV; // tx invert
  199. LPUART0_CTRL = c;
  200. // For T3.6 See about turning on 2 stop bit mode
  201. if ( format & 0x100) LPUART0_BAUD |= LPUART_BAUD_SBNS;
  202. }
  203. void serial6_end(void)
  204. {
  205. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  206. while (transmitting) yield(); // wait for buffered data to send
  207. NVIC_DISABLE_IRQ(IRQ_LPUART0);
  208. LPUART0_CTRL = 0;
  209. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  210. CORE_PIN48_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  211. rx_buffer_head = 0;
  212. rx_buffer_tail = 0;
  213. if (rts_pin) rts_deassert();
  214. }
  215. void serial6_set_transmit_pin(uint8_t pin)
  216. {
  217. while (transmitting) ;
  218. pinMode(pin, OUTPUT);
  219. digitalWrite(pin, LOW);
  220. transmit_pin = portOutputRegister(pin);
  221. }
  222. void serial6_set_tx(uint8_t pin, uint8_t opendrain)
  223. {
  224. uint32_t cfg;
  225. if (opendrain) pin |= 128;
  226. if (pin == tx_pin_num) return;
  227. if ((SIM_SCGC2 & SIM_SCGC2_LPUART0)) {
  228. switch (tx_pin_num & 127) {
  229. case 48: CORE_PIN48_CONFIG = 0; break; // PTE24
  230. }
  231. if (opendrain) {
  232. cfg = PORT_PCR_DSE | PORT_PCR_ODE;
  233. } else {
  234. cfg = PORT_PCR_DSE | PORT_PCR_SRE;
  235. }
  236. switch (pin & 127) {
  237. case 48: CORE_PIN48_CONFIG = cfg | PORT_PCR_MUX(5); break;
  238. }
  239. }
  240. tx_pin_num = pin;
  241. }
  242. void serial6_set_rx(uint8_t pin)
  243. {
  244. }
  245. int serial6_set_rts(uint8_t pin)
  246. {
  247. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  248. if (pin < CORE_NUM_DIGITAL) {
  249. rts_pin = portOutputRegister(pin);
  250. pinMode(pin, OUTPUT);
  251. rts_assert();
  252. } else {
  253. rts_pin = NULL;
  254. return 0;
  255. }
  256. return 1;
  257. }
  258. int serial6_set_cts(uint8_t pin)
  259. {
  260. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  261. if (pin == 56) {
  262. CORE_PIN56_CONFIG = PORT_PCR_MUX(5) | PORT_PCR_PE; // weak pulldown
  263. } else {
  264. UART5_MODEM &= ~UART_MODEM_TXCTSE;
  265. return 0;
  266. }
  267. UART5_MODEM |= UART_MODEM_TXCTSE;
  268. return 1;
  269. }
  270. void serial6_putchar(uint32_t c)
  271. {
  272. uint32_t head, n;
  273. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  274. if (transmit_pin) transmit_assert();
  275. head = tx_buffer_head;
  276. if (++head >= tx_buffer_total_size_) head = 0;
  277. while (tx_buffer_tail == head) {
  278. int priority = nvic_execution_priority();
  279. if (priority <= IRQ_PRIORITY) {
  280. if ((LPUART0_STAT & LPUART_STAT_TDRE)) {
  281. uint32_t tail = tx_buffer_tail;
  282. if (++tail >= tx_buffer_total_size_) tail = 0;
  283. if (tail < SERIAL6_TX_BUFFER_SIZE) {
  284. n = tx_buffer[tail];
  285. } else {
  286. n = tx_buffer_storage_[tail-SERIAL6_TX_BUFFER_SIZE];
  287. }
  288. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  289. LPUART0_DATA = n;
  290. tx_buffer_tail = tail;
  291. }
  292. } else if (priority >= 256) {
  293. yield(); // wait
  294. }
  295. }
  296. tx_buffer[head] = c;
  297. transmitting = 1;
  298. tx_buffer_head = head;
  299. //LPUART0_CTRL |= LPUART_CTRL_TIE; // enable the transmit interrupt
  300. BITBAND_SET_BIT(LPUART0_CTRL, TIE_BIT);
  301. }
  302. void serial6_write(const void *buf, unsigned int count)
  303. {
  304. const uint8_t *p = (const uint8_t *)buf;
  305. while (count-- > 0) serial6_putchar(*p++);
  306. }
  307. void serial6_flush(void)
  308. {
  309. while (transmitting) yield(); // wait
  310. }
  311. int serial6_write_buffer_free(void)
  312. {
  313. uint32_t head, tail;
  314. head = tx_buffer_head;
  315. tail = tx_buffer_tail;
  316. if (head >= tail) return tx_buffer_total_size_ - 1 - head + tail;
  317. return tail - head - 1;
  318. }
  319. int serial6_available(void)
  320. {
  321. uint32_t head, tail;
  322. head = rx_buffer_head;
  323. tail = rx_buffer_tail;
  324. if (head >= tail) return head - tail;
  325. return rx_buffer_total_size_ + head - tail;
  326. }
  327. int serial6_getchar(void)
  328. {
  329. uint32_t head, tail;
  330. int c;
  331. head = rx_buffer_head;
  332. tail = rx_buffer_tail;
  333. if (head == tail) return -1;
  334. if (++tail >= rx_buffer_total_size_) tail = 0;
  335. if (tail < SERIAL6_RX_BUFFER_SIZE) {
  336. c = rx_buffer[tail];
  337. } else {
  338. c = rx_buffer_storage_[tail-SERIAL6_RX_BUFFER_SIZE];
  339. }
  340. rx_buffer_tail = tail;
  341. if (rts_pin) {
  342. int avail;
  343. if (head >= tail) avail = head - tail;
  344. else avail = rx_buffer_total_size_ + head - tail;
  345. if (avail <= rts_low_watermark_) rts_assert();
  346. }
  347. return c;
  348. }
  349. int serial6_peek(void)
  350. {
  351. uint32_t head, tail;
  352. head = rx_buffer_head;
  353. tail = rx_buffer_tail;
  354. if (head == tail) return -1;
  355. if (++tail >= rx_buffer_total_size_) tail = 0;
  356. if (tail < SERIAL6_RX_BUFFER_SIZE) {
  357. return rx_buffer[tail];
  358. }
  359. return rx_buffer_storage_[tail-SERIAL6_RX_BUFFER_SIZE];
  360. }
  361. void serial6_clear(void)
  362. {
  363. rx_buffer_head = rx_buffer_tail;
  364. if (rts_pin) rts_assert();
  365. }
  366. // status interrupt combines
  367. // Transmit data below watermark LPUART_STAT_TDRE
  368. // Transmit complete LPUART_STAT_TC
  369. // Idle line LPUART_STAT_IDLE
  370. // Receive data above watermark LPUART_STAT_RDRF
  371. // LIN break detect UART_S2_LBKDIF
  372. // RxD pin active edge UART_S2_RXEDGIF
  373. void lpuart0_status_isr(void)
  374. {
  375. uint32_t head, tail, n;
  376. uint32_t c;
  377. if (LPUART0_STAT & LPUART_STAT_RDRF) {
  378. // if (use9Bits && (UART5_C3 & 0x80)) {
  379. // n = UART5_D | 0x100;
  380. // } else {
  381. // n = UART5_D;
  382. // }
  383. n = LPUART0_DATA & 0x3ff; // use only the 10 data bits
  384. head = rx_buffer_head + 1;
  385. if (head >= rx_buffer_total_size_) head = 0;
  386. if (head != rx_buffer_tail) {
  387. if (head < SERIAL6_RX_BUFFER_SIZE) {
  388. rx_buffer[head] = n;
  389. } else {
  390. rx_buffer_storage_[head-SERIAL6_RX_BUFFER_SIZE] = n;
  391. }
  392. rx_buffer_head = head;
  393. }
  394. if (rts_pin) {
  395. int avail;
  396. tail = tx_buffer_tail;
  397. if (head >= tail) avail = head - tail;
  398. else avail = rx_buffer_total_size_ + head - tail;
  399. if (avail >= rts_high_watermark_) rts_deassert();
  400. }
  401. }
  402. c = LPUART0_CTRL;
  403. if ((c & LPUART_CTRL_TIE) && (LPUART0_STAT & LPUART_STAT_TDRE)) {
  404. head = tx_buffer_head;
  405. tail = tx_buffer_tail;
  406. if (head == tail) {
  407. BITBAND_CLR_BIT(LPUART0_CTRL, TIE_BIT);
  408. BITBAND_SET_BIT(LPUART0_CTRL, TCIE_BIT);
  409. //LPUART0_CTRL &= ~LPUART_CTRL_TIE;
  410. //LPUART0_CTRL |= LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  411. } else {
  412. if (++tail >= tx_buffer_total_size_) tail = 0;
  413. if (tail < SERIAL6_TX_BUFFER_SIZE) {
  414. n = tx_buffer[tail];
  415. } else {
  416. n = tx_buffer_storage_[tail-SERIAL6_TX_BUFFER_SIZE];
  417. }
  418. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  419. LPUART0_DATA = n;
  420. tx_buffer_tail = tail;
  421. }
  422. }
  423. if ((c & LPUART_CTRL_TCIE) && (LPUART0_STAT & LPUART_STAT_TC)) {
  424. transmitting = 0;
  425. if (transmit_pin) transmit_deassert();
  426. BITBAND_CLR_BIT(LPUART0_CTRL, TCIE_BIT);
  427. // LPUART0_CTRL &= ~LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  428. }
  429. }
  430. void serial6_add_memory_for_read(void *buffer, size_t length)
  431. {
  432. rx_buffer_storage_ = (BUFTYPE*)buffer;
  433. if (buffer) {
  434. rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE + length;
  435. } else {
  436. rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE;
  437. }
  438. rts_low_watermark_ = RTS_LOW_WATERMARK + length;
  439. rts_high_watermark_ = RTS_HIGH_WATERMARK + length;
  440. }
  441. void serial6_add_memory_for_write(void *buffer, size_t length)
  442. {
  443. tx_buffer_storage_ = (BUFTYPE*)buffer;
  444. if (buffer) {
  445. tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE + length;
  446. } else {
  447. tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE;
  448. }
  449. }
  450. #endif // HAS_KINETISK_LPUART0