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- #include "kinetis.h"
- #include "core_pins.h"
- #include "HardwareSerial.h"
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- #define TX_BUFFER_SIZE 40
- #define RX_BUFFER_SIZE 64
- #define IRQ_PRIORITY 64
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- #ifdef SERIAL_9BIT_SUPPORT
- static uint8_t use9Bits = 0;
- #define BUFTYPE uint16_t
- #else
- #define BUFTYPE uint8_t
- #define use9Bits 0
- #endif
-
- static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE];
- static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE];
- static volatile uint8_t transmitting = 0;
- static volatile uint8_t *transmit_pin=NULL;
- #if TX_BUFFER_SIZE > 255
- static volatile uint16_t tx_buffer_head = 0;
- static volatile uint16_t tx_buffer_tail = 0;
- #else
- static volatile uint8_t tx_buffer_head = 0;
- static volatile uint8_t tx_buffer_tail = 0;
- #endif
- #if RX_BUFFER_SIZE > 255
- static volatile uint16_t rx_buffer_head = 0;
- static volatile uint16_t rx_buffer_tail = 0;
- #else
- static volatile uint8_t rx_buffer_head = 0;
- static volatile uint8_t rx_buffer_tail = 0;
- #endif
-
-
-
-
- #ifdef KINETISK_UART1_FIFO
- #define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE
- #else
- #define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE
- #endif
- #define C2_TX_ACTIVE C2_ENABLE | UART_C2_TIE
- #define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
- #define C2_TX_INACTIVE C2_ENABLE
-
- void serial2_begin(uint32_t divisor)
- {
- SIM_SCGC4 |= SIM_SCGC4_UART1;
- rx_buffer_head = 0;
- rx_buffer_tail = 0;
- tx_buffer_head = 0;
- tx_buffer_tail = 0;
- transmitting = 0;
- CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
- CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
- #if defined(KINETISK_UART1)
- UART1_BDH = (divisor >> 13) & 0x1F;
- UART1_BDL = (divisor >> 5) & 0xFF;
- UART1_C4 = divisor & 0x1F;
- #ifdef KINETISK_UART1_FIFO
- UART1_C1 = UART_C1_ILT;
- UART1_TWFIFO = 2;
- UART1_RWFIFO = 4;
- UART1_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
- #else
- UART1_C1 = 0;
- UART1_PFIFO = 0;
- #endif
- #elif defined(KINETISL_UART1)
- UART1_BDH = (divisor >> 8) & 0x1F;
- UART1_BDL = divisor & 0xFF;
- UART1_C1 = 0;
- #endif
- UART1_C2 = C2_TX_INACTIVE;
- NVIC_SET_PRIORITY(IRQ_UART1_STATUS, IRQ_PRIORITY);
- NVIC_ENABLE_IRQ(IRQ_UART1_STATUS);
- }
-
- void serial2_format(uint32_t format)
- {
- uint8_t c;
-
- c = UART1_C1;
- c = (c & ~0x13) | (format & 0x03);
- if (format & 0x04) c |= 0x10;
- UART1_C1 = c;
- if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40;
- c = UART1_S2 & ~0x10;
- if (format & 0x10) c |= 0x10;
- UART1_S2 = c;
- c = UART1_C3 & ~0x10;
- if (format & 0x20) c |= 0x10;
- UART1_C3 = c;
- #ifdef SERIAL_9BIT_SUPPORT
- c = UART1_C4 & 0x1F;
- if (format & 0x08) c |= 0x20;
- UART1_C4 = c;
- use9Bits = format & 0x80;
- #endif
-
-
-
-
-
-
- }
-
- void serial2_end(void)
- {
- if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
- while (transmitting) yield();
- NVIC_DISABLE_IRQ(IRQ_UART1_STATUS);
- UART1_C2 = 0;
- CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
- CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
- rx_buffer_head = 0;
- rx_buffer_tail = 0;
- }
-
- void serial2_set_transmit_pin(uint8_t pin)
- {
- while (transmitting) ;
- pinMode(pin, OUTPUT);
- digitalWrite(pin, LOW);
- transmit_pin = portOutputRegister(pin);
- }
-
- void serial2_putchar(uint32_t c)
- {
- uint32_t head, n;
-
- if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
- if (transmit_pin) *transmit_pin = 1;
- head = tx_buffer_head;
- if (++head >= TX_BUFFER_SIZE) head = 0;
- while (tx_buffer_tail == head) {
- int priority = nvic_execution_priority();
- if (priority <= IRQ_PRIORITY) {
- if ((UART1_S1 & UART_S1_TDRE)) {
- uint32_t tail = tx_buffer_tail;
- if (++tail >= TX_BUFFER_SIZE) tail = 0;
- n = tx_buffer[tail];
- if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
- UART1_D = n;
- tx_buffer_tail = tail;
- }
- } else if (priority >= 256) {
- yield();
- }
- }
- tx_buffer[head] = c;
- transmitting = 1;
- tx_buffer_head = head;
- UART1_C2 = C2_TX_ACTIVE;
- }
-
- #ifdef KINETISK_UART1_FIFO
- void serial2_write(const void *buf, unsigned int count)
- {
- const uint8_t *p = (const uint8_t *)buf;
- const uint8_t *end = p + count;
- uint32_t head, n;
-
- if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
- if (transmit_pin) *transmit_pin = 1;
- while (p < end) {
- head = tx_buffer_head;
- if (++head >= TX_BUFFER_SIZE) head = 0;
- if (tx_buffer_tail == head) {
- UART1_C2 = C2_TX_ACTIVE;
- do {
- int priority = nvic_execution_priority();
- if (priority <= IRQ_PRIORITY) {
- if ((UART1_S1 & UART_S1_TDRE)) {
- uint32_t tail = tx_buffer_tail;
- if (++tail >= TX_BUFFER_SIZE) tail = 0;
- n = tx_buffer[tail];
- if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
- UART1_D = n;
- tx_buffer_tail = tail;
- }
- } else if (priority >= 256) {
- yield();
- }
- } while (tx_buffer_tail == head);
- }
- tx_buffer[head] = *p++;
- transmitting = 1;
- tx_buffer_head = head;
- }
- UART1_C2 = C2_TX_ACTIVE;
- }
- #else
- void serial2_write(const void *buf, unsigned int count)
- {
- const uint8_t *p = (const uint8_t *)buf;
- while (count-- > 0) serial2_putchar(*p++);
- }
- #endif
-
- void serial2_flush(void)
- {
- while (transmitting) yield();
- }
-
- int serial2_write_buffer_free(void)
- {
- uint32_t head, tail;
-
- head = tx_buffer_head;
- tail = tx_buffer_tail;
- if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
- return tail - head - 1;
- }
-
- int serial2_available(void)
- {
- uint32_t head, tail;
-
- head = rx_buffer_head;
- tail = rx_buffer_tail;
- if (head >= tail) return head - tail;
- return RX_BUFFER_SIZE + head - tail;
- }
-
- int serial2_getchar(void)
- {
- uint32_t head, tail;
- int c;
-
- head = rx_buffer_head;
- tail = rx_buffer_tail;
- if (head == tail) return -1;
- if (++tail >= RX_BUFFER_SIZE) tail = 0;
- c = rx_buffer[tail];
- rx_buffer_tail = tail;
- return c;
- }
-
- int serial2_peek(void)
- {
- uint32_t head, tail;
-
- head = rx_buffer_head;
- tail = rx_buffer_tail;
- if (head == tail) return -1;
- if (++tail >= RX_BUFFER_SIZE) tail = 0;
- return rx_buffer[tail];
- }
-
- void serial2_clear(void)
- {
- #ifdef KINETISK_UART1_FIFO
- if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
- UART1_C2 &= ~(UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
- UART1_CFIFO = UART_CFIFO_RXFLUSH;
- UART1_C2 |= (UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
- #endif
- rx_buffer_head = rx_buffer_tail;
- }
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- void uart1_status_isr(void)
- {
- uint32_t head, tail, n;
- uint8_t c;
- #ifdef KINETISK_UART1_FIFO
- uint32_t newhead;
- uint8_t avail;
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- if (UART1_S1 & (UART_S1_RDRF | UART_S1_IDLE)) {
- __disable_irq();
- avail = UART1_RCFIFO;
- if (avail == 0) {
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- c = UART1_D;
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- UART1_CFIFO = UART_CFIFO_RXFLUSH;
- __enable_irq();
- } else {
- __enable_irq();
- head = rx_buffer_head;
- tail = rx_buffer_tail;
- do {
- n = UART1_D;
- if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
- newhead = head + 1;
- if (newhead >= RX_BUFFER_SIZE) newhead = 0;
- if (newhead != tail) {
- head = newhead;
- rx_buffer[head] = n;
- }
- } while (--avail > 0);
- rx_buffer_head = head;
- }
- }
- c = UART1_C2;
- if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) {
- head = tx_buffer_head;
- tail = tx_buffer_tail;
- do {
- if (tail == head) break;
- if (++tail >= TX_BUFFER_SIZE) tail = 0;
- avail = UART1_S1;
- n = tx_buffer[tail];
- if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
- UART1_D = n;
- } while (UART1_TCFIFO < 8);
- tx_buffer_tail = tail;
- if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING;
- }
- #else
- if (UART1_S1 & UART_S1_RDRF) {
- n = UART1_D;
- if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
- head = rx_buffer_head + 1;
- if (head >= RX_BUFFER_SIZE) head = 0;
- if (head != rx_buffer_tail) {
- rx_buffer[head] = n;
- rx_buffer_head = head;
- }
- }
- c = UART1_C2;
- if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) {
- head = tx_buffer_head;
- tail = tx_buffer_tail;
- if (head == tail) {
- UART1_C2 = C2_TX_COMPLETING;
- } else {
- if (++tail >= TX_BUFFER_SIZE) tail = 0;
- n = tx_buffer[tail];
- if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
- UART1_D = n;
- tx_buffer_tail = tail;
- }
- }
- #endif
- if ((c & UART_C2_TCIE) && (UART1_S1 & UART_S1_TC)) {
- transmitting = 0;
- if (transmit_pin) *transmit_pin = 0;
- UART1_C2 = C2_TX_INACTIVE;
- }
- }
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