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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2017 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "kinetis.h"
  31. #include "core_pins.h"
  32. #include "HardwareSerial.h"
  33. #ifdef HAS_KINETISK_LPUART0
  34. #define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
  35. #define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
  36. #define BITBAND_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
  37. #define BITBAND_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
  38. #define CTRL_TXDIR_BIT 29
  39. #define CTRL_TIE_BIT 23
  40. #define CTRL_TCIE_BIT 22
  41. #define CTRL_TE_BIT 19
  42. #define CTRL_RE_BIT 18
  43. #define CTRL_LOOPS_BIT 7
  44. #define CTRL_RSRC_BIT 5
  45. ////////////////////////////////////////////////////////////////
  46. // Tunable parameters (relatively safe to edit these numbers)
  47. ////////////////////////////////////////////////////////////////
  48. #ifndef SERIAL6_TX_BUFFER_SIZE
  49. #define SERIAL6_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer
  50. #endif
  51. #ifndef SERIAL6_RX_BUFFER_SIZE
  52. #define SERIAL6_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer
  53. #endif
  54. #define RTS_HIGH_WATERMARK (SERIAL6_RX_BUFFER_SIZE-24) // RTS requests sender to pause
  55. #define RTS_LOW_WATERMARK (SERIAL6_RX_BUFFER_SIZE-38) // RTS allows sender to resume
  56. #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest
  57. ////////////////////////////////////////////////////////////////
  58. // changes not recommended below this point....
  59. ////////////////////////////////////////////////////////////////
  60. #ifdef SERIAL_9BIT_SUPPORT
  61. static uint8_t use9Bits = 0;
  62. #define BUFTYPE uint16_t
  63. #else
  64. #define BUFTYPE uint8_t
  65. #define use9Bits 0
  66. #endif
  67. static volatile BUFTYPE tx_buffer[SERIAL6_TX_BUFFER_SIZE];
  68. static volatile BUFTYPE rx_buffer[SERIAL6_RX_BUFFER_SIZE];
  69. static volatile BUFTYPE *rx_buffer_storage_ = NULL;
  70. static volatile BUFTYPE *tx_buffer_storage_ = NULL;
  71. static size_t tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE;
  72. static size_t rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE;
  73. static size_t rts_low_watermark_ = RTS_LOW_WATERMARK;
  74. static size_t rts_high_watermark_ = RTS_HIGH_WATERMARK;
  75. static volatile uint8_t transmitting = 0;
  76. static volatile uint8_t *transmit_pin=NULL;
  77. #define transmit_assert() *transmit_pin = 1
  78. #define transmit_deassert() *transmit_pin = 0
  79. static volatile uint8_t *rts_pin=NULL;
  80. #define rts_assert() *rts_pin = 0
  81. #define rts_deassert() *rts_pin = 1
  82. #if SERIAL6_TX_BUFFER_SIZE > 255
  83. static volatile uint16_t tx_buffer_head = 0;
  84. static volatile uint16_t tx_buffer_tail = 0;
  85. #else
  86. static volatile uint8_t tx_buffer_head = 0;
  87. static volatile uint8_t tx_buffer_tail = 0;
  88. #endif
  89. #if SERIAL6_RX_BUFFER_SIZE > 255
  90. static volatile uint16_t rx_buffer_head = 0;
  91. static volatile uint16_t rx_buffer_tail = 0;
  92. #else
  93. static volatile uint8_t rx_buffer_head = 0;
  94. static volatile uint8_t rx_buffer_tail = 0;
  95. #endif
  96. static uint8_t tx_pin_num = 48;
  97. void serial6_begin(uint32_t desiredBaudRate)
  98. {
  99. #define F_LPUART_CLOCK_SPEED 48000000 //F_BUS
  100. // Make sure the clock for this uart is enabled, else the registers are not
  101. // vailable.
  102. SIM_SCGC2 |= SIM_SCGC2_LPUART0; // Turn on the clock
  103. // Convert the baud rate to best divisor and OSR, based off of code I found in posting
  104. // try to find an OSR > 4 with the minimum difference from the actual disired baud rate.
  105. uint16_t sbr, sbrTemp, osrCheck;
  106. uint32_t osr, baudDiffCheck, calculatedBaud, baudDiff;
  107. uint32_t clockSpeed;
  108. // First lets figure out what the LPUART Clock speed is.
  109. uint32_t PLLFLLSEL = SIM_SOPT2 & SIM_SOPT2_IRC48SEL; // Note: Bot bits on here
  110. if (PLLFLLSEL == SIM_SOPT2_IRC48SEL)
  111. clockSpeed = 48000000; // Fixed to 48mhz
  112. else if (PLLFLLSEL == SIM_SOPT2_PLLFLLSEL)
  113. clockSpeed = F_PLL; // Using PLL clock
  114. else
  115. clockSpeed = F_CPU/4; // FLL clock, guessing
  116. osr = 4;
  117. sbr = (clockSpeed/(desiredBaudRate * osr));
  118. /*set sbr to 1 if the clockSpeed can not satisfy the desired baud rate*/
  119. if(sbr == 0) {
  120. // Maybe print something.
  121. return; // can not initialize
  122. }
  123. // With integer math the divide*muliply implies the calculated baud will be >= desired baud
  124. calculatedBaud = (clockSpeed / (osr * sbr));
  125. baudDiff = calculatedBaud - desiredBaudRate;
  126. // Check if better off with sbr+1
  127. if (baudDiff != 0) {
  128. calculatedBaud = (clockSpeed / (osr * (sbr + 1)));
  129. baudDiffCheck = desiredBaudRate - calculatedBaud ;
  130. if (baudDiffCheck < baudDiff) {
  131. sbr++; // use the higher sbr
  132. baudDiff = baudDiffCheck;
  133. }
  134. }
  135. // loop to find the best osr value possible, one that generates minimum baudDiff
  136. for (osrCheck = 5; osrCheck <= 32; osrCheck++) {
  137. sbrTemp = (clockSpeed/(desiredBaudRate * osrCheck));
  138. if(sbrTemp == 0)
  139. break; // higher divisor returns 0 so can not use...
  140. // Remember integer math so (X/Y)*Y will always be <=X
  141. calculatedBaud = (clockSpeed / (osrCheck * sbrTemp));
  142. baudDiffCheck = calculatedBaud - desiredBaudRate;
  143. if (baudDiffCheck <= baudDiff) {
  144. baudDiff = baudDiffCheck;
  145. osr = osrCheck;
  146. sbr = sbrTemp;
  147. }
  148. // Lets try the rounded up one as well
  149. if (baudDiffCheck) {
  150. calculatedBaud = (clockSpeed / (osrCheck * ++sbrTemp));
  151. baudDiffCheck = desiredBaudRate - calculatedBaud;
  152. if (baudDiffCheck <= baudDiff) {
  153. baudDiff = baudDiffCheck;
  154. osr = osrCheck;
  155. sbr = sbrTemp;
  156. }
  157. }
  158. }
  159. // for lower OSR <= 7x turn on both edge sampling
  160. uint32_t lpb = LPUART_BAUD_OSR(osr-1) | LPUART_BAUD_SBR(sbr);
  161. if (osr < 8) {
  162. lpb |= LPUART_BAUD_BOTHEDGE;
  163. }
  164. LPUART0_BAUD = lpb;
  165. SIM_SOPT2 |= SIM_SOPT2_LPUARTSRC(1); // Lets use PLL?
  166. rx_buffer_head = 0;
  167. rx_buffer_tail = 0;
  168. tx_buffer_head = 0;
  169. tx_buffer_tail = 0;
  170. transmitting = 0;
  171. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(5);
  172. CORE_PIN48_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(5);
  173. LPUART0_CTRL = 0;
  174. LPUART0_MATCH = 0;
  175. LPUART0_STAT = 0;
  176. // Enable the transmitter, receiver and enable receiver interrupt
  177. LPUART0_CTRL |= LPUART_CTRL_RIE | LPUART_CTRL_TE | LPUART_CTRL_RE;
  178. NVIC_SET_PRIORITY(IRQ_LPUART0, IRQ_PRIORITY);
  179. NVIC_ENABLE_IRQ(IRQ_LPUART0);
  180. }
  181. void serial6_format(uint32_t format)
  182. {
  183. uint32_t c;
  184. // Bits 0-2 - Parity plus 9 bit.
  185. c = LPUART0_CTRL;
  186. //c = (c & ~(LPUART_CTRL_M | LPUART_CTRL_PE | LPUART_CTRL_PT)) | (format & (LPUART_CTRL_PE | LPUART_CTRL_PT)); // configure parity
  187. //if (format & 0x04) c |= LPUART_CTRL_M; // 9 bits (might include parity)
  188. c = (c & ~0x13) | (format & 0x03); // configure parity
  189. if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
  190. LPUART0_CTRL = c;
  191. if ((format & 0x0F) == 0x04) LPUART0_CTRL |= LPUART_CTRL_T8; // 8N2 is 9 bit with 9th bit always 1
  192. // Bit 3 10 bit - Will assume that begin already cleared it.
  193. if (format & 0x08)
  194. LPUART0_BAUD |= LPUART_BAUD_M10;
  195. // Bit 4 RXINVERT
  196. c = LPUART0_STAT & ~LPUART_STAT_RXINV;
  197. if (format & 0x10) c |= LPUART_STAT_RXINV; // rx invert
  198. LPUART0_STAT = c;
  199. // Bit 5 TXINVERT
  200. c = LPUART0_CTRL & ~LPUART_CTRL_TXINV;
  201. if (format & 0x20) c |= LPUART_CTRL_TXINV; // tx invert
  202. LPUART0_CTRL = c;
  203. // For T3.6 See about turning on 2 stop bit mode
  204. if ( format & 0x100) LPUART0_BAUD |= LPUART_BAUD_SBNS;
  205. // process request for half duplex.
  206. if ((format & SERIAL_HALF_DUPLEX) != 0) {
  207. BITBAND_SET_BIT(LPUART0_CTRL, CTRL_LOOPS_BIT);
  208. BITBAND_SET_BIT(LPUART0_CTRL, CTRL_RSRC_BIT);
  209. CORE_PIN48_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(5);
  210. // Lets try to make use of bitband address to set the direction for ue...
  211. transmit_pin = (uint8_t*)GPIO_BITBAND_PTR(LPUART0_CTRL, CTRL_TXDIR_BIT);
  212. } else {
  213. if (transmit_pin == (uint8_t*)GPIO_BITBAND_PTR(LPUART0_CTRL, CTRL_TXDIR_BIT)) transmit_pin = NULL;
  214. BITBAND_CLR_BIT(LPUART0_CTRL, CTRL_LOOPS_BIT);
  215. BITBAND_CLR_BIT(LPUART0_CTRL, CTRL_RSRC_BIT);
  216. }
  217. }
  218. void serial6_end(void)
  219. {
  220. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  221. while (transmitting) yield(); // wait for buffered data to send
  222. NVIC_DISABLE_IRQ(IRQ_LPUART0);
  223. LPUART0_CTRL = 0;
  224. CORE_PIN47_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  225. CORE_PIN48_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  226. rx_buffer_head = 0;
  227. rx_buffer_tail = 0;
  228. if (rts_pin) rts_deassert();
  229. }
  230. void serial6_set_transmit_pin(uint8_t pin)
  231. {
  232. while (transmitting) ;
  233. pinMode(pin, OUTPUT);
  234. digitalWrite(pin, LOW);
  235. transmit_pin = portOutputRegister(pin);
  236. }
  237. void serial6_set_tx(uint8_t pin, uint8_t opendrain)
  238. {
  239. uint32_t cfg;
  240. if (opendrain) pin |= 128;
  241. if (pin == tx_pin_num) return;
  242. if ((SIM_SCGC2 & SIM_SCGC2_LPUART0)) {
  243. switch (tx_pin_num & 127) {
  244. case 48: CORE_PIN48_CONFIG = 0; break; // PTE24
  245. }
  246. if (opendrain) {
  247. cfg = PORT_PCR_DSE | PORT_PCR_ODE;
  248. } else {
  249. cfg = PORT_PCR_DSE | PORT_PCR_SRE;
  250. }
  251. switch (pin & 127) {
  252. case 48: CORE_PIN48_CONFIG = cfg | PORT_PCR_MUX(5); break;
  253. }
  254. }
  255. tx_pin_num = pin;
  256. }
  257. void serial6_set_rx(uint8_t pin)
  258. {
  259. }
  260. int serial6_set_rts(uint8_t pin)
  261. {
  262. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  263. if (pin < CORE_NUM_DIGITAL) {
  264. rts_pin = portOutputRegister(pin);
  265. pinMode(pin, OUTPUT);
  266. rts_assert();
  267. } else {
  268. rts_pin = NULL;
  269. return 0;
  270. }
  271. return 1;
  272. }
  273. int serial6_set_cts(uint8_t pin)
  274. {
  275. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
  276. if (pin == 56) {
  277. CORE_PIN56_CONFIG = PORT_PCR_MUX(5) | PORT_PCR_PE; // weak pulldown
  278. } else {
  279. UART5_MODEM &= ~UART_MODEM_TXCTSE;
  280. return 0;
  281. }
  282. UART5_MODEM |= UART_MODEM_TXCTSE;
  283. return 1;
  284. }
  285. void serial6_putchar(uint32_t c)
  286. {
  287. uint32_t head, n;
  288. if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return;
  289. if (transmit_pin) transmit_assert();
  290. head = tx_buffer_head;
  291. if (++head >= tx_buffer_total_size_) head = 0;
  292. while (tx_buffer_tail == head) {
  293. int priority = nvic_execution_priority();
  294. if (priority <= IRQ_PRIORITY) {
  295. if ((LPUART0_STAT & LPUART_STAT_TDRE)) {
  296. uint32_t tail = tx_buffer_tail;
  297. if (++tail >= tx_buffer_total_size_) tail = 0;
  298. if (tail < SERIAL6_TX_BUFFER_SIZE) {
  299. n = tx_buffer[tail];
  300. } else {
  301. n = tx_buffer_storage_[tail-SERIAL6_TX_BUFFER_SIZE];
  302. }
  303. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  304. LPUART0_DATA = n;
  305. tx_buffer_tail = tail;
  306. }
  307. } else if (priority >= 256) {
  308. yield(); // wait
  309. }
  310. }
  311. tx_buffer[head] = c;
  312. transmitting = 1;
  313. tx_buffer_head = head;
  314. //LPUART0_CTRL |= LPUART_CTRL_TIE; // enable the transmit interrupt
  315. BITBAND_SET_BIT(LPUART0_CTRL, CTRL_TIE_BIT);
  316. }
  317. void serial6_write(const void *buf, unsigned int count)
  318. {
  319. const uint8_t *p = (const uint8_t *)buf;
  320. while (count-- > 0) serial6_putchar(*p++);
  321. }
  322. void serial6_flush(void)
  323. {
  324. while (transmitting) yield(); // wait
  325. }
  326. int serial6_write_buffer_free(void)
  327. {
  328. uint32_t head, tail;
  329. head = tx_buffer_head;
  330. tail = tx_buffer_tail;
  331. if (head >= tail) return tx_buffer_total_size_ - 1 - head + tail;
  332. return tail - head - 1;
  333. }
  334. int serial6_available(void)
  335. {
  336. uint32_t head, tail;
  337. head = rx_buffer_head;
  338. tail = rx_buffer_tail;
  339. if (head >= tail) return head - tail;
  340. return rx_buffer_total_size_ + head - tail;
  341. }
  342. int serial6_getchar(void)
  343. {
  344. uint32_t head, tail;
  345. int c;
  346. head = rx_buffer_head;
  347. tail = rx_buffer_tail;
  348. if (head == tail) return -1;
  349. if (++tail >= rx_buffer_total_size_) tail = 0;
  350. if (tail < SERIAL6_RX_BUFFER_SIZE) {
  351. c = rx_buffer[tail];
  352. } else {
  353. c = rx_buffer_storage_[tail-SERIAL6_RX_BUFFER_SIZE];
  354. }
  355. rx_buffer_tail = tail;
  356. if (rts_pin) {
  357. int avail;
  358. if (head >= tail) avail = head - tail;
  359. else avail = rx_buffer_total_size_ + head - tail;
  360. if (avail <= rts_low_watermark_) rts_assert();
  361. }
  362. return c;
  363. }
  364. int serial6_peek(void)
  365. {
  366. uint32_t head, tail;
  367. head = rx_buffer_head;
  368. tail = rx_buffer_tail;
  369. if (head == tail) return -1;
  370. if (++tail >= rx_buffer_total_size_) tail = 0;
  371. if (tail < SERIAL6_RX_BUFFER_SIZE) {
  372. return rx_buffer[tail];
  373. }
  374. return rx_buffer_storage_[tail-SERIAL6_RX_BUFFER_SIZE];
  375. }
  376. void serial6_clear(void)
  377. {
  378. rx_buffer_head = rx_buffer_tail;
  379. if (rts_pin) rts_assert();
  380. }
  381. // status interrupt combines
  382. // Transmit data below watermark LPUART_STAT_TDRE
  383. // Transmit complete LPUART_STAT_TC
  384. // Idle line LPUART_STAT_IDLE
  385. // Receive data above watermark LPUART_STAT_RDRF
  386. // LIN break detect UART_S2_LBKDIF
  387. // RxD pin active edge UART_S2_RXEDGIF
  388. void lpuart0_status_isr(void)
  389. {
  390. uint32_t head, tail, n;
  391. uint32_t c;
  392. if (LPUART0_STAT & LPUART_STAT_RDRF) {
  393. // if (use9Bits && (UART5_C3 & 0x80)) {
  394. // n = UART5_D | 0x100;
  395. // } else {
  396. // n = UART5_D;
  397. // }
  398. n = LPUART0_DATA & 0x3ff; // use only the 10 data bits
  399. head = rx_buffer_head + 1;
  400. if (head >= rx_buffer_total_size_) head = 0;
  401. if (head != rx_buffer_tail) {
  402. if (head < SERIAL6_RX_BUFFER_SIZE) {
  403. rx_buffer[head] = n;
  404. } else {
  405. rx_buffer_storage_[head-SERIAL6_RX_BUFFER_SIZE] = n;
  406. }
  407. rx_buffer_head = head;
  408. }
  409. if (rts_pin) {
  410. int avail;
  411. tail = tx_buffer_tail;
  412. if (head >= tail) avail = head - tail;
  413. else avail = rx_buffer_total_size_ + head - tail;
  414. if (avail >= rts_high_watermark_) rts_deassert();
  415. }
  416. }
  417. c = LPUART0_CTRL;
  418. if ((c & LPUART_CTRL_TIE) && (LPUART0_STAT & LPUART_STAT_TDRE)) {
  419. head = tx_buffer_head;
  420. tail = tx_buffer_tail;
  421. if (head == tail) {
  422. BITBAND_CLR_BIT(LPUART0_CTRL, CTRL_TIE_BIT);
  423. BITBAND_SET_BIT(LPUART0_CTRL, CTRL_TCIE_BIT);
  424. //LPUART0_CTRL &= ~LPUART_CTRL_TIE;
  425. //LPUART0_CTRL |= LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  426. } else {
  427. if (++tail >= tx_buffer_total_size_) tail = 0;
  428. if (tail < SERIAL6_TX_BUFFER_SIZE) {
  429. n = tx_buffer[tail];
  430. } else {
  431. n = tx_buffer_storage_[tail-SERIAL6_TX_BUFFER_SIZE];
  432. }
  433. //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2);
  434. LPUART0_DATA = n;
  435. tx_buffer_tail = tail;
  436. }
  437. }
  438. if ((c & LPUART_CTRL_TCIE) && (LPUART0_STAT & LPUART_STAT_TC)) {
  439. transmitting = 0;
  440. if (transmit_pin) transmit_deassert();
  441. BITBAND_CLR_BIT(LPUART0_CTRL, CTRL_TCIE_BIT);
  442. // LPUART0_CTRL &= ~LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on...
  443. }
  444. }
  445. void serial6_add_memory_for_read(void *buffer, size_t length)
  446. {
  447. rx_buffer_storage_ = (BUFTYPE*)buffer;
  448. if (buffer) {
  449. rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE + length;
  450. } else {
  451. rx_buffer_total_size_ = SERIAL6_RX_BUFFER_SIZE;
  452. }
  453. rts_low_watermark_ = RTS_LOW_WATERMARK + length;
  454. rts_high_watermark_ = RTS_HIGH_WATERMARK + length;
  455. }
  456. void serial6_add_memory_for_write(void *buffer, size_t length)
  457. {
  458. tx_buffer_storage_ = (BUFTYPE*)buffer;
  459. if (buffer) {
  460. tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE + length;
  461. } else {
  462. tx_buffer_total_size_ = SERIAL6_TX_BUFFER_SIZE;
  463. }
  464. }
  465. #endif // HAS_KINETISK_LPUART0