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@@ -1387,8 +1387,8 @@ public: |
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// More options, so 2 bits |
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pinout &= ~0x30; |
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switch (pin) { |
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case 20: break; |
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case 32: pinout |= 0x10; break; |
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case 32: break; |
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case 20: pinout |= 0x10; break; |
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case 60: pinout |= 0x20; break; |
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} |
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} |
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@@ -1410,8 +1410,8 @@ public: |
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} |
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// SCK |
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switch (pinout & 0x30) { |
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case 0x0: CORE_PIN20_CONFIG = PORT_PCR_MUX(7); break; |
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case 0x10: CORE_PIN32_CONFIG = PORT_PCR_MUX(2); break; |
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case 0x0: CORE_PIN32_CONFIG = PORT_PCR_MUX(2); break; |
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case 0x10: CORE_PIN20_CONFIG = PORT_PCR_MUX(7); break; |
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case 0x20: CORE_PIN60_CONFIG = PORT_PCR_MUX(2); break; |
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} |
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} |
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@@ -1429,8 +1429,8 @@ public: |
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case 0xc: CORE_PIN59_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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} |
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switch (pinout & 0x30) { |
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case 0x0: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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case 0x10: CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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case 0x0: CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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case 0x10: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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case 0x20: CORE_PIN60_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break; |
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} |
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} |