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while (transmitting) yield(); // wait for buffered data to send |
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while (transmitting) yield(); // wait for buffered data to send |
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NVIC_DISABLE_IRQ(IRQ_UART1_STATUS); |
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NVIC_DISABLE_IRQ(IRQ_UART1_STATUS); |
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UART1_C2 = 0; |
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UART1_C2 = 0; |
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CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); |
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CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); |
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switch (rx_pin_num) { |
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case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3 |
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#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5 |
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case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1 |
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#endif |
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} |
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switch (tx_pin_num & 127) { |
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case 10: CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4 |
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#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5 |
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case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0 |
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#endif |
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} |
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rx_buffer_head = 0; |
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rx_buffer_head = 0; |
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rx_buffer_tail = 0; |
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rx_buffer_tail = 0; |
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if (rts_pin) rts_deassert(); |
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if (rts_pin) rts_deassert(); |