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Merge remote-tracking branch 'refs/remotes/PaulStoffregen/master'

main
Defragster 8 years ago
parent
459ac4cfc7 268848cdb0
commit
1e3da4ce9f
10 changed files with 422 additions and 204 deletions
Unified View Show Diff Stats
  1. +4
    -0
      keywords.txt
  2. +43
    -98
      teensy3/analog.c
  3. +58
    -35
      teensy3/avr_emulation.h
  4. +102
    -6
      teensy3/core_pins.h
  5. +1
    -1
      teensy3/kinetis.h
  6. +1
    -1
      teensy3/mk20dx128.c
  7. +62
    -45
      teensy3/pins_arduino.h
  8. +92
    -10
      teensy3/pins_teensy.c
  9. +28
    -6
      teensy3/serial2.c
  10. +31
    -2
      teensy3/serial4.c

+ 4
- 0
keywords.txt View File

A20 LITERAL1 A20 LITERAL1
A21 LITERAL1 A21 LITERAL1
A22 LITERAL1 A22 LITERAL1
A23 LITERAL1
A24 LITERAL1
A25 LITERAL1
A26 LITERAL1
SS LITERAL1 SS LITERAL1
MOSI LITERAL1 MOSI LITERAL1
MISO LITERAL1 MISO LITERAL1

+ 43
- 98
teensy3/analog.c View File

// The SC1A register is used for both software and hardware trigger modes of operation. // The SC1A register is used for both software and hardware trigger modes of operation.


#if defined(__MK20DX128__) #if defined(__MK20DX128__)
static const uint8_t channel2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4,
0, 19, 3, 21, 26, 22, 23
static const uint8_t pin2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, 0, 19, 3, 21, // 0-13 -> A0-A13
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, // 14-23 are A0-A9
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, // 24-33 are digital only
0, 19, 3, 21, // 34-37 are A10-A13
26, // 38 is temp sensor
22, // 39 is vref
23 // 40 is unused analog pin
}; };
#elif defined(__MK20DX256__) #elif defined(__MK20DX256__)
static const uint8_t channel2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4,
0, 19, 3, 19+128, 26, 18+128, 23,
5+192, 5+128, 4+128, 6+128, 7+128, 4+192
// +64 -> use muxA
// +128 -> use ADC1
// A15 26 E1 ADC1_SE5a 5+64
// A16 27 C9 ADC1_SE5b 5
// A17 28 C8 ADC1_SE4b 4
// A18 29 C10 ADC1_SE6b 6
// A19 30 C11 ADC1_SE7b 7
// A20 31 E0 ADC1_SE4a 4+64
static const uint8_t pin2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, 0, 19, 3, 19+128, // 0-13 -> A0-A13
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, // 14-23 are A0-A9
255, 255, // 24-25 are digital only
5+192, 5+128, 4+128, 6+128, 7+128, 4+192, // 26-31 are A15-A20
255, 255, // 32-33 are digital only
0, 19, 3, 19+128, // 34-37 are A10-A13
26, // 38 is temp sensor,
18+128, // 39 is vref
23 // 40 is A14
}; };
#elif defined(__MKL26Z64__) #elif defined(__MKL26Z64__)
static const uint8_t channel2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 11,
0, 4+64, 23, 26, 27
static const uint8_t pin2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 11, 0, 4+64, 23, // 0-12 -> A0-A12
255, // 13 is digital only (no A13 alias)
5, 14, 8, 9, 13, 12, 6, 7, 15, 11, 0, 4+64, 23, // 14-26 are A0-A12
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, // 27-37 unused
26, // 38=temperature
27 // 39=bandgap ref (PMC_REGSC |= PMC_REGSC_BGBE)
}; };
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
static const uint8_t channel2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, // A0-A9
3, 19+128, // A10-A11
// A10 ADC1_DP0/ADC0_DP3
// A11 ADC1_DM0/ADC0_DM3
14+128, 15+128, 17, 18, 4+128, 5+128, 6+128, 7+128, 17+128, // A12-A20
// A12 PTB10 ADC1_SE14
// A13 PTB11 ADC1_SE15
// A14 PTE24 ADC0_SE17
// A15 PTE25 ADC0_SE18
// A16 PTC8 ADC1_SE4b
// A17 PTC9 ADC1_SE5b
// A18 PTC10 ADC1_SE6b
// A19 PTC11 ADC1_SE7b
// A20 PTA17 ADC1_SE17
23, 23+128, 26, 18+128 // A21-A22, temp sensor, vref
// A21 DAC0 ADC0_SE23
// A22 DAC1 ADC1_SE23
static const uint8_t pin2sc1a[] = {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, 3, 19+128, 14+128, 15+128, // 0-13 -> A0-A13
5, 14, 8, 9, 13, 12, 6, 7, 15, 4, // 14-23 are A0-A9
255, 255, 255, 255, 255, 255, 255, // 24-30 are digital only
14+128, 15+128, 17, 18, 4+128, 5+128, 6+128, 7+128, 17+128, // 31-39 are A12-A20
255, 255, 255, 255, 255, 255, 255, 255, 255, // 40-48 are digital only
10+128, 11+128, // 49-50 are A23-A24
255, 255, 255, 255, 255, 255, 255, // 51-57 are digital only
255, 255, 255, 255, 255, 255, // 58-63 (sd card pins) are digital only
3, 19+128, // 64-65 are A10-A11
23, 23+128,// 66-67 are A21-A22 (DAC pins)
1, 1+128, // 68-69 are A25-A26 (unused USB host port on Teensy 3.5)
26, // 70 is Temperature Sensor
18+128 // 71 is Vref
}; };
#endif #endif


int analogRead(uint8_t pin) int analogRead(uint8_t pin)
{ {
int result; int result;
uint8_t index, channel;
uint8_t channel;


//serial_phex(pin); //serial_phex(pin);
//serial_print(" "); //serial_print(" ");


#if defined(__MK20DX128__)
if (pin <= 13) {
index = pin; // 0-13 refer to A0-A13
} else if (pin <= 23) {
index = pin - 14; // 14-23 are A0-A9
} else if (pin >= 34 && pin <= 40) {
index = pin - 24; // 34-37 are A10-A13, 38 is temp sensor,
// 39 is vref, 40 is unused analog pin
} else {
return 0;
}
#elif defined(__MK20DX256__)
if (pin <= 13) {
index = pin; // 0-13 refer to A0-A13
} else if (pin <= 23) {
index = pin - 14; // 14-23 are A0-A9
} else if (pin >= 26 && pin <= 31) {
index = pin - 9; // 26-31 are A15-A20
} else if (pin >= 34 && pin <= 40) {
index = pin - 24; // 34-37 are A10-A13, 38 is temp sensor,
// 39 is vref, 40 is A14
} else {
return 0;
}
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
if (pin <= 13) {
index = pin; // 0-13 refer to A0-A13
} else if (pin <= 23) {
index = pin - 14; // 14-23 are A0-A9
} else if (pin >= 31 && pin <= 39) {
index = pin - 19; // 31-39 are A12-A20
} else if (pin >= 40 && pin <= 41) {
index = pin - 30; // 40-41 are A10-A11
} else if (pin >= 42 && pin <= 45) {
index = pin - 21; // 42-43 are A21-A22, 44 is temp sensor, 45 is vref
} else {
return 0;
}
#elif defined(__MKL26Z64__)
if (pin <= 12) {
index = pin; // 0-12 refer to A0-A12
} else if (pin >= 14 && pin <= 26) {
index = pin - 14; // 14-26 are A0-A12
} else if (pin >= 38 && pin <= 39) {
index = pin - 25; // 38=temperature
// 39=bandgap ref (PMC_REGSC |= PMC_REGSC_BGBE)
} else {
return 0;
}

#endif

//serial_phex(index);
//serial_print(" ");

channel = channel2sc1a[index];
//serial_phex(channel);
//serial_print(" ");
if (pin >= sizeof(pin2sc1a)) return 0;
channel = pin2sc1a[pin];
if (channel == 255) return 0;


//serial_print("analogRead");
//return 0;
if (calibrating) wait_for_cal(); if (calibrating) wait_for_cal();
//pin = 5; // PTD1/SE5b, pin 14, analog 0


#ifdef HAS_KINETIS_ADC1 #ifdef HAS_KINETIS_ADC1
if (channel & 0x80) goto beginADC1; if (channel & 0x80) goto beginADC1;

+ 58
- 35
teensy3/avr_emulation.h View File

return ret; return ret;
} }
inline void setMOSI(uint8_t pin) __attribute__((always_inline)) { inline void setMOSI(uint8_t pin) __attribute__((always_inline)) {
if (pin == 0) pinout &= ~1; // MOSI1 = 0 (PTB16)
if (pin == 21) pinout |= 1; // MOSI1 = 21 (PTD6)
// More options, so 2 bits
pinout &= ~3;
switch (pin) {
case 0: break;
case 21: pinout |= 1; break;
case 61: pinout |= 2; break;
case 59: pinout |= 3; break;
}
} }
inline void setMISO(uint8_t pin) __attribute__((always_inline)) { inline void setMISO(uint8_t pin) __attribute__((always_inline)) {
if (pin == 1) pinout &= ~2; // MISO1 = 1 (PTB17)
if (pin == 5) pinout |= 2; // MISO1 = 5 (PTD7)
// More options, so 2 bits
pinout &= ~0xc;
switch (pin) {
case 1: break;
case 5: pinout |= 0x4; break;
case 61: pinout |= 0x8; break;
case 59: pinout |= 0xc; break;
}
} }
inline void setSCK(uint8_t pin) __attribute__((always_inline)) { inline void setSCK(uint8_t pin) __attribute__((always_inline)) {
if (pin == 20) pinout &= ~4; // SCK = 20 (PTD5)
if (pin == 32) pinout |= 4; // MISO1 = 32 (PTB11)
// More options, so 2 bits
pinout &= ~0x30;
switch (pin) {
case 20: break;
case 32: pinout |= 0x10; break;
case 60: pinout |= 0x20; break;
}
} }
inline void enable_pins(void) __attribute__((always_inline)) { inline void enable_pins(void) __attribute__((always_inline)) {
//serial_print("enable_pins\n"); //serial_print("enable_pins\n");
if ((pinout & 1) == 0) {
CORE_PIN0_CONFIG = PORT_PCR_MUX(2); // MOSI1 = 0 (PTB16)
} else {
CORE_PIN21_CONFIG = PORT_PCR_MUX(7); // MOSI1 = 21 (PTD6)
}
if ((pinout & 2) == 0) {
CORE_PIN1_CONFIG = PORT_PCR_MUX(2); // MISO1 = 1 (PTB17)
} else {
CORE_PIN5_CONFIG = PORT_PCR_MUX(7); // MISO1 = 5 (PTD7)
}
if ((pinout & 4) == 0) {
CORE_PIN20_CONFIG = PORT_PCR_MUX(7); // SCK1 = 20 (PTD5)
} else {
CORE_PIN32_CONFIG = PORT_PCR_MUX(2); // MISO1 = 5 (PTD7)
// MOSI (SOUT)
switch (pinout & 0x3) {
case 0: CORE_PIN0_CONFIG = PORT_PCR_MUX(2); break;
case 1: CORE_PIN21_CONFIG = PORT_PCR_MUX(7); break;
case 2: CORE_PIN61_CONFIG = PORT_PCR_MUX(7); break;
case 3: CORE_PIN59_CONFIG = PORT_PCR_MUX(2); break;
}
// MISO (SIN)
switch (pinout & 0xc) {
case 0x0: CORE_PIN1_CONFIG = PORT_PCR_MUX(2); break;
case 0x4: CORE_PIN5_CONFIG = PORT_PCR_MUX(7); break;
case 0x8: CORE_PIN61_CONFIG = PORT_PCR_MUX(2); break;
case 0xc: CORE_PIN59_CONFIG = PORT_PCR_MUX(7); break;
}
// SCK
switch (pinout & 0x30) {
case 0x0: CORE_PIN20_CONFIG = PORT_PCR_MUX(7); break;
case 0x10: CORE_PIN32_CONFIG = PORT_PCR_MUX(2); break;
case 0x20: CORE_PIN60_CONFIG = PORT_PCR_MUX(2); break;
} }
} }
inline void disable_pins(void) __attribute__((always_inline)) { inline void disable_pins(void) __attribute__((always_inline)) {
//serial_print("disable_pins\n");
if ((pinout & 1) == 0) {
CORE_PIN0_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1);
} else {
CORE_PIN21_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1);
}
if ((pinout & 2) == 0) {
CORE_PIN1_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1);
} else {
CORE_PIN5_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1);
}
if ((pinout & 4) == 0) {
CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); // SCK1 = 20 (PTD5)
} else {
CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); // MISO1 = 5 (PTD7)
switch (pinout & 0x3) {
case 0: CORE_PIN0_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 1: CORE_PIN21_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 2: CORE_PIN61_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 3: CORE_PIN59_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
}
switch (pinout & 0xc) {
case 0x0: CORE_PIN1_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 0x4: CORE_PIN5_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 0x8: CORE_PIN61_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 0xc: CORE_PIN59_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
}
switch (pinout & 0x30) {
case 0x0: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 0x10: CORE_PIN32_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
case 0x20: CORE_PIN60_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
} }
} }
friend class SPIFIFO1class; friend class SPIFIFO1class;

+ 102
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teensy3/core_pins.h View File

#include "kinetis.h" #include "kinetis.h"
#include "pins_arduino.h" #include "pins_arduino.h"



#define HIGH 1 #define HIGH 1
#define LOW 0 #define LOW 0
#define INPUT 0 #define INPUT 0
#define CORE_NUM_INTERRUPT 24 // really only 18, but 6 "holes" #define CORE_NUM_INTERRUPT 24 // really only 18, but 6 "holes"
#define CORE_NUM_ANALOG 13 #define CORE_NUM_ANALOG 13
#define CORE_NUM_PWM 10 #define CORE_NUM_PWM 10
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define CORE_NUM_TOTAL_PINS 58
#define CORE_NUM_DIGITAL 58
#define CORE_NUM_INTERRUPT 58
#define CORE_NUM_ANALOG 23
#elif defined(__MK64FX512__)
#define CORE_NUM_TOTAL_PINS 64
#define CORE_NUM_DIGITAL 64
#define CORE_NUM_INTERRUPT 64
#define CORE_NUM_ANALOG 27
#define CORE_NUM_PWM 20 #define CORE_NUM_PWM 20
#elif defined(__MK66FX1M0__)
#define CORE_NUM_TOTAL_PINS 64
#define CORE_NUM_DIGITAL 64
#define CORE_NUM_INTERRUPT 64
#define CORE_NUM_ANALOG 25
#define CORE_NUM_PWM 22
#endif #endif


#if defined(__MK20DX128__) || defined(__MK20DX256__) #if defined(__MK20DX128__) || defined(__MK20DX256__)
#define CORE_PIN55_BIT 11 #define CORE_PIN55_BIT 11
#define CORE_PIN56_BIT 10 #define CORE_PIN56_BIT 10
#define CORE_PIN57_BIT 11 #define CORE_PIN57_BIT 11
#define CORE_PIN58_BIT 0
#define CORE_PIN59_BIT 1
#define CORE_PIN60_BIT 2
#define CORE_PIN61_BIT 3
#define CORE_PIN62_BIT 4
#define CORE_PIN63_BIT 5


#define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT)) #define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT))
#define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT)) #define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT))
#define CORE_PIN55_BITMASK (1<<(CORE_PIN55_BIT)) #define CORE_PIN55_BITMASK (1<<(CORE_PIN55_BIT))
#define CORE_PIN56_BITMASK (1<<(CORE_PIN56_BIT)) #define CORE_PIN56_BITMASK (1<<(CORE_PIN56_BIT))
#define CORE_PIN57_BITMASK (1<<(CORE_PIN57_BIT)) #define CORE_PIN57_BITMASK (1<<(CORE_PIN57_BIT))
#define CORE_PIN58_BITMASK (1<<(CORE_PIN58_BIT))
#define CORE_PIN59_BITMASK (1<<(CORE_PIN59_BIT))
#define CORE_PIN60_BITMASK (1<<(CORE_PIN60_BIT))
#define CORE_PIN61_BITMASK (1<<(CORE_PIN61_BIT))
#define CORE_PIN62_BITMASK (1<<(CORE_PIN62_BIT))
#define CORE_PIN63_BITMASK (1<<(CORE_PIN63_BIT))



#define CORE_PIN0_PORTREG GPIOB_PDOR #define CORE_PIN0_PORTREG GPIOB_PDOR
#define CORE_PIN1_PORTREG GPIOB_PDOR #define CORE_PIN1_PORTREG GPIOB_PDOR
#define CORE_PIN55_PORTREG GPIOD_PDOR #define CORE_PIN55_PORTREG GPIOD_PDOR
#define CORE_PIN56_PORTREG GPIOE_PDOR #define CORE_PIN56_PORTREG GPIOE_PDOR
#define CORE_PIN57_PORTREG GPIOE_PDOR #define CORE_PIN57_PORTREG GPIOE_PDOR
#define CORE_PIN58_PORTREG GPIOE_PDOR
#define CORE_PIN59_PORTREG GPIOE_PDOR
#define CORE_PIN60_PORTREG GPIOE_PDOR
#define CORE_PIN61_PORTREG GPIOE_PDOR
#define CORE_PIN62_PORTREG GPIOE_PDOR
#define CORE_PIN63_PORTREG GPIOE_PDOR


#define CORE_PIN0_PORTSET GPIOB_PSOR #define CORE_PIN0_PORTSET GPIOB_PSOR
#define CORE_PIN1_PORTSET GPIOB_PSOR #define CORE_PIN1_PORTSET GPIOB_PSOR
#define CORE_PIN55_PORTSET GPIOD_PSOR #define CORE_PIN55_PORTSET GPIOD_PSOR
#define CORE_PIN56_PORTSET GPIOE_PSOR #define CORE_PIN56_PORTSET GPIOE_PSOR
#define CORE_PIN57_PORTSET GPIOE_PSOR #define CORE_PIN57_PORTSET GPIOE_PSOR
#define CORE_PIN58_PORTSET GPIOE_PSOR
#define CORE_PIN59_PORTSET GPIOE_PSOR
#define CORE_PIN60_PORTSET GPIOE_PSOR
#define CORE_PIN61_PORTSET GPIOE_PSOR
#define CORE_PIN62_PORTSET GPIOE_PSOR
#define CORE_PIN63_PORTSET GPIOE_PSOR


#define CORE_PIN0_PORTCLEAR GPIOB_PCOR #define CORE_PIN0_PORTCLEAR GPIOB_PCOR
#define CORE_PIN1_PORTCLEAR GPIOB_PCOR #define CORE_PIN1_PORTCLEAR GPIOB_PCOR
#define CORE_PIN55_PORTCLEAR GPIOD_PCOR #define CORE_PIN55_PORTCLEAR GPIOD_PCOR
#define CORE_PIN56_PORTCLEAR GPIOE_PCOR #define CORE_PIN56_PORTCLEAR GPIOE_PCOR
#define CORE_PIN57_PORTCLEAR GPIOE_PCOR #define CORE_PIN57_PORTCLEAR GPIOE_PCOR
#define CORE_PIN58_PORTCLEAR GPIOE_PCOR
#define CORE_PIN59_PORTCLEAR GPIOE_PCOR
#define CORE_PIN60_PORTCLEAR GPIOE_PCOR
#define CORE_PIN61_PORTCLEAR GPIOE_PCOR
#define CORE_PIN62_PORTCLEAR GPIOE_PCOR
#define CORE_PIN63_PORTCLEAR GPIOE_PCOR


#define CORE_PIN0_DDRREG GPIOB_PDDR #define CORE_PIN0_DDRREG GPIOB_PDDR
#define CORE_PIN1_DDRREG GPIOB_PDDR #define CORE_PIN1_DDRREG GPIOB_PDDR
#define CORE_PIN55_DDRREG GPIOD_PDDR #define CORE_PIN55_DDRREG GPIOD_PDDR
#define CORE_PIN56_DDRREG GPIOE_PDDR #define CORE_PIN56_DDRREG GPIOE_PDDR
#define CORE_PIN57_DDRREG GPIOE_PDDR #define CORE_PIN57_DDRREG GPIOE_PDDR
#define CORE_PIN58_DDRREG GPIOE_PDDR
#define CORE_PIN59_DDRREG GPIOE_PDDR
#define CORE_PIN60_DDRREG GPIOE_PDDR
#define CORE_PIN61_DDRREG GPIOE_PDDR
#define CORE_PIN62_DDRREG GPIOE_PDDR
#define CORE_PIN63_DDRREG GPIOE_PDDR


#define CORE_PIN0_PINREG GPIOB_PDIR #define CORE_PIN0_PINREG GPIOB_PDIR
#define CORE_PIN1_PINREG GPIOB_PDIR #define CORE_PIN1_PINREG GPIOB_PDIR
#define CORE_PIN55_PINREG GPIOD_PDIR #define CORE_PIN55_PINREG GPIOD_PDIR
#define CORE_PIN56_PINREG GPIOE_PDIR #define CORE_PIN56_PINREG GPIOE_PDIR
#define CORE_PIN57_PINREG GPIOE_PDIR #define CORE_PIN57_PINREG GPIOE_PDIR
#define CORE_PIN58_PINREG GPIOE_PDIR
#define CORE_PIN59_PINREG GPIOE_PDIR
#define CORE_PIN60_PINREG GPIOE_PDIR
#define CORE_PIN61_PINREG GPIOE_PDIR
#define CORE_PIN62_PINREG GPIOE_PDIR
#define CORE_PIN63_PINREG GPIOE_PDIR


#define CORE_PIN0_CONFIG PORTB_PCR16 #define CORE_PIN0_CONFIG PORTB_PCR16
#define CORE_PIN1_CONFIG PORTB_PCR17 #define CORE_PIN1_CONFIG PORTB_PCR17
#define CORE_PIN55_CONFIG PORTD_PCR11 #define CORE_PIN55_CONFIG PORTD_PCR11
#define CORE_PIN56_CONFIG PORTE_PCR10 #define CORE_PIN56_CONFIG PORTE_PCR10
#define CORE_PIN57_CONFIG PORTE_PCR11 #define CORE_PIN57_CONFIG PORTE_PCR11
#define CORE_PIN58_CONFIG PORTE_PCR0
#define CORE_PIN59_CONFIG PORTE_PCR1
#define CORE_PIN60_CONFIG PORTE_PCR2
#define CORE_PIN61_CONFIG PORTE_PCR3
#define CORE_PIN62_CONFIG PORTE_PCR4
#define CORE_PIN63_CONFIG PORTE_PCR5


#define CORE_ADC0_PIN 14 #define CORE_ADC0_PIN 14
#define CORE_ADC1_PIN 15 #define CORE_ADC1_PIN 15
#define CORE_INT55_PIN 55 #define CORE_INT55_PIN 55
#define CORE_INT56_PIN 56 #define CORE_INT56_PIN 56
#define CORE_INT57_PIN 57 #define CORE_INT57_PIN 57
#define CORE_INT58_PIN 58
#define CORE_INT59_PIN 59
#define CORE_INT60_PIN 60
#define CORE_INT61_PIN 61
#define CORE_INT62_PIN 62
#define CORE_INT63_PIN 63
#define CORE_INT_EVERY_PIN 1 #define CORE_INT_EVERY_PIN 1


#endif #endif
CORE_PIN56_PORTSET = CORE_PIN56_BITMASK; CORE_PIN56_PORTSET = CORE_PIN56_BITMASK;
} else if (pin == 57) { } else if (pin == 57) {
CORE_PIN57_PORTSET = CORE_PIN57_BITMASK; CORE_PIN57_PORTSET = CORE_PIN57_BITMASK;
} else if (pin == 58) {
CORE_PIN58_PORTSET = CORE_PIN58_BITMASK;
} else if (pin == 59) {
CORE_PIN59_PORTSET = CORE_PIN59_BITMASK;
} else if (pin == 60) {
CORE_PIN60_PORTSET = CORE_PIN60_BITMASK;
} else if (pin == 61) {
CORE_PIN61_PORTSET = CORE_PIN61_BITMASK;
} else if (pin == 62) {
CORE_PIN62_PORTSET = CORE_PIN62_BITMASK;
} else if (pin == 63) {
CORE_PIN63_PORTSET = CORE_PIN63_BITMASK;
} }
#endif #endif
} else { } else {
CORE_PIN56_PORTCLEAR = CORE_PIN56_BITMASK; CORE_PIN56_PORTCLEAR = CORE_PIN56_BITMASK;
} else if (pin == 57) { } else if (pin == 57) {
CORE_PIN57_PORTCLEAR = CORE_PIN57_BITMASK; CORE_PIN57_PORTCLEAR = CORE_PIN57_BITMASK;
} else if (pin == 58) {
CORE_PIN58_PORTCLEAR = CORE_PIN58_BITMASK;
} else if (pin == 59) {
CORE_PIN59_PORTCLEAR = CORE_PIN59_BITMASK;
} else if (pin == 60) {
CORE_PIN60_PORTCLEAR = CORE_PIN60_BITMASK;
} else if (pin == 61) {
CORE_PIN61_PORTCLEAR = CORE_PIN61_BITMASK;
} else if (pin == 62) {
CORE_PIN62_PORTCLEAR = CORE_PIN62_BITMASK;
} else if (pin == 63) {
CORE_PIN63_PORTCLEAR = CORE_PIN63_BITMASK;
} }
#endif #endif
} }
return (CORE_PIN56_PINREG & CORE_PIN56_BITMASK) ? 1 : 0; return (CORE_PIN56_PINREG & CORE_PIN56_BITMASK) ? 1 : 0;
} else if (pin == 57) { } else if (pin == 57) {
return (CORE_PIN57_PINREG & CORE_PIN57_BITMASK) ? 1 : 0; return (CORE_PIN57_PINREG & CORE_PIN57_BITMASK) ? 1 : 0;
} else if (pin == 58) {
return (CORE_PIN58_PINREG & CORE_PIN58_BITMASK) ? 1 : 0;
} else if (pin == 59) {
return (CORE_PIN59_PINREG & CORE_PIN59_BITMASK) ? 1 : 0;
} else if (pin == 60) {
return (CORE_PIN60_PINREG & CORE_PIN60_BITMASK) ? 1 : 0;
} else if (pin == 61) {
return (CORE_PIN61_PINREG & CORE_PIN61_BITMASK) ? 1 : 0;
} else if (pin == 62) {
return (CORE_PIN62_PINREG & CORE_PIN62_BITMASK) ? 1 : 0;
} else if (pin == 63) {
return (CORE_PIN63_PINREG & CORE_PIN63_BITMASK) ? 1 : 0;
} }
#endif #endif
else { else {

+ 1
- 1
teensy3/kinetis.h View File

#define DMAMUX_SOURCE_I2S0_RX 12 #define DMAMUX_SOURCE_I2S0_RX 12
#define DMAMUX_SOURCE_I2S0_TX 13 #define DMAMUX_SOURCE_I2S0_TX 13
#define DMAMUX_SOURCE_SPI0_RX 14 #define DMAMUX_SOURCE_SPI0_RX 14
#define DMAMUX_SOURCE_SPI0_TX 14
#define DMAMUX_SOURCE_SPI0_TX 15
#define DMAMUX_SOURCE_SPI1_RX 16 #define DMAMUX_SOURCE_SPI1_RX 16
#define DMAMUX_SOURCE_SPI1_TX 17 #define DMAMUX_SOURCE_SPI1_TX 17
#define DMAMUX_SOURCE_I2C0 18 #define DMAMUX_SOURCE_I2C0 18

+ 1
- 1
teensy3/mk20dx128.c View File

#else #else
#if defined(KINETISK) #if defined(KINETISK)
// enable capacitors for crystal // enable capacitors for crystal
OSC0_CR = OSC_SC8P | OSC_SC2P;
OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN;
#elif defined(KINETISL) #elif defined(KINETISL)
// enable capacitors for crystal // enable capacitors for crystal
OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN; OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN;

+ 62
- 45
teensy3/pins_arduino.h View File

#define PIN_A7 (21) #define PIN_A7 (21)
#define PIN_A8 (22) #define PIN_A8 (22)
#define PIN_A9 (23) #define PIN_A9 (23)
const static uint8_t A0 = 14;
const static uint8_t A1 = 15;
const static uint8_t A2 = 16;
const static uint8_t A3 = 17;
const static uint8_t A4 = 18;
const static uint8_t A5 = 19;
const static uint8_t A6 = 20;
const static uint8_t A7 = 21;
const static uint8_t A8 = 22;
const static uint8_t A9 = 23;
const static uint8_t A0 = PIN_A0;
const static uint8_t A1 = PIN_A1;
const static uint8_t A2 = PIN_A2;
const static uint8_t A3 = PIN_A3;
const static uint8_t A4 = PIN_A4;
const static uint8_t A5 = PIN_A5;
const static uint8_t A6 = PIN_A6;
const static uint8_t A7 = PIN_A7;
const static uint8_t A8 = PIN_A8;
const static uint8_t A9 = PIN_A9;


#if defined(__MK20DX128__) #if defined(__MK20DX128__)
#define PIN_A10 (34) #define PIN_A10 (34)
#define PIN_A11 (35) #define PIN_A11 (35)
#define PIN_A12 (36) #define PIN_A12 (36)
#define PIN_A13 (37) #define PIN_A13 (37)
const static uint8_t A10 = 34;
const static uint8_t A11 = 35;
const static uint8_t A12 = 36;
const static uint8_t A13 = 37;
const static uint8_t A10 = PIN_A10;
const static uint8_t A11 = PIN_A11;
const static uint8_t A12 = PIN_A12;
const static uint8_t A13 = PIN_A13;


#elif defined(__MK20DX256__) #elif defined(__MK20DX256__)
#define PIN_A10 (34) #define PIN_A10 (34)
#define PIN_A18 (29) #define PIN_A18 (29)
#define PIN_A19 (30) #define PIN_A19 (30)
#define PIN_A20 (31) #define PIN_A20 (31)
const static uint8_t A10 = 34;
const static uint8_t A11 = 35;
const static uint8_t A12 = 36;
const static uint8_t A13 = 37;
const static uint8_t A14 = 40;
const static uint8_t A15 = 26;
const static uint8_t A16 = 27;
const static uint8_t A17 = 28;
const static uint8_t A18 = 29;
const static uint8_t A19 = 30;
const static uint8_t A20 = 31;
const static uint8_t A10 = PIN_A10;
const static uint8_t A11 = PIN_A11;
const static uint8_t A12 = PIN_A12;
const static uint8_t A13 = PIN_A13;
const static uint8_t A14 = PIN_A14;
const static uint8_t A15 = PIN_A15;
const static uint8_t A16 = PIN_A16;
const static uint8_t A17 = PIN_A17;
const static uint8_t A18 = PIN_A18;
const static uint8_t A19 = PIN_A19;
const static uint8_t A20 = PIN_A20;


#elif defined(__MKL26Z64__) #elif defined(__MKL26Z64__)
#define PIN_A10 (24) #define PIN_A10 (24)
#define PIN_A11 (25) #define PIN_A11 (25)
#define PIN_A12 (26) #define PIN_A12 (26)
const static uint8_t A10 = 24;
const static uint8_t A11 = 25;
const static uint8_t A12 = 26;
const static uint8_t A10 = PIN_A10;
const static uint8_t A11 = PIN_A11;
const static uint8_t A12 = PIN_A12;


#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define PIN_A10 (40)
#define PIN_A11 (41)
#define PIN_A10 (64)
#define PIN_A11 (65)
#define PIN_A12 (31) #define PIN_A12 (31)
#define PIN_A13 (32) #define PIN_A13 (32)
#define PIN_A14 (33) #define PIN_A14 (33)
#define PIN_A18 (37) #define PIN_A18 (37)
#define PIN_A19 (38) #define PIN_A19 (38)
#define PIN_A20 (39) #define PIN_A20 (39)
#define PIN_A21 (42)
#define PIN_A22 (43)
const static uint8_t A10 = 40;
const static uint8_t A11 = 41;
const static uint8_t A12 = 31;
const static uint8_t A13 = 32;
const static uint8_t A14 = 33;
const static uint8_t A15 = 34;
const static uint8_t A16 = 35;
const static uint8_t A17 = 36;
const static uint8_t A18 = 37;
const static uint8_t A19 = 38;
const static uint8_t A20 = 39;
const static uint8_t A21 = 42;
const static uint8_t A22 = 43;
#define PIN_A21 (66)
#define PIN_A22 (67)
#define PIN_A23 (49)
#define PIN_A24 (50)
#define PIN_A25 (68)
#define PIN_A26 (69)
const static uint8_t A10 = PIN_A10;
const static uint8_t A11 = PIN_A11;
const static uint8_t A12 = PIN_A12;
const static uint8_t A13 = PIN_A13;
const static uint8_t A14 = PIN_A14;
const static uint8_t A15 = PIN_A15;
const static uint8_t A16 = PIN_A16;
const static uint8_t A17 = PIN_A17;
const static uint8_t A18 = PIN_A18;
const static uint8_t A19 = PIN_A19;
const static uint8_t A20 = PIN_A20;
const static uint8_t A21 = PIN_A21;
const static uint8_t A22 = PIN_A22;
const static uint8_t A23 = PIN_A23;
const static uint8_t A24 = PIN_A24;
const static uint8_t A25 = PIN_A25;
const static uint8_t A26 = PIN_A26;
#endif #endif


#define LED_BUILTIN (13) #define LED_BUILTIN (13)
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 16 || (p) == 17 || (p) == 20 || (p) == 22 || (p) == 23) #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 16 || (p) == 17 || (p) == 20 || (p) == 22 || (p) == 23)
#define digitalPinToInterrupt(p) ((((p) >= 2 && (p) <= 15) || ((p) >= 20 && (p) <= 23)) ? (p) : -1) #define digitalPinToInterrupt(p) ((((p) >= 2 && (p) <= 15) || ((p) >= 20 && (p) <= 23)) ? (p) : -1)
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) #elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
// TODO analogInputToDigitalPin needs update...
#define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) >= 12 && (p) <= 20) ? (p) + 19 : -1)) #define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) >= 12 && (p) <= 20) ? (p) + 19 : -1))
#define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 10) || (p) == 14 || ((p) >= 20 && (p) <= 23) || (p) == 29 || (p) == 30 || ((p) >= 35 && (p) <= 38)) #define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 10) || (p) == 14 || ((p) >= 20 && (p) <= 23) || (p) == 29 || (p) == 30 || ((p) >= 35 && (p) <= 38))
#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) #define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1)
#define SERIAL_PORT_HARDWARE_OPEN Serial1 #define SERIAL_PORT_HARDWARE_OPEN Serial1
#define SERIAL_PORT_HARDWARE_OPEN1 Serial2 #define SERIAL_PORT_HARDWARE_OPEN1 Serial2
#define SERIAL_PORT_HARDWARE_OPEN2 Serial3 #define SERIAL_PORT_HARDWARE_OPEN2 Serial3
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define SERIAL_PORT_HARDWARE3 Serial4
#define SERIAL_PORT_HARDWARE4 Serial5
#define SERIAL_PORT_HARDWARE5 Serial6
#define SERIAL_PORT_HARDWARE_OPEN3 Serial4
#define SERIAL_PORT_HARDWARE_OPEN4 Serial5
#define SERIAL_PORT_HARDWARE_OPEN5 Serial6
#endif


#define SerialUSB Serial #define SerialUSB Serial



+ 92
- 10
teensy3/pins_teensy.c View File

{GPIO_BITBAND_PTR(CORE_PIN55_PORTREG, CORE_PIN55_BIT), &CORE_PIN55_CONFIG}, {GPIO_BITBAND_PTR(CORE_PIN55_PORTREG, CORE_PIN55_BIT), &CORE_PIN55_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN56_PORTREG, CORE_PIN56_BIT), &CORE_PIN56_CONFIG}, {GPIO_BITBAND_PTR(CORE_PIN56_PORTREG, CORE_PIN56_BIT), &CORE_PIN56_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN57_PORTREG, CORE_PIN57_BIT), &CORE_PIN57_CONFIG}, {GPIO_BITBAND_PTR(CORE_PIN57_PORTREG, CORE_PIN57_BIT), &CORE_PIN57_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN58_PORTREG, CORE_PIN58_BIT), &CORE_PIN58_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN59_PORTREG, CORE_PIN59_BIT), &CORE_PIN59_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN60_PORTREG, CORE_PIN60_BIT), &CORE_PIN60_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN61_PORTREG, CORE_PIN61_BIT), &CORE_PIN61_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN62_PORTREG, CORE_PIN62_BIT), &CORE_PIN62_CONFIG},
{GPIO_BITBAND_PTR(CORE_PIN63_PORTREG, CORE_PIN63_BIT), &CORE_PIN63_CONFIG},
#endif #endif
}; };


if ((isfr & CORE_PIN34_BITMASK) && intFunc[34]) intFunc[34](); if ((isfr & CORE_PIN34_BITMASK) && intFunc[34]) intFunc[34]();
if ((isfr & CORE_PIN56_BITMASK) && intFunc[56]) intFunc[56](); if ((isfr & CORE_PIN56_BITMASK) && intFunc[56]) intFunc[56]();
if ((isfr & CORE_PIN57_BITMASK) && intFunc[57]) intFunc[57](); if ((isfr & CORE_PIN57_BITMASK) && intFunc[57]) intFunc[57]();
if ((isfr & CORE_PIN58_BITMASK) && intFunc[58]) intFunc[58]();
if ((isfr & CORE_PIN59_BITMASK) && intFunc[59]) intFunc[59]();
if ((isfr & CORE_PIN60_BITMASK) && intFunc[60]) intFunc[60]();
if ((isfr & CORE_PIN61_BITMASK) && intFunc[61]) intFunc[61]();
if ((isfr & CORE_PIN62_BITMASK) && intFunc[62]) intFunc[62]();
if ((isfr & CORE_PIN63_BITMASK) && intFunc[63]) intFunc[63]();
} }


#endif #endif
FTM3_C0SC = 0x28; FTM3_C0SC = 0x28;
FTM3_C1SC = 0x28; FTM3_C1SC = 0x28;
FTM3_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); FTM3_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
#endif
#if defined(__MK66FX1M0__)
SIM_SCGC2 |= SIM_SCGC2_TPM1;
SIM_SOPT2 |= SIM_SOPT2_TPMSRC(2);
TPM1_CNT = 0;
TPM1_MOD = 32767;
TPM1_C0SC = 0x28;
TPM1_C1SC = 0x28;
TPM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
#endif #endif
analog_init(); analog_init();
// for background about this startup delay, please see this conversation
// for background about this startup delay, please see these conversations
// https://forum.pjrc.com/threads/36606-startup-time-(400ms)?p=113980&viewfull=1#post113980
// https://forum.pjrc.com/threads/31290-Teensey-3-2-Teensey-Loader-1-24-Issues?p=87273&viewfull=1#post87273 // https://forum.pjrc.com/threads/31290-Teensey-3-2-Teensey-Loader-1-24-Issues?p=87273&viewfull=1#post87273
delay(400); delay(400);
usb_init(); usb_init();
#define FTM1_CH1_PIN 17 #define FTM1_CH1_PIN 17
#define FTM2_CH0_PIN 3 #define FTM2_CH0_PIN 3
#define FTM2_CH1_PIN 4 #define FTM2_CH1_PIN 4
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
#elif defined(__MK64FX512__)
#define FTM0_CH0_PIN 22
#define FTM0_CH1_PIN 23
#define FTM0_CH2_PIN 9
#define FTM0_CH3_PIN 10
#define FTM0_CH4_PIN 6
#define FTM0_CH5_PIN 20
#define FTM0_CH6_PIN 21
#define FTM0_CH7_PIN 5
#define FTM1_CH0_PIN 3
#define FTM1_CH1_PIN 4
#define FTM2_CH0_PIN 29
#define FTM2_CH1_PIN 30
#define FTM3_CH0_PIN 2
#define FTM3_CH1_PIN 14
#define FTM3_CH2_PIN 7
#define FTM3_CH3_PIN 8
#define FTM3_CH4_PIN 35
#define FTM3_CH5_PIN 36
#define FTM3_CH6_PIN 37
#define FTM3_CH7_PIN 38
#elif defined(__MK66FX1M0__)
#define FTM0_CH0_PIN 22 #define FTM0_CH0_PIN 22
#define FTM0_CH1_PIN 23 #define FTM0_CH1_PIN 23
#define FTM0_CH2_PIN 9 #define FTM0_CH2_PIN 9
#define FTM3_CH5_PIN 36 #define FTM3_CH5_PIN 36
#define FTM3_CH6_PIN 37 #define FTM3_CH6_PIN 37
#define FTM3_CH7_PIN 38 #define FTM3_CH7_PIN 38
#define TPM1_CH0_PIN 16
#define TPM1_CH1_PIN 17
#endif #endif
#define FTM_PINCFG(pin) FTM_PINCFG2(pin) #define FTM_PINCFG(pin) FTM_PINCFG2(pin)
#define FTM_PINCFG2(pin) CORE_PIN ## pin ## _CONFIG #define FTM_PINCFG2(pin) CORE_PIN ## pin ## _CONFIG
#if defined(FTM2_CH0_PIN) #if defined(FTM2_CH0_PIN)
} else if (pin == FTM2_CH0_PIN || pin == FTM2_CH1_PIN) { } else if (pin == FTM2_CH0_PIN || pin == FTM2_CH1_PIN) {
cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res; cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res;
#endif
#if defined(FTM3_CH0_PIN)
} else if (pin == FTM3_CH0_PIN || pin == FTM3_CH1_PIN || pin == FTM3_CH2_PIN
|| pin == FTM3_CH3_PIN || pin == FTM3_CH4_PIN || pin == FTM3_CH5_PIN
|| pin == FTM3_CH6_PIN || pin == FTM3_CH7_PIN) {
cval = ((uint32_t)val * (uint32_t)(FTM3_MOD + 1)) >> analog_write_res;
#endif
#if defined(TPM1_CH0_PIN)
} else if (pin == TPM1_CH0_PIN || pin == TPM1_CH1_PIN) {
cval = ((uint32_t)val * (uint32_t)(TPM1_MOD + 1)) >> analog_write_res;
#endif #endif
} else { } else {
cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res; cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res;
FTM3_C7V = cval; FTM3_C7V = cval;
FTM_PINCFG(FTM3_CH7_PIN) = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; FTM_PINCFG(FTM3_CH7_PIN) = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
break; break;
#endif
#ifdef TPM1_CH0_PIN
case TPM1_CH0_PIN:
TPM1_C0V = cval;
FTM_PINCFG(TPM1_CH0_PIN) = PORT_PCR_MUX(6) | PORT_PCR_DSE | PORT_PCR_SRE;
break;
#endif
#ifdef TPM1_CH1_PIN
case TPM1_CH1_PIN:
TPM1_C1V = cval;
FTM_PINCFG(TPM1_CH1_PIN) = PORT_PCR_MUX(6) | PORT_PCR_DSE | PORT_PCR_SRE;
break;
#endif #endif
default: default:
digitalWrite(pin, (val > 127) ? HIGH : LOW); digitalWrite(pin, (val > 127) ? HIGH : LOW);
//serial_print(", freq = "); //serial_print(", freq = ");
//serial_phex32((uint32_t)frequency); //serial_phex32((uint32_t)frequency);
//serial_print("\n"); //serial_print("\n");
if (frequency < (float)(F_TIMER >> 7) / 65536.0f) { //If frequency is too low for working with F_TIMER:
ftmClockSource = 2; //Use alternative 31250Hz clock source
ftmClock = 31250; //Set variable for the actual timer clock frequency
} else { //Else do as before:
ftmClockSource = 1; //Use default F_Timer clock source
ftmClock = F_TIMER; //Set variable for the actual timer clock frequency
}

#ifdef TPM1_CH0_PIN
if (pin == TPM1_CH0_PIN || pin == TPM1_CH1_PIN) {
ftmClockSource = 1;
ftmClock = 16000000;
} else
#endif
if (frequency < (float)(F_TIMER >> 7) / 65536.0f) {
// frequency is too low for working with F_TIMER:
ftmClockSource = 2; // Use alternative 31250Hz clock source
ftmClock = 31250; // Set variable for the actual timer clock frequency
} else {
ftmClockSource = 1; // Use default F_TIMER clock source
ftmClock = F_TIMER; // Set variable for the actual timer clock frequency
}


for (prescale = 0; prescale < 7; prescale++) { for (prescale = 0; prescale < 7; prescale++) {
FTM3_SC = FTM_SC_CLKS(ftmClockSource) | FTM_SC_PS(prescale); //Use the new ftmClockSource instead of 1 FTM3_SC = FTM_SC_CLKS(ftmClockSource) | FTM_SC_PS(prescale); //Use the new ftmClockSource instead of 1
} }
#endif #endif
#ifdef TPM1_CH0_PIN
else if (pin == TPM1_CH0_PIN || pin == TPM1_CH1_PIN) {
TPM1_SC = 0;
TPM1_CNT = 0;
TPM1_MOD = mod;
TPM1_SC = FTM_SC_CLKS(ftmClockSource) | FTM_SC_PS(prescale);
}
#endif
} }





+ 28
- 6
teensy3/serial2.c View File

switch (rx_pin_num) { switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // on T3.5 or T3.6
case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif
} }
switch (tx_pin_num) { switch (tx_pin_num) {
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // on T3.5 or T3.6
case 58: CORE_PIN58_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
#endif
} }
#elif defined(KINETISL) #elif defined(KINETISL)
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
#if defined(KINETISK) #if defined(KINETISK)
switch (rx_pin_num) { switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3 case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1 case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE1
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 59: CORE_PIN59_CONFIG = 0; break;
#endif #endif
} }
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 10: CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4 case 10: CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0 case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTE0
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 58: CORE_PIN58_CONFIG = 0; break;
#endif #endif
} }
#elif defined(KINETISL) #elif defined(KINETISL)
if ((SIM_SCGC4 & SIM_SCGC4_UART1)) { if ((SIM_SCGC4 & SIM_SCGC4_UART1)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 10: CORE_PIN10_CONFIG = 0; break; // PTC4 case 10: CORE_PIN10_CONFIG = 0; break; // PTC4
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0 case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 58: CORE_PIN58_CONFIG = 0; break;
#endif #endif
} }
if (opendrain) { if (opendrain) {
} }
switch (pin & 127) { switch (pin & 127) {
case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break; case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break;
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break; case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break;
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 58: CORE_PIN58_CONFIG = cfg | PORT_PCR_MUX(3); break;
#endif #endif
} }
} }
if ((SIM_SCGC4 & SIM_SCGC4_UART1)) { if ((SIM_SCGC4 & SIM_SCGC4_UART1)) {
switch (rx_pin_num) { switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = 0; break; // PTC3 case 9: CORE_PIN9_CONFIG = 0; break; // PTC3
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 26: CORE_PIN26_CONFIG = 0; break; // PTE1 case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 59: CORE_PIN59_CONFIG = 0; break;
#endif #endif
} }
switch (pin) { switch (pin) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.5 or T3.6
#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5, T3.6
case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif #endif
} }
} }
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
if (pin == 23) { if (pin == 23) {
CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // on T3.5 or T3.6
} else if (pin == 60) {
CORE_PIN60_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
#endif
} else { } else {
UART1_MODEM &= ~UART_MODEM_TXCTSE; UART1_MODEM &= ~UART_MODEM_TXCTSE;
return 0; return 0;

+ 31
- 2
teensy3/serial4.c View File

static volatile uint8_t rx_buffer_tail = 0; static volatile uint8_t rx_buffer_tail = 0;
#endif #endif


static uint8_t rx_pin_num = 31;
static uint8_t tx_pin_num = 32; static uint8_t tx_pin_num = 32;


// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
tx_buffer_head = 0; tx_buffer_head = 0;
tx_buffer_tail = 0; tx_buffer_tail = 0;
transmitting = 0; transmitting = 0;
CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
}
switch (tx_pin_num) {
case 32: CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 62: CORE_PIN62_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
}
UART3_BDH = (divisor >> 13) & 0x1F; UART3_BDH = (divisor >> 13) & 0x1F;
UART3_BDL = (divisor >> 5) & 0xFF; UART3_BDL = (divisor >> 5) & 0xFF;
UART3_C4 = divisor & 0x1F; UART3_C4 = divisor & 0x1F;
UART3_C2 = 0; UART3_C2 = 0;
CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC3
case 63: CORE_PIN63_CONFIG = 0; break;
}
switch (tx_pin_num & 127) {
case 32: CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); break; // PTC4
case 62: CORE_PIN62_CONFIG = 0; break;
}
rx_buffer_head = 0; rx_buffer_head = 0;
rx_buffer_tail = 0; rx_buffer_tail = 0;
if (rts_pin) rts_deassert(); if (rts_pin) rts_deassert();
if ((SIM_SCGC4 & SIM_SCGC4_UART3)) { if ((SIM_SCGC4 & SIM_SCGC4_UART3)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 32: CORE_PIN32_CONFIG = 0; break; // PTB11 case 32: CORE_PIN32_CONFIG = 0; break; // PTB11
case 62: CORE_PIN62_CONFIG = 0; break;
} }
if (opendrain) { if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE; cfg = PORT_PCR_DSE | PORT_PCR_ODE;
} }
switch (pin & 127) { switch (pin & 127) {
case 32: CORE_PIN32_CONFIG = cfg | PORT_PCR_MUX(3); break; case 32: CORE_PIN32_CONFIG = cfg | PORT_PCR_MUX(3); break;
case 62: CORE_PIN62_CONFIG = cfg | PORT_PCR_MUX(3);; break;
} }
} }
tx_pin_num = pin; tx_pin_num = pin;


void serial4_set_rx(uint8_t pin) void serial4_set_rx(uint8_t pin)
{ {
if (pin == rx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART3)) {
switch (rx_pin_num) {
case 31: CORE_PIN31_CONFIG = 0; break; // PTC3
case 63: CORE_PIN63_CONFIG = 0; break;
}
switch (pin) {
case 31: CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 63: CORE_PIN63_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
}
}
rx_pin_num = pin;
} }


int serial4_set_rts(uint8_t pin) int serial4_set_rts(uint8_t pin)

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