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@@ -3990,29 +3990,29 @@ typedef struct { |
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#define USBHS_ENDPTNAKEN (*(volatile uint32_t *)0x400A117C) // Endpoint NAK Enable Register |
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#define USBHS_CONFIGFLAG (*(volatile uint32_t *)0x400A1180) // Configure Flag Register |
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#define USBHS_PORTSC1 (*(volatile uint32_t *)0x400A1184) // Port Status and Control Registers |
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#define USBHS_PORTSC1_PTS(n) (uint32_t)(((n) & 0x3) << 30) |
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#define USBHS_PORTSC1_PSPD(n) (uint32_t)(((n) & 0x3) << 26) |
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#define USBHS_PORTSC1_PTS2 ((uint32_t)0x02000000) |
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#define USBHS_PORTSC1_PFSC ((uint32_t)0x01000000) |
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#define USBHS_PORTSC1_PHCD ((uint32_t)0x00800000) |
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#define USBHS_PORTSC1_WKOC ((uint32_t)0x00400000) |
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#define USBHS_PORTSC1_WKDS ((uint32_t)0x00200000) |
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#define USBHS_PORTSC1_WKCN ((uint32_t)0x00100000) |
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#define USBHS_PORTSC1_PTC(n) (uint32_t)(((n) & 0xF) << 16) |
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#define USBHS_PORTSC1_PIC(n) (uint32_t)(((n) & 0x3) << 14) |
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#define USBHS_PORTSC1_PO ((uint32_t)0x00002000) |
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#define USBHS_PORTSC1_PP ((uint32_t)0x00001000) |
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#define USBHS_PORTSC1_LS(n) (uint32_t)(((n) & 0x3) << 10) |
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#define USBHS_PORTSC1_HSP ((uint32_t)0x00000200) |
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#define USBHS_PORTSC1_PR ((uint32_t)0x00000100) |
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#define USBHS_PORTSC1_SUSP ((uint32_t)0x00000080) |
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#define USBHS_PORTSC1_FPR ((uint32_t)0x00000040) |
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#define USBHS_PORTSC1_OCC ((uint32_t)0x00000020) |
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#define USBHS_PORTSC1_OCA ((uint32_t)0x00000010) |
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#define USBHS_PORTSC1_PEC ((uint32_t)0x00000008) |
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#define USBHS_PORTSC1_PE ((uint32_t)0x00000004) |
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#define USBHS_PORTSC1_CSC ((uint32_t)0x00000002) |
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#define USBHS_PORTSC1_CCS ((uint32_t)0x00000001) |
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#define USBHS_PORTSC_PTS(n) (uint32_t)(((n) & 0x3) << 30) |
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#define USBHS_PORTSC_PSPD(n) (uint32_t)(((n) & 0x3) << 26) |
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#define USBHS_PORTSC_PTS2 ((uint32_t)0x02000000) |
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#define USBHS_PORTSC_PFSC ((uint32_t)0x01000000) |
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#define USBHS_PORTSC_PHCD ((uint32_t)0x00800000) |
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#define USBHS_PORTSC_WKOC ((uint32_t)0x00400000) |
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#define USBHS_PORTSC_WKDS ((uint32_t)0x00200000) |
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#define USBHS_PORTSC_WKCN ((uint32_t)0x00100000) |
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#define USBHS_PORTSC_PTC(n) (uint32_t)(((n) & 0xF) << 16) |
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#define USBHS_PORTSC_PIC(n) (uint32_t)(((n) & 0x3) << 14) |
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#define USBHS_PORTSC_PO ((uint32_t)0x00002000) |
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#define USBHS_PORTSC_PP ((uint32_t)0x00001000) |
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#define USBHS_PORTSC_LS(n) (uint32_t)(((n) & 0x3) << 10) |
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#define USBHS_PORTSC_HSP ((uint32_t)0x00000200) |
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#define USBHS_PORTSC_PR ((uint32_t)0x00000100) |
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#define USBHS_PORTSC_SUSP ((uint32_t)0x00000080) |
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#define USBHS_PORTSC_FPR ((uint32_t)0x00000040) |
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#define USBHS_PORTSC_OCC ((uint32_t)0x00000020) |
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#define USBHS_PORTSC_OCA ((uint32_t)0x00000010) |
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#define USBHS_PORTSC_PEC ((uint32_t)0x00000008) |
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#define USBHS_PORTSC_PE ((uint32_t)0x00000004) |
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#define USBHS_PORTSC_CSC ((uint32_t)0x00000002) |
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#define USBHS_PORTSC_CCS ((uint32_t)0x00000001) |
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#define USBHS_OTGSC (*(volatile uint32_t *)0x400A11A4) // On-the-Go Status and Control Register |
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#define USBHS_OTGSC_DPIE ((uint32_t)0x40000000) |
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#define USBHS_OTGSC_MSE ((uint32_t)0x20000000) |