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#define CCM_CCGR1_CSU(n) ((uint32_t)(((n) & 0x03) << 28)) |
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#define CCM_CCGR1_CSU(n) ((uint32_t)(((n) & 0x03) << 28)) |
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#define CCM_CCGR1_GPIO1(n) ((uint32_t)(((n) & 0x03) << 26)) |
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#define CCM_CCGR1_GPIO1(n) ((uint32_t)(((n) & 0x03) << 26)) |
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#define CCM_CCGR1_LPUART4(n) ((uint32_t)(((n) & 0x03) << 24)) |
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#define CCM_CCGR1_LPUART4(n) ((uint32_t)(((n) & 0x03) << 24)) |
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#define CCM_CCGR1_GPT_SERIAL(n) ((uint32_t)(((n) & 0x03) << 22)) |
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#define CCM_CCGR1_GPT(n) ((uint32_t)(((n) & 0x03) << 20)) |
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#define CCM_CCGR1_GPT1_SERIAL(n) ((uint32_t)(((n) & 0x03) << 22)) |
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#define CCM_CCGR1_GPT1_BUS(n) ((uint32_t)(((n) & 0x03) << 20)) |
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#define CCM_CCGR1_ADC1(n) ((uint32_t)(((n) & 0x03) << 16)) |
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#define CCM_CCGR1_ADC1(n) ((uint32_t)(((n) & 0x03) << 16)) |
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#define CCM_CCGR1_AOI2(n) ((uint32_t)(((n) & 0x03) << 14)) |
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#define CCM_CCGR1_AOI2(n) ((uint32_t)(((n) & 0x03) << 14)) |
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#define CCM_CCGR1_PIT(n) ((uint32_t)(((n) & 0x03) << 12)) |
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#define CCM_CCGR1_PIT(n) ((uint32_t)(((n) & 0x03) << 12)) |