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@@ -28,19 +28,153 @@ |
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* SOFTWARE. |
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*/ |
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#ifndef _mk20dx128_h_ |
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#define _mk20dx128_h_ |
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//#ifdef F_CPU |
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//#undef F_CPU |
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//#endif |
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//#define F_CPU 168000000 |
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//#define F_CPU 144000000 |
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//#define F_CPU 120000000 |
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//#define F_CPU 96000000 |
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//#define F_CPU 72000000 |
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//#define F_CPU 48000000 |
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//#define F_CPU 24000000 |
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#ifndef _kinetis_h_ |
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#define _kinetis_h_ |
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#include <stdint.h> |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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// Teensy 3.0 |
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#if defined(__MK20DX128__) |
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enum IRQ_NUMBER_t { |
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IRQ_DMA_CH0 = 0, |
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IRQ_DMA_CH1 = 1, |
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IRQ_DMA_CH2 = 2, |
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IRQ_DMA_CH3 = 3, |
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IRQ_DMA_ERROR = 4, |
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IRQ_FTFL_COMPLETE = 6, |
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IRQ_FTFL_COLLISION = 7, |
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IRQ_LOW_VOLTAGE = 8, |
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IRQ_LLWU = 9, |
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IRQ_WDOG = 10, |
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IRQ_I2C0 = 11, |
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IRQ_SPI0 = 12, |
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IRQ_I2S0_TX = 13, |
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IRQ_I2S0_RX = 14, |
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IRQ_UART0_LON = 15, |
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IRQ_UART0_STATUS = 16, |
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IRQ_UART0_ERROR = 17, |
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IRQ_UART1_STATUS = 18, |
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IRQ_UART1_ERROR = 19, |
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IRQ_UART2_STATUS = 20, |
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IRQ_UART2_ERROR = 21, |
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IRQ_ADC0 = 22, |
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IRQ_CMP0 = 23, |
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IRQ_CMP1 = 24, |
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IRQ_FTM0 = 25, |
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IRQ_FTM1 = 26, |
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IRQ_CMT = 27, |
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IRQ_RTC_ALARM = 28, |
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IRQ_RTC_SECOND = 29, |
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IRQ_PIT_CH0 = 30, |
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IRQ_PIT_CH1 = 31, |
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IRQ_PIT_CH2 = 32, |
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IRQ_PIT_CH3 = 33, |
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IRQ_PDB = 34, |
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IRQ_USBOTG = 35, |
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IRQ_USBDCD = 36, |
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IRQ_TSI = 37, |
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IRQ_MCG = 38, |
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IRQ_LPTMR = 39, |
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IRQ_PORTA = 40, |
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IRQ_PORTB = 41, |
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IRQ_PORTC = 42, |
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IRQ_PORTD = 43, |
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IRQ_PORTE = 44, |
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IRQ_SOFTWARE = 45 |
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}; |
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#define NVIC_NUM_INTERRUPTS 46 |
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#define DMA_NUM_CHANNELS 4 |
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#define KINETISK_UART0 |
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#define KINETISK_UART0_FIFO |
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#define KINETISK_UART1 |
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#define KINETISK_UART2 |
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// Teensy 3.1 |
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#elif defined(__MK20DX256__) |
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enum IRQ_NUMBER_t { |
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IRQ_DMA_CH0 = 0, |
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IRQ_DMA_CH1 = 1, |
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IRQ_DMA_CH2 = 2, |
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IRQ_DMA_CH3 = 3, |
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IRQ_DMA_CH4 = 4, |
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IRQ_DMA_CH5 = 5, |
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IRQ_DMA_CH6 = 6, |
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IRQ_DMA_CH7 = 7, |
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IRQ_DMA_CH8 = 8, |
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IRQ_DMA_CH9 = 9, |
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IRQ_DMA_CH10 = 10, |
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IRQ_DMA_CH11 = 11, |
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IRQ_DMA_CH12 = 12, |
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IRQ_DMA_CH13 = 13, |
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IRQ_DMA_CH14 = 14, |
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IRQ_DMA_CH15 = 15, |
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IRQ_DMA_ERROR = 16, |
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IRQ_FTFL_COMPLETE = 18, |
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IRQ_FTFL_COLLISION = 19, |
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IRQ_LOW_VOLTAGE = 20, |
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IRQ_LLWU = 21, |
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IRQ_WDOG = 22, |
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IRQ_I2C0 = 24, |
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IRQ_I2C1 = 25, |
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IRQ_SPI0 = 26, |
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IRQ_SPI1 = 27, |
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IRQ_CAN_MESSAGE = 29, |
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IRQ_CAN_BUS_OFF = 30, |
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IRQ_CAN_ERROR = 31, |
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IRQ_CAN_TX_WARN = 32, |
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IRQ_CAN_RX_WARN = 33, |
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IRQ_CAN_WAKEUP = 34, |
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IRQ_I2S0_TX = 35, |
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IRQ_I2S0_RX = 36, |
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IRQ_UART0_LON = 44, |
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IRQ_UART0_STATUS = 45, |
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IRQ_UART0_ERROR = 46, |
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IRQ_UART1_STATUS = 47, |
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IRQ_UART1_ERROR = 48, |
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IRQ_UART2_STATUS = 49, |
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IRQ_UART2_ERROR = 50, |
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IRQ_ADC0 = 57, |
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IRQ_ADC1 = 58, |
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IRQ_CMP0 = 59, |
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IRQ_CMP1 = 60, |
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IRQ_CMP2 = 61, |
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IRQ_FTM0 = 62, |
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IRQ_FTM1 = 63, |
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IRQ_FTM2 = 64, |
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IRQ_CMT = 65, |
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IRQ_RTC_ALARM = 66, |
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IRQ_RTC_SECOND = 67, |
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IRQ_PIT_CH0 = 68, |
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IRQ_PIT_CH1 = 69, |
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IRQ_PIT_CH2 = 70, |
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IRQ_PIT_CH3 = 71, |
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IRQ_PDB = 72, |
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IRQ_USBOTG = 73, |
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IRQ_USBDCD = 74, |
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IRQ_DAC0 = 81, |
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IRQ_TSI = 83, |
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IRQ_MCG = 84, |
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IRQ_LPTMR = 85, |
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IRQ_PORTA = 87, |
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IRQ_PORTB = 88, |
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IRQ_PORTC = 89, |
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IRQ_PORTD = 90, |
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IRQ_PORTE = 91, |
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IRQ_SOFTWARE = 94 |
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}; |
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#define NVIC_NUM_INTERRUPTS 95 |
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#define DMA_NUM_CHANNELS 16 |
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#define KINETISK_UART0 |
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#define KINETISK_UART0_FIFO |
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#define KINETISK_UART1 |
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#define KINETISK_UART1_FIFO |
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#define KINETISK_UART2 |
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#endif // end of board-specific definitions |
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#if (F_CPU == 168000000) |
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#define F_BUS 56000000 |
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@@ -82,11 +216,6 @@ |
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#define NULL ((void *)0) |
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#endif |
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#include <stdint.h> |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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// chapter 11: Port control and interrupts (PORT) |
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#define PORTA_PCR0 (*(volatile uint32_t *)0x40049000) // Pin Control Register n |
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#define PORT_PCR_ISF ((uint32_t)0x01000000) // Interrupt Status Flag |
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@@ -2312,130 +2441,6 @@ typedef struct { |
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#define NVIC_SET_PRIORITY(irqnum, priority) (*((volatile uint8_t *)0xE000E400 + (irqnum)) = (uint8_t)(priority)) |
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#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum))) |
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#if defined(__MK20DX128__) |
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#define IRQ_DMA_CH0 0 |
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#define IRQ_DMA_CH1 1 |
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#define IRQ_DMA_CH2 2 |
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#define IRQ_DMA_CH3 3 |
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#define IRQ_DMA_ERROR 4 |
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#define IRQ_FTFL_COMPLETE 6 |
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#define IRQ_FTFL_COLLISION 7 |
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#define IRQ_LOW_VOLTAGE 8 |
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#define IRQ_LLWU 9 |
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#define IRQ_WDOG 10 |
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#define IRQ_I2C0 11 |
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#define IRQ_SPI0 12 |
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#define IRQ_I2S0_TX 13 |
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#define IRQ_I2S0_RX 14 |
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#define IRQ_UART0_LON 15 |
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#define IRQ_UART0_STATUS 16 |
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#define IRQ_UART0_ERROR 17 |
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#define IRQ_UART1_STATUS 18 |
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#define IRQ_UART1_ERROR 19 |
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#define IRQ_UART2_STATUS 20 |
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#define IRQ_UART2_ERROR 21 |
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#define IRQ_ADC0 22 |
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#define IRQ_CMP0 23 |
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#define IRQ_CMP1 24 |
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#define IRQ_FTM0 25 |
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#define IRQ_FTM1 26 |
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#define IRQ_CMT 27 |
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#define IRQ_RTC_ALARM 28 |
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#define IRQ_RTC_SECOND 29 |
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#define IRQ_PIT_CH0 30 |
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#define IRQ_PIT_CH1 31 |
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#define IRQ_PIT_CH2 32 |
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#define IRQ_PIT_CH3 33 |
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#define IRQ_PDB 34 |
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#define IRQ_USBOTG 35 |
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#define IRQ_USBDCD 36 |
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#define IRQ_TSI 37 |
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#define IRQ_MCG 38 |
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#define IRQ_LPTMR 39 |
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#define IRQ_PORTA 40 |
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#define IRQ_PORTB 41 |
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#define IRQ_PORTC 42 |
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#define IRQ_PORTD 43 |
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#define IRQ_PORTE 44 |
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#define IRQ_SOFTWARE 45 |
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#define NVIC_NUM_INTERRUPTS 46 |
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#define DMA_NUM_CHANNELS 4 |
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#elif defined(__MK20DX256__) |
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#define IRQ_DMA_CH0 0 |
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#define IRQ_DMA_CH1 1 |
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#define IRQ_DMA_CH2 2 |
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#define IRQ_DMA_CH3 3 |
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#define IRQ_DMA_CH4 4 |
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#define IRQ_DMA_CH5 5 |
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#define IRQ_DMA_CH6 6 |
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#define IRQ_DMA_CH7 7 |
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#define IRQ_DMA_CH8 8 |
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#define IRQ_DMA_CH9 9 |
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#define IRQ_DMA_CH10 10 |
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#define IRQ_DMA_CH11 11 |
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#define IRQ_DMA_CH12 12 |
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#define IRQ_DMA_CH13 13 |
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#define IRQ_DMA_CH14 14 |
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#define IRQ_DMA_CH15 15 |
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#define IRQ_DMA_ERROR 16 |
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#define IRQ_FTFL_COMPLETE 18 |
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#define IRQ_FTFL_COLLISION 19 |
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#define IRQ_LOW_VOLTAGE 20 |
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#define IRQ_LLWU 21 |
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#define IRQ_WDOG 22 |
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#define IRQ_I2C0 24 |
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#define IRQ_I2C1 25 |
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#define IRQ_SPI0 26 |
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#define IRQ_SPI1 27 |
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#define IRQ_CAN_MESSAGE 29 |
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#define IRQ_CAN_BUS_OFF 30 |
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#define IRQ_CAN_ERROR 31 |
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#define IRQ_CAN_TX_WARN 32 |
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#define IRQ_CAN_RX_WARN 33 |
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#define IRQ_CAN_WAKEUP 34 |
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#define IRQ_I2S0_TX 35 |
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#define IRQ_I2S0_RX 36 |
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#define IRQ_UART0_LON 44 |
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#define IRQ_UART0_STATUS 45 |
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#define IRQ_UART0_ERROR 46 |
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#define IRQ_UART1_STATUS 47 |
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#define IRQ_UART1_ERROR 48 |
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#define IRQ_UART2_STATUS 49 |
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#define IRQ_UART2_ERROR 50 |
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#define IRQ_ADC0 57 |
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#define IRQ_ADC1 58 |
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#define IRQ_CMP0 59 |
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#define IRQ_CMP1 60 |
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#define IRQ_CMP2 61 |
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#define IRQ_FTM0 62 |
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#define IRQ_FTM1 63 |
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#define IRQ_FTM2 64 |
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#define IRQ_CMT 65 |
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#define IRQ_RTC_ALARM 66 |
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#define IRQ_RTC_SECOND 67 |
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#define IRQ_PIT_CH0 68 |
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#define IRQ_PIT_CH1 69 |
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#define IRQ_PIT_CH2 70 |
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#define IRQ_PIT_CH3 71 |
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#define IRQ_PDB 72 |
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#define IRQ_USBOTG 73 |
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#define IRQ_USBDCD 74 |
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#define IRQ_DAC0 81 |
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#define IRQ_TSI 83 |
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#define IRQ_MCG 84 |
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#define IRQ_LPTMR 85 |
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#define IRQ_PORTA 87 |
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#define IRQ_PORTB 88 |
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#define IRQ_PORTC 89 |
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#define IRQ_PORTD 90 |
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#define IRQ_PORTE 91 |
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#define IRQ_SOFTWARE 94 |
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#define NVIC_NUM_INTERRUPTS 95 |
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#define DMA_NUM_CHANNELS 16 |
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#endif |
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