SPDIF register bit defs

teensy4/imxrt.h

@@ -6611,6 +6611,80 @@ typedef struct {
 #define SPDIF_STCSCL			(IMXRT_SPDIF.offset038)
 #define SPDIF_SRFM			(IMXRT_SPDIF.offset044)
 #define SPDIF_STC			(IMXRT_SPDIF.offset050)
+#define SPDIF_SCR_RXFIFO_CTR		((uint32_t)(1 << 23))
+#define SPDIF_SCR_RXFIFO_OFF_ON		((uint32_t)(1 << 22))
+#define SPDIF_SCR_RXFIFO_RST		((uint32_t)(1 << 21))
+#define SPDIF_SCR_RXFIFOFULL_SEL(n)	((uint32_t)(((n) & 0x03) << 19))
+#define SPDIF_SCR_RXAUTOSYNC		((uint32_t)(1 << 18))
+#define SPDIF_SCR_TXAUTOSYNC		((uint32_t)(1 << 17))
+#define SPDIF_SCR_TXFIFOEMPTY_SEL(n)	((uint32_t)(((n) & 0x03) << 15))
+#define SPDIF_SCR_LOW_POWER		((uint32_t)(1 << 13))
+#define SPDIF_SCR_SOFT_RESET		((uint32_t)(1 << 12))
+#define SPDIF_SCR_TXFIFO_CTRL(n)	((uint32_t)(((n) & 0x03) << 10))
+#define SPDIF_SCR_DMA_RX_EN		((uint32_t)(1 << 9))
+#define SPDIF_SCR_DMA_TX_EN		((uint32_t)(1 << 8))
+#define SPDIF_SCR_VALCTRL		((uint32_t)(1 << 5))
+#define SPDIF_SCR_TXSEL(n)		((uint32_t)(((n) & 0x07) << 2))
+#define SPDIF_SCR_USRC_SEL(n)		((uint32_t)(((n) & 0x03) << 0))
+#define SPDIF_SRCD_USYNCMODE		((uint32_t)(1 << 1))
+#define SPDIF_SRPC_CLKSRC_SEL(n)	((uint32_t)(((n) & 0x0f) << 7))
+#define SPDIF_SRPC_LOCK			((uint32_t)(1 << 6))
+#define SPDIF_SRPC_GAINSEL(n)		((uint32_t)(((n) & 0x07) << 3))
+#define SPDIF_SIE_LOCK			((uint32_t)(1 << 20))
+#define SPDIF_SIE_TXUNOV		((uint32_t)(1 << 19))
+#define SPDIF_SIE_TXRESYN		((uint32_t)(1 << 18))
+#define SPDIF_SIE_CNEW			((uint32_t)(1 << 17))
+#define SPDIF_SIE_VALNOGOOD		((uint32_t)(1 << 16))
+#define SPDIF_SIE_SYMERR		((uint32_t)(1 << 15))
+#define SPDIF_SIE_BITERR		((uint32_t)(1 << 14))
+#define SPDIF_SIE_URXFUL		((uint32_t)(1 << 10))
+#define SPDIF_SIE_URXOV			((uint32_t)(1 << 9))
+#define SPDIF_SIE_QRXFUL		((uint32_t)(1 << 8))
+#define SPDIF_SIE_QRXOV			((uint32_t)(1 << 7))
+#define SPDIF_SIE_UQSYNC		((uint32_t)(1 << 6))
+#define SPDIF_SIE_UQERR			((uint32_t)(1 << 5))
+#define SPDIF_SIE_RXFIFOUNOV		((uint32_t)(1 << 4))
+#define SPDIF_SIE_RXFIFORESYN		((uint32_t)(1 << 3))
+#define SPDIF_SIE_LOCKLOSS		((uint32_t)(1 << 2))
+#define SPDIF_SIE_TXEM			((uint32_t)(1 << 1))
+#define SPDIF_SIE_RXFIFOFUL		((uint32_t)(1 << 0))
+#define SPDIF_SIS_LOCK			((uint32_t)(1 << 20))
+#define SPDIF_SIS_TXUNOV		((uint32_t)(1 << 19))
+#define SPDIF_SIS_TXRESYN		((uint32_t)(1 << 18))
+#define SPDIF_SIS_CNEW			((uint32_t)(1 << 17))
+#define SPDIF_SIS_VALNOGOOD		((uint32_t)(1 << 16))
+#define SPDIF_SIS_SYMERR		((uint32_t)(1 << 15))
+#define SPDIF_SIS_BITERR		((uint32_t)(1 << 14))
+#define SPDIF_SIS_URXFUL		((uint32_t)(1 << 10))
+#define SPDIF_SIS_URXOV			((uint32_t)(1 << 9))
+#define SPDIF_SIS_QRXFUL		((uint32_t)(1 << 8))
+#define SPDIF_SIS_QRXOV			((uint32_t)(1 << 7))
+#define SPDIF_SIS_UQSYNC		((uint32_t)(1 << 6))
+#define SPDIF_SIS_UQERR			((uint32_t)(1 << 5))
+#define SPDIF_SIS_RXFIFOUNOV		((uint32_t)(1 << 4))
+#define SPDIF_SIS_RXFIFORESYN		((uint32_t)(1 << 3))
+#define SPDIF_SIS_LOCKLOSS		((uint32_t)(1 << 2))
+#define SPDIF_SIS_TXEM			((uint32_t)(1 << 1))
+#define SPDIF_SIS_RXFIFOFUL		((uint32_t)(1 << 0))
+#define SPDIF_SIC_LOCK			((uint32_t)(1 << 20))
+#define SPDIF_SIC_TXUNOV		((uint32_t)(1 << 19))
+#define SPDIF_SIC_TXRESYN		((uint32_t)(1 << 18))
+#define SPDIF_SIC_CNEW			((uint32_t)(1 << 17))
+#define SPDIF_SIC_VALNOGOOD		((uint32_t)(1 << 16))
+#define SPDIF_SIC_SYMERR		((uint32_t)(1 << 15))
+#define SPDIF_SIC_BITERR		((uint32_t)(1 << 14))
+#define SPDIF_SIC_URXFUL		((uint32_t)(1 << 10))
+#define SPDIF_SIC_URXOV			((uint32_t)(1 << 9))
+#define SPDIF_SIC_QRXOV			((uint32_t)(1 << 7))
+#define SPDIF_SIC_UQSYNC		((uint32_t)(1 << 6))
+#define SPDIF_SIC_UQERR			((uint32_t)(1 << 5))
+#define SPDIF_SIC_RXFIFOUNOV		((uint32_t)(1 << 4))
+#define SPDIF_SIC_RXFIFORESYN		((uint32_t)(1 << 3))
+#define SPDIF_SIC_LOCKLOSS		((uint32_t)(1 << 2))
+#define SPDIF_STC_SYSCLK_DF(n)		((uint32_t)(((n) & 0x1ff) << 11))
+#define SPDIF_STC_TXCLK_SOURCE(n)	((uint32_t)(((n) & 0x07) << 8))
+#define SPDIF_STC_TX_ALL_CLK_EN		((uint32_t)(1 << 7))
+#define SPDIF_STC_TXCLK_DF(n)		((uint32_t)(((n) & 0x7f) << 0))
 
 // 52.7: page 2969
 #define IMXRT_SRC		(*(IMXRT_REGISTER32_t *)0x400F8000)