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@@ -84,29 +84,6 @@ static void endpoint0_complete(void); |
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static void run_callbacks(endpoint_t *ep); |
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static void run_callbacks(endpoint_t *ep) |
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{ |
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transfer_t *t, *next; |
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printf("run_callbacks\n"); |
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t = ep->first_transfer; |
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while (t && (uint32_t)t != 1) { |
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if (!(t->status & (1<<7))) { |
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// transfer not active anymore |
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next = (transfer_t *)t->next; |
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ep->callback_function(t); |
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} else { |
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// transfer still active |
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ep->first_transfer = t; |
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return; |
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} |
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t = next; |
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} |
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// all transfers completed |
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ep->first_transfer = NULL; |
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ep->last_transfer = NULL; |
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} |
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__attribute__((section(".progmem"))) |
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void usb_init(void) |
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@@ -332,6 +309,7 @@ static void endpoint0_setup(uint64_t setupdata) |
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case 0x0900: // SET_CONFIGURATION |
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usb_configuration = setup.wValue; |
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// configure all other endpoints |
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#if 0 |
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volatile uint32_t *reg = &USB1_ENDPTCTRL1; |
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const uint32_t *cfg = usb_endpoint_config_table; |
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int i; |
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@@ -345,6 +323,26 @@ static void endpoint0_setup(uint64_t setupdata) |
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//printf(" ep=%d: cfg=%08lX - %08lX - %08lX\n", i + 1, n, m, p); |
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reg++; |
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} |
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#else |
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#if defined(ENDPOINT2_CONFIG) |
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USB1_ENDPTCTRL2 = ENDPOINT2_CONFIG; |
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#endif |
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#if defined(ENDPOINT3_CONFIG) |
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USB1_ENDPTCTRL3 = ENDPOINT3_CONFIG; |
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#endif |
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#if defined(ENDPOINT4_CONFIG) |
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USB1_ENDPTCTRL4 = ENDPOINT4_CONFIG; |
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#endif |
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#if defined(ENDPOINT5_CONFIG) |
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USB1_ENDPTCTRL5 = ENDPOINT5_CONFIG; |
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#endif |
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#if defined(ENDPOINT6_CONFIG) |
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USB1_ENDPTCTRL6 = ENDPOINT6_CONFIG; |
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#endif |
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#if defined(ENDPOINT7_CONFIG) |
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USB1_ENDPTCTRL7 = ENDPOINT7_CONFIG; |
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#endif |
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#endif |
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#if defined(CDC_STATUS_INTERFACE) && defined(CDC_DATA_INTERFACE) |
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usb_serial_configure(); |
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#endif |
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@@ -485,6 +483,7 @@ static void usb_endpoint_config(endpoint_t *qh, uint32_t config, void (*callback |
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{ |
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memset(qh, 0, sizeof(endpoint_t)); |
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qh->config = config; |
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qh->next = 1; // Terminate bit = 1 |
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qh->callback_function = callback; |
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} |
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@@ -519,70 +518,102 @@ void usb_prepare_transfer(transfer_t *transfer, const void *data, uint32_t len, |
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transfer->callback_param = param; |
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} |
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static uint32_t get_endptstatus(void) |
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{ |
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uint32_t status, cmd; |
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cmd = USB1_USBCMD; |
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do { |
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USB1_USBCMD = cmd | USB_USBCMD_ATDTW; |
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status = USB1_ENDPTSTATUS; |
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} while (!(USB1_USBCMD & USB_USBCMD_ATDTW)); |
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return status; |
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} |
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static void schedule_transfer(endpoint_t *endpoint, uint32_t epmask, transfer_t *transfer) |
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{ |
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transfer_t *last, *next; |
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// 41.5.6.6.3 Executing A Transfer Descriptor, page 2468 (RT1060 manual, Rev 1, 12/2018) |
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if (endpoint->callback_function) { |
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// endpoint uses interrupts and maintains linked list of all transfers |
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transfer->status |= (1<<15); |
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last = endpoint->last_transfer; |
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} else { |
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//transfer->status |= (1<<15); |
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// remove all inactive transfers |
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} |
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__disable_irq(); |
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#if 0 |
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if (endpoint->last_transfer) { |
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if (!(endpoint->last_transfer->status & (1<<7))) { |
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endpoint->last_transfer->next = (uint32_t)transfer; |
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} else { |
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// Case 2: Link list is not empty, page 3182 |
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endpoint->last_transfer->next = (uint32_t)transfer; |
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if (USB1_ENDPTPRIME & epmask) { |
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endpoint->last_transfer = transfer; |
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__enable_irq(); |
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printf(" case 2a\n"); |
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return; |
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} |
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uint32_t stat; |
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uint32_t cmd = USB1_USBCMD; |
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do { |
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USB1_USBCMD = cmd | USB_USBCMD_ATDTW; |
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stat = USB1_ENDPTSTATUS; |
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} while (!(USB1_USBCMD & USB_USBCMD_ATDTW)); |
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USB1_USBCMD = cmd & ~USB_USBCMD_ATDTW; |
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if (stat & epmask) { |
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endpoint->last_transfer = transfer; |
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__enable_irq(); |
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printf(" case 2b\n"); |
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return; |
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// endpoint has no callback, no list of transfers |
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//if ((USB1_ENDPTPRIME & epmask) || (get_endptstatus() & epmask)) { |
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last = (transfer_t *)(endpoint->next & ~0x1F); |
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if (last) { |
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while (1) { |
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next = (transfer_t *)(last->next & ~0x1F); |
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if (!next) break; |
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last = next; |
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} |
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} |
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//} else { |
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//last = NULL; |
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//} |
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} |
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if (last) { |
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last->next = transfer; |
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if ((USB1_ENDPTPRIME & epmask) || (get_endptstatus() & epmask)) { |
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endpoint->last_transfer = transfer; |
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__enable_irq(); |
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return; |
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} |
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} else { |
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endpoint->first_transfer = transfer; |
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} |
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endpoint->last_transfer = transfer; |
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#endif |
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// Case 1: Link list is empty, page 3182 |
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endpoint->next = (uint32_t)transfer; |
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endpoint->status = 0; |
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endpoint->first_transfer = (uint32_t)transfer; |
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endpoint->last_transfer = (uint32_t)transfer; |
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endpoint->first_transfer = transfer; |
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endpoint->last_transfer = transfer; |
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USB1_ENDPTPRIME |= epmask; |
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while (USB1_ENDPTPRIME & epmask) ; |
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__enable_irq(); |
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//printf(" case 1\n"); |
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// ENDPTPRIME - momentarily set by hardware during hardware re-priming |
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// ENDPTPRIME - Software should write a one to the corresponding bit when |
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// posting a new transfer descriptor to an endpoint queue head. |
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// Hardware automatically uses this bit to begin parsing for a |
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// new transfer descriptor from the queue head and prepare a |
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// transmit buffer. Hardware clears this bit when the associated |
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// endpoint(s) is (are) successfully primed. |
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// Momentarily set by hardware during hardware re-priming |
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// operations when a dTD is retired, and the dQH is updated. |
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// ENDPTSTAT - Transmit Buffer Ready - set to one by the hardware as a |
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// ENDPTSTATUS - Transmit Buffer Ready - set to one by the hardware as a |
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// response to receiving a command from a corresponding bit |
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// in the ENDPTPRIME register. . Buffer ready is cleared by |
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// USB reset, by the USB DMA system, or through the ENDPTFLUSH |
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// register. (so 0=buffer ready, 1=buffer primed for transmit) |
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// USBCMD.ATDTW - This bit is used as a semaphore to ensure proper addition |
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// of a new dTD to an active (primed) endpoint's linked list. |
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// This bit is set and cleared by software. |
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// This bit would also be cleared by hardware when state machine |
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// is hazard region for which adding a dTD to a primed endpoint |
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// may go unrecognized. |
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} |
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static void run_callbacks(endpoint_t *ep) |
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{ |
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transfer_t *t, *next; |
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printf("run_callbacks\n"); |
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t = ep->first_transfer; |
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while (t && (uint32_t)t != 1) { |
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if (!(t->status & (1<<7))) { |
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// transfer not active anymore |
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next = (transfer_t *)t->next; |
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ep->callback_function(t); |
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} else { |
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// transfer still active |
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ep->first_transfer = t; |
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return; |
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} |
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t = next; |
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} |
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// all transfers completed |
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ep->first_transfer = NULL; |
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ep->last_transfer = NULL; |
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} |
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void usb_transmit(int endpoint_number, transfer_t *transfer) |
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{ |
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if (endpoint_number < 2 || endpoint_number > NUM_ENDPOINTS) return; |
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@@ -599,7 +630,22 @@ void usb_receive(int endpoint_number, transfer_t *transfer) |
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schedule_transfer(endpoint, mask, transfer); |
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} |
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uint32_t usb_transfer_status(const transfer_t *transfer) |
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{ |
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uint32_t status, cmd; |
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//uint32_t count=0; |
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cmd = USB1_USBCMD; |
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do { |
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//count++; |
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USB1_USBCMD = cmd | USB_USBCMD_ATDTW; |
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status = transfer->status; |
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cmd = USB1_USBCMD; |
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} while (!(cmd & USB_USBCMD_ATDTW)); |
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//if (count > 1) printf("s=%08X, count=%d\n", status, count); |
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//printf("s=%08X, count=%d\n", status, count); |
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return status; |
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} |
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