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Add digitalToggleFast for T4.x...

Like what was added for T3.x with that 3 yeard PR, I added the same support to T4.x

Added the PORT TOGGLE defines.  I copied the _PORTSET blocks and then simply used block editing in Sublime text to then change the SET to Toggle.

Also added in the code...

Test sketch:
```
void setup() {
  pinMode(13, OUTPUT);
}

int led = 13;
void loop() {
  digitalToggleFast(led);
  delay(500);
  digitalToggleFast(13);
  delay(250);
  digitalToggle(13);
  delay(1000);
  digitalToggle(led);
  delay(250);
}
```
Also added values to keywords.txt
main
Kurt Eckhardt 4 years ago
parent
commit
7785c42ace
3 changed files with 233 additions and 0 deletions
  1. +2
    -0
      keywords.txt
  2. +220
    -0
      teensy4/core_pins.h
  3. +11
    -0
      teensy4/digital.c

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keywords.txt View File

printf KEYWORD2 printf KEYWORD2
digitalWriteFast KEYWORD2 digitalWriteFast KEYWORD2
digitalReadFast KEYWORD2 digitalReadFast KEYWORD2
digitalToggleFast KEYWORD2
digitalToggle KEYWORD2
transmitterEnable KEYWORD2 transmitterEnable KEYWORD2
attachRts KEYWORD2 attachRts KEYWORD2
attachCts KEYWORD2 attachCts KEYWORD2

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teensy4/core_pins.h View File

#define CORE_PIN38_PORTCLEAR GPIO8_DR_CLEAR #define CORE_PIN38_PORTCLEAR GPIO8_DR_CLEAR
#define CORE_PIN39_PORTCLEAR GPIO8_DR_CLEAR #define CORE_PIN39_PORTCLEAR GPIO8_DR_CLEAR


#define CORE_PIN0_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN1_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN2_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN3_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN4_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN5_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN6_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN7_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN8_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN9_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN10_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN11_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN12_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN13_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN14_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN15_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN16_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN17_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN18_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN19_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN20_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN21_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN22_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN23_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN24_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN25_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN26_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN27_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN28_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN29_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN30_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN31_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN32_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN33_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN34_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN35_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN36_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN37_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN38_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN39_PORTTOGGLE GPIO8_DR_TOGGLE


#define CORE_PIN0_DDRREG GPIO6_GDIR #define CORE_PIN0_DDRREG GPIO6_GDIR
#define CORE_PIN1_DDRREG GPIO6_GDIR #define CORE_PIN1_DDRREG GPIO6_GDIR
#define CORE_PIN2_DDRREG GPIO9_GDIR #define CORE_PIN2_DDRREG GPIO9_GDIR
#define CORE_PIN53_PORTCLEAR GPIO9_DR_CLEAR #define CORE_PIN53_PORTCLEAR GPIO9_DR_CLEAR
#define CORE_PIN54_PORTCLEAR GPIO9_DR_CLEAR #define CORE_PIN54_PORTCLEAR GPIO9_DR_CLEAR


#define CORE_PIN0_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN1_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN2_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN3_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN4_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN5_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN6_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN7_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN8_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN9_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN10_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN11_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN12_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN13_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN14_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN15_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN16_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN17_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN18_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN19_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN20_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN21_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN22_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN23_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN24_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN25_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN26_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN27_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN28_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN29_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN30_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN31_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN32_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN33_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN34_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN35_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN36_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN37_PORTTOGGLE GPIO7_DR_TOGGLE
#define CORE_PIN38_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN39_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN40_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN41_PORTTOGGLE GPIO6_DR_TOGGLE
#define CORE_PIN42_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN43_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN44_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN45_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN46_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN47_PORTTOGGLE GPIO8_DR_TOGGLE
#define CORE_PIN48_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN49_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN50_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN51_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN52_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN53_PORTTOGGLE GPIO9_DR_TOGGLE
#define CORE_PIN54_PORTTOGGLE GPIO9_DR_TOGGLE

#define CORE_PIN0_DDRREG GPIO6_GDIR #define CORE_PIN0_DDRREG GPIO6_GDIR
#define CORE_PIN1_DDRREG GPIO6_GDIR #define CORE_PIN1_DDRREG GPIO6_GDIR
#define CORE_PIN2_DDRREG GPIO9_GDIR #define CORE_PIN2_DDRREG GPIO9_GDIR
} }
} }


void digitalToggle(uint8_t pin);
static inline void digitalToggleFast(uint8_t pin) __attribute__((always_inline, unused));
static inline void digitalToggleFast(uint8_t pin)
{
if (__builtin_constant_p(pin)) {
if (pin == 0) {
CORE_PIN0_PORTTOGGLE = CORE_PIN0_BITMASK;
} else if (pin == 1) {
CORE_PIN1_PORTTOGGLE = CORE_PIN1_BITMASK;
} else if (pin == 2) {
CORE_PIN2_PORTTOGGLE = CORE_PIN2_BITMASK;
} else if (pin == 3) {
CORE_PIN3_PORTTOGGLE = CORE_PIN3_BITMASK;
} else if (pin == 4) {
CORE_PIN4_PORTTOGGLE = CORE_PIN4_BITMASK;
} else if (pin == 5) {
CORE_PIN5_PORTTOGGLE = CORE_PIN5_BITMASK;
} else if (pin == 6) {
CORE_PIN6_PORTTOGGLE = CORE_PIN6_BITMASK;
} else if (pin == 7) {
CORE_PIN7_PORTTOGGLE = CORE_PIN7_BITMASK;
} else if (pin == 8) {
CORE_PIN8_PORTTOGGLE = CORE_PIN8_BITMASK;
} else if (pin == 9) {
CORE_PIN9_PORTTOGGLE = CORE_PIN9_BITMASK;
} else if (pin == 10) {
CORE_PIN10_PORTTOGGLE = CORE_PIN10_BITMASK;
} else if (pin == 11) {
CORE_PIN11_PORTTOGGLE = CORE_PIN11_BITMASK;
} else if (pin == 12) {
CORE_PIN12_PORTTOGGLE = CORE_PIN12_BITMASK;
} else if (pin == 13) {
CORE_PIN13_PORTTOGGLE = CORE_PIN13_BITMASK;
} else if (pin == 14) {
CORE_PIN14_PORTTOGGLE = CORE_PIN14_BITMASK;
} else if (pin == 15) {
CORE_PIN15_PORTTOGGLE = CORE_PIN15_BITMASK;
} else if (pin == 16) {
CORE_PIN16_PORTTOGGLE = CORE_PIN16_BITMASK;
} else if (pin == 17) {
CORE_PIN17_PORTTOGGLE = CORE_PIN17_BITMASK;
} else if (pin == 18) {
CORE_PIN18_PORTTOGGLE = CORE_PIN18_BITMASK;
} else if (pin == 19) {
CORE_PIN19_PORTTOGGLE = CORE_PIN19_BITMASK;
} else if (pin == 20) {
CORE_PIN20_PORTTOGGLE = CORE_PIN20_BITMASK;
} else if (pin == 21) {
CORE_PIN21_PORTTOGGLE = CORE_PIN21_BITMASK;
} else if (pin == 22) {
CORE_PIN22_PORTTOGGLE = CORE_PIN22_BITMASK;
} else if (pin == 23) {
CORE_PIN23_PORTTOGGLE = CORE_PIN23_BITMASK;
} else if (pin == 24) {
CORE_PIN24_PORTTOGGLE = CORE_PIN24_BITMASK;
} else if (pin == 25) {
CORE_PIN25_PORTTOGGLE = CORE_PIN25_BITMASK;
} else if (pin == 26) {
CORE_PIN26_PORTTOGGLE = CORE_PIN26_BITMASK;
} else if (pin == 27) {
CORE_PIN27_PORTTOGGLE = CORE_PIN27_BITMASK;
} else if (pin == 28) {
CORE_PIN28_PORTTOGGLE = CORE_PIN28_BITMASK;
} else if (pin == 29) {
CORE_PIN29_PORTTOGGLE = CORE_PIN29_BITMASK;
} else if (pin == 30) {
CORE_PIN30_PORTTOGGLE = CORE_PIN30_BITMASK;
} else if (pin == 31) {
CORE_PIN31_PORTTOGGLE = CORE_PIN31_BITMASK;
} else if (pin == 32) {
CORE_PIN32_PORTTOGGLE = CORE_PIN32_BITMASK;
} else if (pin == 33) {
CORE_PIN33_PORTTOGGLE = CORE_PIN33_BITMASK;
} else if (pin == 34) {
CORE_PIN34_PORTTOGGLE = CORE_PIN34_BITMASK;
} else if (pin == 35) {
CORE_PIN35_PORTTOGGLE = CORE_PIN35_BITMASK;
} else if (pin == 36) {
CORE_PIN36_PORTTOGGLE = CORE_PIN36_BITMASK;
} else if (pin == 37) {
CORE_PIN37_PORTTOGGLE = CORE_PIN37_BITMASK;
} else if (pin == 38) {
CORE_PIN38_PORTTOGGLE = CORE_PIN38_BITMASK;
} else if (pin == 39) {
CORE_PIN39_PORTTOGGLE = CORE_PIN39_BITMASK;
#if CORE_NUM_DIGITAL >= 55
} else if (pin == 40) {
CORE_PIN40_PORTTOGGLE = CORE_PIN40_BITMASK;
} else if (pin == 41) {
CORE_PIN41_PORTTOGGLE = CORE_PIN41_BITMASK;
} else if (pin == 42) {
CORE_PIN42_PORTTOGGLE = CORE_PIN42_BITMASK;
} else if (pin == 43) {
CORE_PIN43_PORTTOGGLE = CORE_PIN43_BITMASK;
} else if (pin == 44) {
CORE_PIN44_PORTTOGGLE = CORE_PIN44_BITMASK;
} else if (pin == 45) {
CORE_PIN45_PORTTOGGLE = CORE_PIN45_BITMASK;
} else if (pin == 46) {
CORE_PIN46_PORTTOGGLE = CORE_PIN46_BITMASK;
} else if (pin == 47) {
CORE_PIN47_PORTTOGGLE = CORE_PIN47_BITMASK;
} else if (pin == 48) {
CORE_PIN48_PORTTOGGLE = CORE_PIN48_BITMASK;
} else if (pin == 49) {
CORE_PIN49_PORTTOGGLE = CORE_PIN49_BITMASK;
} else if (pin == 50) {
CORE_PIN50_PORTTOGGLE = CORE_PIN50_BITMASK;
} else if (pin == 51) {
CORE_PIN51_PORTTOGGLE = CORE_PIN51_BITMASK;
} else if (pin == 52) {
CORE_PIN52_PORTTOGGLE = CORE_PIN52_BITMASK;
} else if (pin == 53) {
CORE_PIN53_PORTTOGGLE = CORE_PIN53_BITMASK;
} else if (pin == 54) {
CORE_PIN54_PORTTOGGLE = CORE_PIN54_BITMASK;
}
#endif
} else {
digitalToggle(pin);
}
}


void pinMode(uint8_t pin, uint8_t mode); void pinMode(uint8_t pin, uint8_t mode);
void init_pins(void); void init_pins(void);

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teensy4/digital.c View File

} }
} }


void digitalToggle(uint8_t pin)
{
const struct digital_pin_bitband_and_config_table_struct *p;
uint32_t pinmode, mask;

if (pin >= CORE_NUM_DIGITAL) return;
p = digital_pin_to_info_PGM + pin;
mask = p->mask;
*(p->reg + 0x23) = mask; // toggle register
}

uint8_t digitalRead(uint8_t pin) uint8_t digitalRead(uint8_t pin)
{ {
const struct digital_pin_bitband_and_config_table_struct *p; const struct digital_pin_bitband_and_config_table_struct *p;

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