Merge pull request #139 from KurtE/T3-5-Serial1-new-TXRX-pins

Add support for pins 26 and 27

teensy3/serial1.c

  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
- * 1. The above copyright notice and this permission notice shall be 
+ * 1. The above copyright notice and this permission notice shall be
  * included in all copies or substantial portions of the Software.
  *
- * 2. If the Software is incorporated into a build system that allows 
+ * 2. If the Software is incorporated into a build system that allows
  * selection among a list of target devices, then similar target
  * devices manufactured by PJRC.COM must be included in the list of
  * target devices and selectable in the same manner.
 			case 4:  CORE_PIN4_CONFIG = 0; break; // PTA2
 			case 24: CORE_PIN24_CONFIG = 0; break; // PTE20
 			#endif
+			#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
+			case 26: CORE_PIN26_CONFIG = 0; break; //PTA14
+			#endif
 		}
 		if (opendrain) {
 			cfg = PORT_PCR_DSE | PORT_PCR_ODE;
 			case 4:  CORE_PIN4_CONFIG = cfg | PORT_PCR_MUX(2); break;
 			case 24: CORE_PIN24_CONFIG = cfg | PORT_PCR_MUX(4); break;
 			#endif
+			#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
+			case 26: CORE_PIN26_CONFIG = cfg | PORT_PCR_MUX(3); break;
+			#endif
 		}
 	}
 	tx_pin_num = pin;
 			case 3:  CORE_PIN3_CONFIG = 0; break; // PTA1
 			case 25: CORE_PIN25_CONFIG = 0; break; // PTE21
 			#endif
+			#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
+			case 27: CORE_PIN27_CONFIG = 0; break; // PTA15
+			#endif
 		}
 		switch (pin) {
 			case 0:  CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
 			case 3:  CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break;
 			case 25: CORE_PIN25_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(4); break;
 			#endif
+			#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
+			case 27: CORE_PIN27_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
+			#endif
 		}
 	}
 	rx_pin_num = pin;
 	if (rts_pin) rts_assert();
 }
 
-// status interrupt combines 
+// status interrupt combines
 //   Transmit data below watermark  UART_S1_TDRE
 //   Transmit complete		    UART_S1_TC
 //   Idle line			    UART_S1_IDLE

teensy3/serial2.c

  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
- * 1. The above copyright notice and this permission notice shall be 
+ * 1. The above copyright notice and this permission notice shall be
  * included in all copies or substantial portions of the Software.
  *
- * 2. If the Software is incorporated into a build system that allows 
+ * 2. If the Software is incorporated into a build system that allows
  * selection among a list of target devices, then similar target
  * devices manufactured by PJRC.COM must be included in the list of
  * target devices and selectable in the same manner.
 	if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
 		switch (tx_pin_num & 127) {
 			case 10: CORE_PIN10_CONFIG = 0; break; // PTC4
+			#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5
 			case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
+			#endif
 		}
 		if (opendrain) {
 			cfg = PORT_PCR_DSE | PORT_PCR_ODE;
 		}
 		switch (pin & 127) {
 			case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break;
+			#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5
 			case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break;
+			#endif
 		}
 	}
 	tx_pin_num = pin;
 	if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
 		switch (rx_pin_num) {
 			case 9: CORE_PIN9_CONFIG = 0; break; // PTC3
+			#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5
 			case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
+			#endif
 		}
 		switch (pin) {
 			case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
+			#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__))  // not on T3.4 or T3.5
 			case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
+			#endif
 		}
 	}
 	rx_pin_num = pin;
 	if (rts_pin) rts_assert();
 }
 
-// status interrupt combines 
+// status interrupt combines
 //   Transmit data below watermark  UART_S1_TDRE
 //   Transmit complete		    UART_S1_TC
 //   Idle line			    UART_S1_IDLE
 		if (head >= RX_BUFFER_SIZE) head = 0;
 		if (head != rx_buffer_tail) {
 			rx_buffer[head] = n;
-			rx_buffer_head = head; 
+			rx_buffer_head = head;
 		}
 	}
 	c = UART1_C2;

teensy3/serial3.c

  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
- * 1. The above copyright notice and this permission notice shall be 
+ * 1. The above copyright notice and this permission notice shall be
  * included in all copies or substantial portions of the Software.
  *
- * 2. If the Software is incorporated into a build system that allows 
+ * 2. If the Software is incorporated into a build system that allows
  * selection among a list of target devices, then similar target
  * devices manufactured by PJRC.COM must be included in the list of
  * target devices and selectable in the same manner.
 #endif
 #if defined(KINETISL)
 static uint8_t rx_pin_num = 7;
-static uint8_t tx_pin_num = 8;
 #endif
+static uint8_t tx_pin_num = 8;
 
 // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
 // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
 
 void serial3_set_tx(uint8_t pin, uint8_t opendrain)
 {
-	#if defined(KINETISL)
 	uint32_t cfg;
 
 	if (opendrain) pin |= 128;
 	if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
 		switch (tx_pin_num & 127) {
 			case 8:  CORE_PIN8_CONFIG = 0; break; // PTD3
+	#if defined(KINETISL)
 			case 20: CORE_PIN20_CONFIG = 0; break; // PTD5
+	#endif
 		}
 		if (opendrain) {
 			cfg = PORT_PCR_DSE | PORT_PCR_ODE;
 		}
 		switch (pin & 127) {
 			case 8:  CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break;
+	#if defined(KINETISL)
 			case 20: CORE_PIN20_CONFIG = cfg | PORT_PCR_MUX(3); break;
+	#endif
 		}
 	}
 	tx_pin_num = pin;
-	#endif
 }
 
 void serial3_set_rx(uint8_t pin)
 	if (rts_pin) rts_assert();
 }
 
-// status interrupt combines 
+// status interrupt combines
 //   Transmit data below watermark  UART_S1_TDRE
 //   Transmit complete		    UART_S1_TC
 //   Idle line			    UART_S1_IDLE
 		if (head >= RX_BUFFER_SIZE) head = 0;
 		if (head != rx_buffer_tail) {
 			rx_buffer[head] = n;
-			rx_buffer_head = head; 
+			rx_buffer_head = head;
 		}
 		if (rts_pin) {
 			int avail;

teensy3/serial4.c

  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
- * 1. The above copyright notice and this permission notice shall be 
+ * 1. The above copyright notice and this permission notice shall be
  * included in all copies or substantial portions of the Software.
  *
- * 2. If the Software is incorporated into a build system that allows 
+ * 2. If the Software is incorporated into a build system that allows
  * selection among a list of target devices, then similar target
  * devices manufactured by PJRC.COM must be included in the list of
  * target devices and selectable in the same manner.
 static volatile uint8_t rx_buffer_tail = 0;
 #endif
 
+static uint8_t tx_pin_num = 32;
+
 // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
 // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
 
 
 void serial4_set_tx(uint8_t pin, uint8_t opendrain)
 {
+	uint32_t cfg;
+
+	if (opendrain) pin |= 128;
+	if (pin == tx_pin_num) return;
+	if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
+		switch (tx_pin_num & 127) {
+			case 32:  CORE_PIN8_CONFIG = 0; break; // PTD3
+		}
+		if (opendrain) {
+			cfg = PORT_PCR_DSE | PORT_PCR_ODE;
+		} else {
+			cfg = PORT_PCR_DSE | PORT_PCR_SRE;
+		}
+		switch (pin & 127) {
+			case 32:  CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break;
+		}
+	}
+	tx_pin_num = pin;
+
 }
 
 void serial4_set_rx(uint8_t pin)
 	if (rts_pin) rts_assert();
 }
 
-// status interrupt combines 
+// status interrupt combines
 //   Transmit data below watermark  UART_S1_TDRE
 //   Transmit complete		    UART_S1_TC
 //   Idle line			    UART_S1_IDLE
 		if (head >= RX_BUFFER_SIZE) head = 0;
 		if (head != rx_buffer_tail) {
 			rx_buffer[head] = n;
-			rx_buffer_head = head; 
+			rx_buffer_head = head;
 		}
 		if (rts_pin) {
 			int avail;

teensy3/serial5.c

  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
- * 1. The above copyright notice and this permission notice shall be 
+ * 1. The above copyright notice and this permission notice shall be
  * included in all copies or substantial portions of the Software.
  *
- * 2. If the Software is incorporated into a build system that allows 
+ * 2. If the Software is incorporated into a build system that allows
  * selection among a list of target devices, then similar target
  * devices manufactured by PJRC.COM must be included in the list of
  * target devices and selectable in the same manner.
 static volatile uint8_t rx_buffer_tail = 0;
 #endif
 
+static uint8_t tx_pin_num = 34;
+
 // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
 // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
 
 
 void serial5_set_tx(uint8_t pin, uint8_t opendrain)
 {
+	uint32_t cfg;
+
+	if (opendrain) pin |= 128;
+	if (pin == tx_pin_num) return;
+	if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
+		switch (tx_pin_num & 127) {
+			case 34:  CORE_PIN8_CONFIG = 0; break; // PTD3
+		}
+		if (opendrain) {
+			cfg = PORT_PCR_DSE | PORT_PCR_ODE;
+		} else {
+			cfg = PORT_PCR_DSE | PORT_PCR_SRE;
+		}
+		switch (pin & 127) {
+			case 34:  CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break;
+		}
+	}
+	tx_pin_num = pin;
 }
 
 void serial5_set_rx(uint8_t pin)
 	if (rts_pin) rts_assert();
 }
 
-// status interrupt combines 
+// status interrupt combines
 //   Transmit data below watermark  UART_S1_TDRE
 //   Transmit complete		    UART_S1_TC
 //   Idle line			    UART_S1_IDLE
 		if (head >= RX_BUFFER_SIZE) head = 0;
 		if (head != rx_buffer_tail) {
 			rx_buffer[head] = n;
-			rx_buffer_head = head; 
+			rx_buffer_head = head;
 		}
 		if (rts_pin) {
 			int avail;