Fix some IMXRT register defs

teensy4/imxrt.h

@@ -1,3 +1,5 @@
+#include <stdint.h>
+
 #if !defined(KINETISL) && !defined(KINETISK)
 enum IRQ_NUMBER_t {
         IRQ_DMA_CH0 =           0,
@@ -2565,7 +2567,7 @@ typedef struct {
 #define FLEXSPI_LUT13			(IMXRT_FLEXSPI.offset234)
 #define FLEXSPI_LUT14			(IMXRT_FLEXSPI.offset238)
 #define FLEXSPI_LUT15			(IMXRT_FLEXSPI.offset23C)
-#define FLEXSPI_LUT12			(IMXRT_FLEXSPI.offset240)
+#define FLEXSPI_LUT16			(IMXRT_FLEXSPI.offset240)
 #define FLEXSPI_LUT17			(IMXRT_FLEXSPI.offset244)
 #define FLEXSPI_LUT18			(IMXRT_FLEXSPI.offset248)
 #define FLEXSPI_LUT19			(IMXRT_FLEXSPI.offset24C)
@@ -2605,7 +2607,7 @@ typedef struct {
 #define FLEXSPI_LUT53			(IMXRT_FLEXSPI.offset2D4)
 #define FLEXSPI_LUT54			(IMXRT_FLEXSPI.offset2D8)
 #define FLEXSPI_LUT55			(IMXRT_FLEXSPI.offset2DC)
-#define FLEXSPI_LUT52			(IMXRT_FLEXSPI.offset2E0)
+#define FLEXSPI_LUT56			(IMXRT_FLEXSPI.offset2E0)
 #define FLEXSPI_LUT57			(IMXRT_FLEXSPI.offset2E4)
 #define FLEXSPI_LUT58			(IMXRT_FLEXSPI.offset2E8)
 #define FLEXSPI_LUT59			(IMXRT_FLEXSPI.offset2EC)
@@ -2766,12 +2768,12 @@ typedef struct {
 #define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(n)		((uint32_t)(((n) & 0x03) << 8))
 #define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(n)		((uint32_t)(((n) & 0x03) << 6))
 #define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(n)		((uint32_t)(((n) & 0x07) << 3))
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(n)		((uint32_t)(((n) & 0x07) << 0))
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(n)		((uint32_t)(((n) & 0x07) << 0))
 #define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK		IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL(3)
 #define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK		IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(3)
 #define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK		IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(3)
 #define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK		IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(7)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK		IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(7)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK		IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(7)
 #define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE		((uint32_t)0x80000000)
 #define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE		((uint32_t)0x40000000)
 #define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE		((uint32_t)0x20000000)
@@ -3404,7 +3406,7 @@ typedef struct {
 #define IOMUXC_XBAR1_IN16_SELECT_INPUT		(IMXRT_IOMUXC_b.offset24C)
 #define IOMUXC_XBAR1_IN25_SELECT_INPUT		(IMXRT_IOMUXC_b.offset250)
 #define IOMUXC_XBAR1_IN19_SELECT_INPUT		(IMXRT_IOMUXC_b.offset254)
-#define IOMUXC_XBAR1_IN23_SELECT_INPUT		(IMXRT_IOMUXC_b.offset258)
+#define IOMUXC_XBAR1_IN21_SELECT_INPUT		(IMXRT_IOMUXC_b.offset258)
 
 // page 2356
 #define IMXRT_KPP		(*(IMXRT_REGISTER16_t *)0x401FC000)
@@ -3838,7 +3840,7 @@ typedef struct {
 #define LPUART_CTRL_TXINV				((uint32_t)0x10000000)
 #define LPUART_CTRL_ORIE				((uint32_t)0x08000000)
 #define LPUART_CTRL_NEIE				((uint32_t)0x04000000)
-#define LPUART_CTRL_NEIE				((uint32_t)0x02000000)
+#define LPUART_CTRL_FEIE				((uint32_t)0x02000000)
 #define LPUART_CTRL_PEIE				((uint32_t)0x01000000)
 #define LPUART_CTRL_TIE					((uint32_t)0x00800000)
 #define LPUART_CTRL_TCIE				((uint32_t)0x00400000)
@@ -3871,7 +3873,7 @@ typedef struct {
 #define LPUART_MODIR_TNP(n)				((uint32_t)(((n) & 0x03) << 16))
 #define LPUART_MODIR_RTSWATER(n)			((uint32_t)(((n) & 0x03) << 8))
 #define LPUART_MODIR_TXCTSSRC				((uint32_t)0x00000020)
-#define LPUART_MODIR_TXCTSSRC				((uint32_t)0x00000010)
+#define LPUART_MODIR_TXCTSC				((uint32_t)0x00000010)
 #define LPUART_MODIR_RXRTSE				((uint32_t)0x00000008)
 #define LPUART_MODIR_TXRTSPOL				((uint32_t)0x00000004)
 #define LPUART_MODIR_TXRTSE				((uint32_t)0x00000002)
@@ -4007,7 +4009,7 @@ typedef struct {
 #define PMU_MISC2_TOG			(IMXRT_PMU.offset17C)
 
 // page 2728
-#define IMXRT_PMU		(*(IMXRT_REGISTER32_t *)0x402B4000)
+#define IMXRT_PXP		(*(IMXRT_REGISTER32_t *)0x402B4000)
 #define PXP_HW_PXP_CTRL
 #define PXP_HW_PXP_CTRL_SET
 #define PXP_HW_PXP_CTRL_CLR