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#if defined(KINETISK) |
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#if defined(KINETISK) |
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switch (rx_pin_num) { |
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switch (rx_pin_num) { |
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case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2 |
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case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // on T3.5 or T3.6 |
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#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5 or T3.6 |
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case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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case 59: CORE_PIN59_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; |
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#endif |
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#endif |
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} |
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} |
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switch (tx_pin_num) { |
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switch (tx_pin_num) { |
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case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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#if defined(__MK20DX128__) || defined(__MK20DX256__) // T3.0, T3.1, T3.2 |
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case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // on T3.5 or T3.6 |
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#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) // T3.5 or T3.6 |
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case 58: CORE_PIN58_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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case 58: CORE_PIN58_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; |
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#endif |
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#endif |
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} |
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} |