Fix DMA on K66

teensy3/DMAChannel.cpp

 #include "DMAChannel.h"
 
-#if DMA_NUM_CHANNELS > 16
-#undef DMA_NUM_CHANNELS
-#define DMA_NUM_CHANNELS 16
+#if DMA_NUM_CHANNELS <= 16
+#define DMA_MAX_CHANNELS  DMA_NUM_CHANNELS
+#else
+#define DMA_MAX_CHANNELS 16
 #endif
 
 
 	uint32_t ch = 0;
 
 	__disable_irq();
-	if (!force_initialization && TCD && channel < DMA_NUM_CHANNELS
+	if (!force_initialization && TCD && channel < DMA_MAX_CHANNELS
 	  && (dma_channel_allocated_mask & (1 << channel))
 	  && (uint32_t)TCD == (uint32_t)(0x40009000 + channel * 32)) {
 		// DMA channel already allocated
 			__enable_irq();
 			break;
 		}
-		if (++ch >= DMA_NUM_CHANNELS) {
+		if (++ch >= DMA_MAX_CHANNELS) {
 			__enable_irq();
 			TCD = (TCD_t *)0;
-			channel = DMA_NUM_CHANNELS;
+			channel = DMA_MAX_CHANNELS;
 			return; // no more channels available
 			// attempts to use this object will hardfault
 		}
 	channel = ch;
 	SIM_SCGC7 |= SIM_SCGC7_DMA;
 	SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
-	DMA_CR = DMA_CR_EMLM | DMA_CR_EDBG ; // minor loop mapping is available
+#if DMA_NUM_CHANNELS <= 16
+	DMA_CR = DMA_CR_EMLM | DMA_CR_EDBG; // minor loop mapping is available
+#else
+	DMA_CR = DMA_CR_GRP1PRI| DMA_CR_EMLM | DMA_CR_EDBG;
+#endif
 	DMA_CERQ = ch;
 	DMA_CERR = ch;
 	DMA_CEEI = ch;
 
 void DMAChannel::release(void)
 {
-	if (channel >= DMA_NUM_CHANNELS) return;
+	if (channel >= DMA_MAX_CHANNELS) return;
 	DMA_CERQ = channel;
 	__disable_irq();
 	dma_channel_allocated_mask &= ~(1 << channel);
 	__enable_irq();
-	channel = DMA_NUM_CHANNELS;
+	channel = DMA_MAX_CHANNELS;
 	TCD = (TCD_t *)0;
 }
 
 	uint32_t ch = 0;
 
 	__disable_irq();
-	if (!force_initialization && CFG && channel < DMA_NUM_CHANNELS
+	if (!force_initialization && CFG && channel < DMA_MAX_CHANNELS
 	  && (dma_channel_allocated_mask & (1 << channel))
 	  && (uint32_t)CFG == (uint32_t)(0x40008100 + channel * 16)) {
 		// DMA channel already allocated
 			__enable_irq();
 			break;
 		}
-		if (++ch >= DMA_NUM_CHANNELS) {
+		if (++ch >= DMA_MAX_CHANNELS) {
 			__enable_irq();
 			CFG = (CFG_t *)0;
-			channel = DMA_NUM_CHANNELS;
+			channel = DMA_MAX_CHANNELS;
 			return; // no more channels available
 			// attempts to use this object will hardfault
 		}
 
 void DMAChannel::release(void)
 {
-	if (channel >= DMA_NUM_CHANNELS) return;
+	if (channel >= DMA_MAX_CHANNELS) return;
 	CFG->DSR_BCR = DMA_DSR_BCR_DONE;
 	__disable_irq();
 	dma_channel_allocated_mask &= ~(1 << channel);

teensy3/kinetis.h

 #define DMA_DCHPRI30		(*(volatile uint8_t  *)0x4000811D) // Channel n Priority Register
 #define DMA_DCHPRI29		(*(volatile uint8_t  *)0x4000811E) // Channel n Priority Register
 #define DMA_DCHPRI28		(*(volatile uint8_t  *)0x4000811F) // Channel n Priority Register
+#define DMA_CR_GRP0PRI			((uint32_t)0x100)
+#define DMA_CR_GRP1PRI			((uint32_t)0x400)
 #endif
 
 #define DMA_TCD_ATTR_SMOD(n)		(((n) & 0x1F) << 11)