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@@ -87,7 +87,7 @@ static volatile uint8_t rx_buffer_tail = 0; |
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#ifdef HAS_KINETISK_UART0_FIFO |
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#define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE | UART_C2_ILIE |
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#else |
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#define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE |
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#define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE |
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#endif |
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#define C2_TX_ACTIVE C2_ENABLE | UART_C2_TIE |
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#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE |
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@@ -128,24 +128,24 @@ void serial_begin(uint32_t divisor) |
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void serial_format(uint32_t format) |
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{ |
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uint8_t c; |
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c = UART0_C1; |
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c = (c & ~0x13) | (format & 0x03); // configure parity |
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if (format & 0x04) c |= 0x10; // 9 bits (might include parity) |
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UART0_C1 = c; |
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if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 |
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c = UART0_S2 & ~0x10; |
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if (format & 0x10) c |= 0x10; // rx invert |
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UART0_S2 = c; |
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c = UART0_C3 & ~0x10; |
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if (format & 0x20) c |= 0x10; // tx invert |
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UART0_C3 = c; |
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uint8_t c; |
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c = UART0_C1; |
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c = (c & ~0x13) | (format & 0x03); // configure parity |
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if (format & 0x04) c |= 0x10; // 9 bits (might include parity) |
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UART0_C1 = c; |
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if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 |
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c = UART0_S2 & ~0x10; |
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if (format & 0x10) c |= 0x10; // rx invert |
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UART0_S2 = c; |
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c = UART0_C3 & ~0x10; |
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if (format & 0x20) c |= 0x10; // tx invert |
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UART0_C3 = c; |
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#ifdef SERIAL_9BIT_SUPPORT |
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c = UART0_C4 & 0x1F; |
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if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits) |
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UART0_C4 = c; |
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use9Bits = format & 0x80; |
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c = UART0_C4 & 0x1F; |
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if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits) |
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UART0_C4 = c; |
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use9Bits = format & 0x80; |
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#endif |
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} |
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@@ -236,15 +236,15 @@ void serial_write(const void *buf, unsigned int count) |
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{ |
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const uint8_t *p = (const uint8_t *)buf; |
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const uint8_t *end = p + count; |
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uint32_t head, n; |
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uint32_t head, n; |
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if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; |
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if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; |
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if (transmit_pin) transmit_assert(); |
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while (p < end) { |
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head = tx_buffer_head; |
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if (++head >= TX_BUFFER_SIZE) head = 0; |
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head = tx_buffer_head; |
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if (++head >= TX_BUFFER_SIZE) head = 0; |
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if (tx_buffer_tail == head) { |
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UART0_C2 = C2_TX_ACTIVE; |
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UART0_C2 = C2_TX_ACTIVE; |
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do { |
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int priority = nvic_execution_priority(); |
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if (priority <= IRQ_PRIORITY) { |
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@@ -261,17 +261,17 @@ void serial_write(const void *buf, unsigned int count) |
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} |
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} while (tx_buffer_tail == head); |
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} |
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tx_buffer[head] = *p++; |
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transmitting = 1; |
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tx_buffer_head = head; |
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tx_buffer[head] = *p++; |
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transmitting = 1; |
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tx_buffer_head = head; |
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} |
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UART0_C2 = C2_TX_ACTIVE; |
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UART0_C2 = C2_TX_ACTIVE; |
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} |
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#else |
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void serial_write(const void *buf, unsigned int count) |
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{ |
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const uint8_t *p = (const uint8_t *)buf; |
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while (count-- > 0) serial_putchar(*p++); |
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const uint8_t *p = (const uint8_t *)buf; |
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while (count-- > 0) serial_putchar(*p++); |
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} |
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#endif |
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@@ -338,19 +338,19 @@ void serial_clear(void) |
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// status interrupt combines |
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// Transmit data below watermark UART_S1_TDRE |
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// Transmit complete UART_S1_TC |
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// Idle line UART_S1_IDLE |
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// Transmit complete UART_S1_TC |
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// Idle line UART_S1_IDLE |
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// Receive data above watermark UART_S1_RDRF |
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// LIN break detect UART_S2_LBKDIF |
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// RxD pin active edge UART_S2_RXEDGIF |
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// LIN break detect UART_S2_LBKDIF |
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// RxD pin active edge UART_S2_RXEDGIF |
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void uart0_status_isr(void) |
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{ |
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uint32_t head, tail, n; |
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uint8_t c; |
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#ifdef HAS_KINETISK_UART0_FIFO |
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uint32_t newhead; |
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uint8_t avail; |
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uint32_t newhead; |
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uint8_t avail; |
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if (UART0_S1 & (UART_S1_RDRF | UART_S1_IDLE)) { |
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__disable_irq(); |
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@@ -410,30 +410,30 @@ void uart0_status_isr(void) |
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if (UART0_S1 & UART_S1_TDRE) UART0_C2 = C2_TX_COMPLETING; |
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} |
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#else |
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if (UART0_S1 & UART_S1_RDRF) { |
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n = UART0_D; |
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if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; |
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head = rx_buffer_head + 1; |
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if (head >= RX_BUFFER_SIZE) head = 0; |
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if (head != rx_buffer_tail) { |
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rx_buffer[head] = n; |
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rx_buffer_head = head; |
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} |
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} |
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c = UART0_C2; |
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if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) { |
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head = tx_buffer_head; |
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tail = tx_buffer_tail; |
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if (head == tail) { |
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UART0_C2 = C2_TX_COMPLETING; |
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} else { |
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if (++tail >= TX_BUFFER_SIZE) tail = 0; |
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n = tx_buffer[tail]; |
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if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); |
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UART0_D = n; |
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tx_buffer_tail = tail; |
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} |
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} |
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if (UART0_S1 & UART_S1_RDRF) { |
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n = UART0_D; |
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if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; |
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head = rx_buffer_head + 1; |
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if (head >= RX_BUFFER_SIZE) head = 0; |
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if (head != rx_buffer_tail) { |
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rx_buffer[head] = n; |
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rx_buffer_head = head; |
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} |
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} |
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c = UART0_C2; |
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if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) { |
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head = tx_buffer_head; |
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tail = tx_buffer_tail; |
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if (head == tail) { |
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UART0_C2 = C2_TX_COMPLETING; |
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} else { |
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if (++tail >= TX_BUFFER_SIZE) tail = 0; |
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n = tx_buffer[tail]; |
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if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); |
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UART0_D = n; |
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tx_buffer_tail = tail; |
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} |
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} |
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#endif |
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if ((c & UART_C2_TCIE) && (UART0_S1 & UART_S1_TC)) { |
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transmitting = 0; |