| #elif F_CPU == 48000000 | #elif F_CPU == 48000000 | ||||
| // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 | // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 | ||||
| #if defined(KINETISK) | #if defined(KINETISK) | ||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3); | |||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(3); | |||||
| SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); | SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); | ||||
| #elif defined(KINETISL) | #elif defined(KINETISL) | ||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV4(1); | SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV4(1); | ||||
| #elif F_CPU == 24000000 | #elif F_CPU == 24000000 | ||||
| // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash, USB = 96 / 2 | // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash, USB = 96 / 2 | ||||
| #if defined(KINETISK) | #if defined(KINETISK) | ||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3); | |||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV3(3) | SIM_CLKDIV1_OUTDIV4(3); | |||||
| SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); | SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); | ||||
| #elif defined(KINETISL) | #elif defined(KINETISL) | ||||
| SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV4(0); | SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV4(0); |