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@@ -5104,6 +5104,7 @@ typedef struct __attribute__((packed)) { |
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#define SDHC_PROCTL_EMODE(n) (uint32_t)(((n) & 0x3)<<4) // Endian Mode |
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#define SDHC_PROCTL_D3CD ((uint32_t)0x00000008) // DAT3 As Card Detection Pin |
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#define SDHC_PROCTL_DTW(n) (uint32_t)(((n) & 0x3)<<1) // Data Transfer Width, 0=1bit, 1=4bit, 2=8bit |
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#define SDHC_PROCTL_DTW_MASK ((uint32_t)0x00000006) |
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#define SDHC_PROCTL_LCTL ((uint32_t)0x00000001) // LED Control |
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#define SDHC_SYSCTL (*(volatile uint32_t *)0x400B102C) // System Control register |
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#define SDHC_SYSCTL_INITA ((uint32_t)0x08000000) // Initialization Active |
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@@ -5111,8 +5112,11 @@ typedef struct __attribute__((packed)) { |
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#define SDHC_SYSCTL_RSTC ((uint32_t)0x02000000) // Software Reset For CMD Line |
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#define SDHC_SYSCTL_RSTA ((uint32_t)0x01000000) // Software Reset For ALL |
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#define SDHC_SYSCTL_DTOCV(n) (uint32_t)(((n) & 0xF)<<16) // Data Timeout Counter Value |
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#define SDHC_SYSCTL_DTOCV_MASK ((uint32_t)0x000F0000) |
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#define SDHC_SYSCTL_SDCLKFS(n) (uint32_t)(((n) & 0xFF)<<8) // SDCLK Frequency Select |
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#define SDHC_SYSCTL_SDCLKFS_MASK ((uint32_t)0x0000FF00) |
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#define SDHC_SYSCTL_DVS(n) (uint32_t)(((n) & 0xF)<<4) // Divisor |
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#define SDHC_SYSCTL_DVS_MASK ((uint32_t)0x000000F0) |
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#define SDHC_SYSCTL_SDCLKEN ((uint32_t)0x00000008) // SD Clock Enable |
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#define SDHC_SYSCTL_PEREN ((uint32_t)0x00000004) // Peripheral Clock Enable |
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#define SDHC_SYSCTL_HCKEN ((uint32_t)0x00000002) // System Clock Enable |