#define CORE_PIN32_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12 | #define CORE_PIN32_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12 | ||||
#define CORE_PIN33_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08 | #define CORE_PIN33_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08 | ||||
#define CORE_LED0_PIN 13 | |||||
#define CORE_ADC0_PIN 14 | #define CORE_ADC0_PIN 14 | ||||
#define CORE_ADC1_PIN 15 | #define CORE_ADC1_PIN 15 | ||||
#define CORE_ADC2_PIN 16 | #define CORE_ADC2_PIN 16 |