@@ -455,9 +455,9 @@ void Print::printNumberAny(unsigned long n, uint8_t base) | |||
#if ARDUINO >= 100 | |||
size_t Print::printFloat(double number, uint8_t digits) | |||
size_t Print::printFloat(double number, uint8_t digits) | |||
#else | |||
void Print::printFloat(double number, uint8_t digits) | |||
void Print::printFloat(double number, uint8_t digits) | |||
#endif | |||
{ | |||
uint8_t sign=0; | |||
@@ -499,7 +499,7 @@ void Print::printFloat(double number, uint8_t digits) | |||
remainder *= 10.0; | |||
n = (uint8_t)(remainder); | |||
buf[count++] = '0' + n; | |||
remainder -= n; | |||
remainder -= n; | |||
} | |||
#if ARDUINO >= 100 | |||
count += write(buf, count); |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -50,12 +50,12 @@ typedef struct audio_block_struct { | |||
class AudioConnection | |||
{ | |||
public: | |||
AudioConnection(AudioStream &source, AudioStream &destination) : | |||
AudioConnection(AudioStream &source, AudioStream &destination) : | |||
src(source), dst(destination), src_index(0), dest_index(0), | |||
next_dest(NULL) | |||
{ connect(); } | |||
AudioConnection(AudioStream &source, unsigned char sourceOutput, | |||
AudioStream &destination, unsigned char destinationInput) : | |||
AudioStream &destination, unsigned char destinationInput) : | |||
src(source), dst(destination), | |||
src_index(sourceOutput), dest_index(destinationInput), | |||
next_dest(NULL) |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -8,10 +8,10 @@ | |||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |||
* copies of the Software, and to permit persons to whom the Software is | |||
* furnished to do so, subject to the following conditions: | |||
* | |||
* | |||
* The above copyright notice and this permission notice shall be included in | |||
* all copies or substantial portions of the Software. | |||
* | |||
* | |||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
@@ -49,7 +49,7 @@ class IntervalTimer { | |||
uint8_t IRQ_PIT_CH; | |||
ISR myISR; | |||
bool beginCycles(ISR newISR, uint32_t cycles); | |||
public: | |||
public: | |||
IntervalTimer() { status = TIMER_OFF; } | |||
~IntervalTimer() { end(); } | |||
bool begin(ISR newISR, unsigned int newPeriod) { |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -63,4 +63,4 @@ class Stream : public Print | |||
int peekNextDigit(); | |||
}; | |||
#endif | |||
#endif |
@@ -4,7 +4,7 @@ | |||
* NOTE: UDP is fast, but has some important limitations (thanks to Warren Gray for mentioning these) | |||
* 1) UDP does not guarantee the order in which assembled UDP packets are received. This | |||
* might not happen often in practice, but in larger network topologies, a UDP | |||
* packet can be received out of sequence. | |||
* packet can be received out of sequence. | |||
* 2) UDP does not guard against lost packets - so packets *can* disappear without the sender being | |||
* aware of it. Again, this may not be a concern in practice on small local networks. | |||
* For more information, see http://www.cafeaulait.org/course/week12/35.html | |||
@@ -17,10 +17,10 @@ | |||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |||
* copies of the Software, and to permit persons to whom the Software is | |||
* furnished to do so, subject to the following conditions: | |||
* | |||
* | |||
* The above copyright notice and this permission notice shall be included in | |||
* all copies or substantial portions of the Software. | |||
* | |||
* | |||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |||
@@ -47,7 +47,7 @@ public: | |||
virtual void stop() =0; // Finish with the UDP socket | |||
// Sending UDP packets | |||
// Start building up a packet to send to the remote host specific in ip and port | |||
// Returns 1 if successful, 0 if there was a problem with the supplied IP address or port | |||
virtual int beginPacket(IPAddress ip, uint16_t port) =0; |
@@ -41,15 +41,15 @@ inline int toLowerCase(int c) __attribute__((always_inline)); | |||
inline int toUpperCase(int c)__attribute__((always_inline)); | |||
// Checks for an alphanumeric character. | |||
// Checks for an alphanumeric character. | |||
// It is equivalent to (isalpha(c) || isdigit(c)). | |||
inline boolean isAlphaNumeric(int c) | |||
inline boolean isAlphaNumeric(int c) | |||
{ | |||
return ( isalnum(c) == 0 ? false : true); | |||
} | |||
// Checks for an alphabetic character. | |||
// Checks for an alphabetic character. | |||
// It is equivalent to (isupper(c) || islower(c)). | |||
inline boolean isAlpha(int c) | |||
{ | |||
@@ -57,7 +57,7 @@ inline boolean isAlpha(int c) | |||
} | |||
// Checks whether c is a 7-bit unsigned char value | |||
// Checks whether c is a 7-bit unsigned char value | |||
// that fits into the ASCII character set. | |||
inline boolean isAscii(int c) | |||
{ | |||
@@ -107,7 +107,7 @@ inline boolean isPrintable(int c) | |||
} | |||
// Checks for any printable character which is not a space | |||
// Checks for any printable character which is not a space | |||
// or an alphanumeric character. | |||
inline boolean isPunct(int c) | |||
{ | |||
@@ -115,8 +115,8 @@ inline boolean isPunct(int c) | |||
} | |||
// Checks for white-space characters. For the avr-libc library, | |||
// these are: space, formfeed ('\f'), newline ('\n'), carriage | |||
// Checks for white-space characters. For the avr-libc library, | |||
// these are: space, formfeed ('\f'), newline ('\n'), carriage | |||
// return ('\r'), horizontal tab ('\t'), and vertical tab ('\v'). | |||
inline boolean isSpace(int c) | |||
{ | |||
@@ -131,7 +131,7 @@ inline boolean isUpperCase(int c) | |||
} | |||
// Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7 | |||
// Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7 | |||
// 8 9 a b c d e f A B C D E F. | |||
inline boolean isHexadecimalDigit(int c) | |||
{ | |||
@@ -139,7 +139,7 @@ inline boolean isHexadecimalDigit(int c) | |||
} | |||
// Converts c to a 7-bit unsigned char value that fits into the | |||
// Converts c to a 7-bit unsigned char value that fits into the | |||
// ASCII character set, by clearing the high-order bits. | |||
inline int toAscii(int c) | |||
{ | |||
@@ -148,8 +148,8 @@ inline int toAscii(int c) | |||
// Warning: | |||
// Many people will be unhappy if you use this function. | |||
// This function will convert accented letters into random | |||
// Many people will be unhappy if you use this function. | |||
// This function will convert accented letters into random | |||
// characters. | |||
// Converts the letter c to lower case, if possible. | |||
@@ -165,4 +165,4 @@ inline int toUpperCase(int c) | |||
return toupper (c); | |||
} | |||
#endif | |||
#endif |
@@ -178,7 +178,7 @@ public: | |||
String & replace(char find, char replace); | |||
String & replace(const String& find, const String& replace); | |||
String & remove(unsigned int index); | |||
String & remove(unsigned int index, unsigned int count); | |||
String & remove(unsigned int index, unsigned int count); | |||
String & toLowerCase(void); | |||
String & toUpperCase(void); | |||
String & trim(void); |
@@ -1,24 +1,24 @@ | |||
/* ---------------------------------------------------------------------- | |||
* Copyright (C) 2010 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 11. November 2010 | |||
* $Revision: V1.0.2 | |||
* | |||
* Project: CMSIS DSP Library | |||
* Title: arm_common_tables.h | |||
* | |||
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions | |||
* | |||
/* ---------------------------------------------------------------------- | |||
* Copyright (C) 2010 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 11. November 2010 | |||
* $Revision: V1.0.2 | |||
* | |||
* Project: CMSIS DSP Library | |||
* Title: arm_common_tables.h | |||
* | |||
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions | |||
* | |||
* Target Processor: Cortex-M4/Cortex-M3 | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* -------------------------------------------------------------------- */ | |||
#ifndef _ARM_COMMON_TABLES_H |
@@ -1,33 +1,33 @@ | |||
/* ---------------------------------------------------------------------- | |||
* Copyright (C) 2010-2011 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 15. February 2012 | |||
* $Revision: V1.1.0 | |||
* | |||
* Project: CMSIS DSP Library | |||
/* ---------------------------------------------------------------------- | |||
* Copyright (C) 2010-2011 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 15. February 2012 | |||
* $Revision: V1.1.0 | |||
* | |||
* Project: CMSIS DSP Library | |||
* Title: arm_math.h | |||
* | |||
* | |||
* Description: Public header file for CMSIS DSP Library | |||
* | |||
* | |||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | |||
* | |||
* Version 1.1.0 2012/02/15 | |||
* Updated with more optimizations, bug fixes and minor API changes. | |||
* | |||
* Version 1.0.10 2011/7/15 | |||
* Big Endian support added and Merged M0 and M3/M4 Source code. | |||
* | |||
* Version 1.0.3 2010/11/29 | |||
* Re-organized the CMSIS folders and updated documentation. | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.1.0 2012/02/15 | |||
* Updated with more optimizations, bug fixes and minor API changes. | |||
* | |||
* Version 1.0.10 2011/7/15 | |||
* Big Endian support added and Merged M0 and M3/M4 Source code. | |||
* | |||
* Version 1.0.3 2010/11/29 | |||
* Re-organized the CMSIS folders and updated documentation. | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* -------------------------------------------------------------------- */ | |||
/** | |||
@@ -35,10 +35,10 @@ | |||
* | |||
* <b>Introduction</b> | |||
* | |||
* This user manual describes the CMSIS DSP software library, | |||
* This user manual describes the CMSIS DSP software library, | |||
* a suite of common signal processing functions for use on Cortex-M processor based devices. | |||
* | |||
* The library is divided into a number of functions each covering a specific category: | |||
* The library is divided into a number of functions each covering a specific category: | |||
* - Basic math functions | |||
* - Fast math functions | |||
* - Complex math functions | |||
@@ -51,40 +51,40 @@ | |||
* - Interpolation functions | |||
* | |||
* The library has separate functions for operating on 8-bit integers, 16-bit integers, | |||
* 32-bit integer and 32-bit floating-point values. | |||
* 32-bit integer and 32-bit floating-point values. | |||
* | |||
* <b>Pre-processor Macros</b> | |||
* | |||
* Each library project have differant pre-processor macros. | |||
* | |||
* - UNALIGNED_SUPPORT_DISABLE: | |||
* | |||
* Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access | |||
* | |||
* - ARM_MATH_BIG_ENDIAN: | |||
* | |||
* Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. | |||
* | |||
* - ARM_MATH_MATRIX_CHECK: | |||
* | |||
* Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices | |||
* | |||
* - ARM_MATH_ROUNDING: | |||
* | |||
* <b>Pre-processor Macros</b> | |||
* | |||
* Each library project have differant pre-processor macros. | |||
* | |||
* - UNALIGNED_SUPPORT_DISABLE: | |||
* | |||
* Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access | |||
* | |||
* - ARM_MATH_BIG_ENDIAN: | |||
* | |||
* Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. | |||
* | |||
* - ARM_MATH_MATRIX_CHECK: | |||
* | |||
* Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices | |||
* | |||
* - ARM_MATH_ROUNDING: | |||
* | |||
* Define macro ARM_MATH_ROUNDING for rounding on support functions | |||
* | |||
* - ARM_MATH_CMx: | |||
* | |||
* Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target | |||
* and ARM_MATH_CM0 for building library on cortex-M0 target. | |||
* | |||
* | |||
* - __FPU_PRESENT: | |||
* | |||
* Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries | |||
* Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries | |||
* | |||
* <b>Toolchain Support</b> | |||
* | |||
* The library has been developed and tested with MDK-ARM version 4.23. | |||
* The library has been developed and tested with MDK-ARM version 4.23. | |||
* The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly. | |||
* | |||
* <b>Using the Library</b> | |||
@@ -100,9 +100,9 @@ | |||
* - arm_cortexM0b_math.lib (Big endian on Cortex-M3) | |||
* | |||
* The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder. | |||
* Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single | |||
* public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. | |||
* Define the appropriate pre processor MACRO ARM_MATH_CM4 or ARM_MATH_CM3 or | |||
* Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single | |||
* public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. | |||
* Define the appropriate pre processor MACRO ARM_MATH_CM4 or ARM_MATH_CM3 or | |||
* ARM_MATH_CM0 depending on the target processor in the application. | |||
* | |||
* <b>Examples</b> | |||
@@ -115,7 +115,7 @@ | |||
* - arm_cortexM0b_math.uvproj | |||
* - arm_cortexM0l_math.uvproj | |||
* - arm_cortexM3b_math.uvproj | |||
* - arm_cortexM3l_math.uvproj | |||
* - arm_cortexM3l_math.uvproj | |||
* - arm_cortexM4b_math.uvproj | |||
* - arm_cortexM4l_math.uvproj | |||
* - arm_cortexM4bf_math.uvproj | |||
@@ -385,7 +385,7 @@ extern "C" | |||
#else | |||
#define __SIMD32(addr) (*(__packed int32_t **) & (addr)) | |||
#define _SIMD32_OFFSET(addr) (*(__packed int32_t * ) (addr)) | |||
#endif | |||
#endif | |||
#define __SIMD64(addr) (*(int64_t **) & (addr)) | |||
@@ -1545,7 +1545,7 @@ extern "C" | |||
* @param[in] *pSrcA points to the first input matrix structure | |||
* @param[in] *pSrcB points to the second input matrix structure | |||
* @param[out] *pDst points to output matrix structure | |||
* @param[in] *pState points to the array for storing intermediate results | |||
* @param[in] *pState points to the array for storing intermediate results | |||
* @return The function returns either | |||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. | |||
*/ | |||
@@ -2281,13 +2281,13 @@ extern "C" | |||
float32_t * pCoef, | |||
uint16_t twidCoefModifier); | |||
/** | |||
* @brief Core function for the Radix-2 Q31 CFFT butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type. | |||
* @param[in] fftLen length of the FFT. | |||
/** | |||
* @brief Core function for the Radix-2 Q31 CFFT butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type. | |||
* @param[in] fftLen length of the FFT. | |||
* @param[in] *pCoef points to Twiddle coefficient buffer. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
*/ | |||
void arm_radix2_butterfly_q31( | |||
@@ -2296,13 +2296,13 @@ extern "C" | |||
q31_t * pCoef, | |||
uint16_t twidCoefModifier); | |||
/** | |||
* @brief Core function for the Radix-2 Q15 CFFT butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q15 data type. | |||
* @param[in] fftLen length of the FFT. | |||
/** | |||
* @brief Core function for the Radix-2 Q15 CFFT butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q15 data type. | |||
* @param[in] fftLen length of the FFT. | |||
* @param[in] *pCoef points to Twiddle coefficient buffer. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
*/ | |||
void arm_radix2_butterfly_q15( | |||
@@ -2311,13 +2311,13 @@ extern "C" | |||
q15_t * pCoef, | |||
uint16_t twidCoefModifier); | |||
/** | |||
* @brief Core function for the Radix-2 Q15 CFFT Inverse butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q15 data type. | |||
* @param[in] fftLen length of the FFT. | |||
/** | |||
* @brief Core function for the Radix-2 Q15 CFFT Inverse butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q15 data type. | |||
* @param[in] fftLen length of the FFT. | |||
* @param[in] *pCoef points to Twiddle coefficient buffer. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
*/ | |||
void arm_radix2_butterfly_inverse_q15( | |||
@@ -2326,13 +2326,13 @@ extern "C" | |||
q15_t * pCoef, | |||
uint16_t twidCoefModifier); | |||
/** | |||
* @brief Core function for the Radix-2 Q31 CFFT Inverse butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type. | |||
* @param[in] fftLen length of the FFT. | |||
/** | |||
* @brief Core function for the Radix-2 Q31 CFFT Inverse butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type. | |||
* @param[in] fftLen length of the FFT. | |||
* @param[in] *pCoef points to Twiddle coefficient buffer. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. | |||
* @return none. | |||
*/ | |||
void arm_radix2_butterfly_inverse_q31( | |||
@@ -2358,7 +2358,7 @@ extern "C" | |||
uint16_t twidCoefModifier, | |||
float32_t onebyfftLen); | |||
/** | |||
/** | |||
* @brief Core function for the Q31 CIFFT butterfly process. | |||
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type. | |||
* @param[in] fftLen length of the FFT. | |||
@@ -3169,7 +3169,7 @@ extern "C" | |||
q31_t * pDst, | |||
uint32_t blockSize); | |||
/** | |||
* @brief Copies the elements of a floating-point vector. | |||
* @brief Copies the elements of a floating-point vector. | |||
* @param[in] *pSrc input pointer | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3181,7 +3181,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Copies the elements of a Q7 vector. | |||
* @brief Copies the elements of a Q7 vector. | |||
* @param[in] *pSrc input pointer | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3193,7 +3193,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Copies the elements of a Q15 vector. | |||
* @brief Copies the elements of a Q15 vector. | |||
* @param[in] *pSrc input pointer | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3205,7 +3205,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Copies the elements of a Q31 vector. | |||
* @brief Copies the elements of a Q31 vector. | |||
* @param[in] *pSrc input pointer | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3216,7 +3216,7 @@ extern "C" | |||
q31_t * pDst, | |||
uint32_t blockSize); | |||
/** | |||
* @brief Fills a constant value into a floating-point vector. | |||
* @brief Fills a constant value into a floating-point vector. | |||
* @param[in] value input value to be filled | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3228,7 +3228,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Fills a constant value into a Q7 vector. | |||
* @brief Fills a constant value into a Q7 vector. | |||
* @param[in] value input value to be filled | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3240,7 +3240,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Fills a constant value into a Q15 vector. | |||
* @brief Fills a constant value into a Q15 vector. | |||
* @param[in] value input value to be filled | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3252,7 +3252,7 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Fills a constant value into a Q31 vector. | |||
* @brief Fills a constant value into a Q31 vector. | |||
* @param[in] value input value to be filled | |||
* @param[out] *pDst output pointer | |||
* @param[in] blockSize number of samples to process | |||
@@ -3263,14 +3263,14 @@ extern "C" | |||
q31_t * pDst, | |||
uint32_t blockSize); | |||
/** | |||
* @brief Convolution of floating-point sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. | |||
* @return none. | |||
/** | |||
* @brief Convolution of floating-point sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. | |||
* @return none. | |||
*/ | |||
void arm_conv_f32( | |||
@@ -3280,17 +3280,17 @@ extern "C" | |||
uint32_t srcBLen, | |||
float32_t * pDst); | |||
/** | |||
* @brief Convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1. | |||
* @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return none. | |||
/** | |||
* @brief Convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1. | |||
* @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return none. | |||
*/ | |||
@@ -3304,14 +3304,14 @@ extern "C" | |||
q15_t * pScratch2); | |||
/** | |||
* @brief Convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. | |||
* @return none. | |||
/** | |||
* @brief Convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1. | |||
* @return none. | |||
*/ | |||
void arm_conv_q15( | |||
@@ -3345,9 +3345,9 @@ extern "C" | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1. | |||
* @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return none. | |||
* @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return none. | |||
*/ | |||
void arm_conv_fast_opt_q15( | |||
@@ -3396,16 +3396,16 @@ extern "C" | |||
q31_t * pDst); | |||
/** | |||
* @brief Convolution of Q7 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return none. | |||
/** | |||
* @brief Convolution of Q7 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return none. | |||
*/ | |||
void arm_conv_opt_q7( | |||
@@ -3458,18 +3458,18 @@ extern "C" | |||
uint32_t firstIndex, | |||
uint32_t numPoints); | |||
/** | |||
* @brief Partial convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data | |||
* @param[in] firstIndex is the first output sample to start with. | |||
* @param[in] numPoints is the number of output points to be computed. | |||
* @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
/** | |||
* @brief Partial convolution of Q15 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data | |||
* @param[in] firstIndex is the first output sample to start with. | |||
* @param[in] numPoints is the number of output points to be computed. | |||
* @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
*/ | |||
arm_status arm_conv_partial_opt_q15( | |||
@@ -3536,9 +3536,9 @@ extern "C" | |||
* @param[out] *pDst points to the block of output data | |||
* @param[in] firstIndex is the first output sample to start with. | |||
* @param[in] numPoints is the number of output points to be computed. | |||
* @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
* @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
*/ | |||
arm_status arm_conv_partial_fast_opt_q15( | |||
@@ -3597,18 +3597,18 @@ extern "C" | |||
uint32_t numPoints); | |||
/** | |||
* @brief Partial convolution of Q7 sequences | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data | |||
* @param[in] firstIndex is the first output sample to start with. | |||
* @param[in] numPoints is the number of output points to be computed. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
/** | |||
* @brief Partial convolution of Q7 sequences | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data | |||
* @param[in] firstIndex is the first output sample to start with. | |||
* @param[in] numPoints is the number of output points to be computed. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. | |||
*/ | |||
arm_status arm_conv_partial_opt_q7( | |||
@@ -3652,10 +3652,10 @@ extern "C" | |||
typedef struct | |||
{ | |||
uint8_t M; /**< decimation factor. */ | |||
uint16_t numTaps; /**< number of coefficients in the filter. */ | |||
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
uint8_t M; /**< decimation factor. */ | |||
uint16_t numTaps; /**< number of coefficients in the filter. */ | |||
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
} arm_fir_decimate_instance_q15; | |||
/** | |||
@@ -3666,8 +3666,8 @@ extern "C" | |||
{ | |||
uint8_t M; /**< decimation factor. */ | |||
uint16_t numTaps; /**< number of coefficients in the filter. */ | |||
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
} arm_fir_decimate_instance_q31; | |||
@@ -3677,10 +3677,10 @@ extern "C" | |||
typedef struct | |||
{ | |||
uint8_t M; /**< decimation factor. */ | |||
uint16_t numTaps; /**< number of coefficients in the filter. */ | |||
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
uint8_t M; /**< decimation factor. */ | |||
uint16_t numTaps; /**< number of coefficients in the filter. */ | |||
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ | |||
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ | |||
} arm_fir_decimate_instance_f32; | |||
@@ -4100,8 +4100,8 @@ extern "C" | |||
* @brief Initialization function for the Q15 FIR lattice filter. | |||
* @param[in] *S points to an instance of the Q15 FIR lattice structure. | |||
* @param[in] numStages number of filter stages. | |||
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages. | |||
* @param[in] *pState points to the state buffer. The array is of length numStages. | |||
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages. | |||
* @param[in] *pState points to the state buffer. The array is of length numStages. | |||
* @return none. | |||
*/ | |||
@@ -4668,15 +4668,15 @@ extern "C" | |||
float32_t * pDst); | |||
/** | |||
* @brief Correlation of Q15 sequences | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. | |||
* @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @return none. | |||
/** | |||
* @brief Correlation of Q15 sequences | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. | |||
* @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @return none. | |||
*/ | |||
void arm_correlate_opt_q15( | |||
q15_t * pSrcA, | |||
@@ -4730,7 +4730,7 @@ extern "C" | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. | |||
* @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @return none. | |||
*/ | |||
@@ -4778,16 +4778,16 @@ extern "C" | |||
/** | |||
* @brief Correlation of Q7 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return none. | |||
/** | |||
* @brief Correlation of Q7 sequences. | |||
* @param[in] *pSrcA points to the first input sequence. | |||
* @param[in] srcALen length of the first input sequence. | |||
* @param[in] *pSrcB points to the second input sequence. | |||
* @param[in] srcBLen length of the second input sequence. | |||
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. | |||
* @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. | |||
* @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). | |||
* @return none. | |||
*/ | |||
void arm_correlate_opt_q7( | |||
@@ -5033,9 +5033,9 @@ extern "C" | |||
/* | |||
* @brief Floating-point sin_cos function. | |||
* @param[in] theta input value in degrees | |||
* @param[out] *pSinVal points to the processed sine output. | |||
* @param[out] *pCosVal points to the processed cos output. | |||
* @param[in] theta input value in degrees | |||
* @param[out] *pSinVal points to the processed sine output. | |||
* @param[out] *pCosVal points to the processed cos output. | |||
* @return none. | |||
*/ | |||
@@ -5046,9 +5046,9 @@ extern "C" | |||
/* | |||
* @brief Q31 sin_cos function. | |||
* @param[in] theta scaled input value in degrees | |||
* @param[out] *pSinVal points to the processed sine output. | |||
* @param[out] *pCosVal points to the processed cosine output. | |||
* @param[in] theta scaled input value in degrees | |||
* @param[out] *pSinVal points to the processed sine output. | |||
* @param[out] *pCosVal points to the processed cosine output. | |||
* @return none. | |||
*/ | |||
@@ -5146,7 +5146,7 @@ extern "C" | |||
/** | |||
* @defgroup PID PID Motor Control | |||
* | |||
* A Proportional Integral Derivative (PID) controller is a generic feedback control | |||
* A Proportional Integral Derivative (PID) controller is a generic feedback control | |||
* loop mechanism widely used in industrial control systems. | |||
* A PID controller is the most commonly used type of feedback controller. | |||
* | |||
@@ -5165,39 +5165,39 @@ extern "C" | |||
* | |||
* \par | |||
* where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant | |||
* | |||
* \par | |||
* \image html PID.gif "Proportional Integral Derivative Controller" | |||
* | |||
* \par | |||
* \image html PID.gif "Proportional Integral Derivative Controller" | |||
* | |||
* \par | |||
* The PID controller calculates an "error" value as the difference between | |||
* the measured output and the reference input. | |||
* The controller attempts to minimize the error by adjusting the process control inputs. | |||
* The proportional value determines the reaction to the current error, | |||
* the integral value determines the reaction based on the sum of recent errors, | |||
* The controller attempts to minimize the error by adjusting the process control inputs. | |||
* The proportional value determines the reaction to the current error, | |||
* the integral value determines the reaction based on the sum of recent errors, | |||
* and the derivative value determines the reaction based on the rate at which the error has been changing. | |||
* | |||
* \par Instance Structure | |||
* The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. | |||
* A separate instance structure must be defined for each PID Controller. | |||
* There are separate instance structure declarations for each of the 3 supported data types. | |||
* | |||
* \par Reset Functions | |||
* There is also an associated reset function for each data type which clears the state array. | |||
* \par Instance Structure | |||
* The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. | |||
* A separate instance structure must be defined for each PID Controller. | |||
* There are separate instance structure declarations for each of the 3 supported data types. | |||
* | |||
* \par Reset Functions | |||
* There is also an associated reset function for each data type which clears the state array. | |||
* | |||
* \par Initialization Functions | |||
* There is also an associated initialization function for each data type. | |||
* The initialization function performs the following operations: | |||
* \par Initialization Functions | |||
* There is also an associated initialization function for each data type. | |||
* The initialization function performs the following operations: | |||
* - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. | |||
* - Zeros out the values in the state buffer. | |||
* | |||
* \par | |||
* Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. | |||
* - Zeros out the values in the state buffer. | |||
* | |||
* \par | |||
* Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. | |||
* | |||
* \par Fixed-Point Behavior | |||
* Care must be taken when using the fixed-point versions of the PID Controller functions. | |||
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. | |||
* Refer to the function specific documentation below for usage guidelines. | |||
* \par Fixed-Point Behavior | |||
* Care must be taken when using the fixed-point versions of the PID Controller functions. | |||
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. | |||
* Refer to the function specific documentation below for usage guidelines. | |||
*/ | |||
/** | |||
@@ -5239,13 +5239,13 @@ extern "C" | |||
* @param[in] in input sample to process | |||
* @return out processed output sample. | |||
* | |||
* <b>Scaling and Overflow Behavior:</b> | |||
* \par | |||
* The function is implemented using an internal 64-bit accumulator. | |||
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. | |||
* Thus, if the accumulator result overflows it wraps around rather than clip. | |||
* In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. | |||
* After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. | |||
* <b>Scaling and Overflow Behavior:</b> | |||
* \par | |||
* The function is implemented using an internal 64-bit accumulator. | |||
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. | |||
* Thus, if the accumulator result overflows it wraps around rather than clip. | |||
* In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. | |||
* After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. | |||
*/ | |||
__STATIC_INLINE q31_t arm_pid_q31( | |||
@@ -5286,13 +5286,13 @@ extern "C" | |||
* @param[in] in input sample to process | |||
* @return out processed output sample. | |||
* | |||
* <b>Scaling and Overflow Behavior:</b> | |||
* \par | |||
* The function is implemented using a 64-bit internal accumulator. | |||
* Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. | |||
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. | |||
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. | |||
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. | |||
* <b>Scaling and Overflow Behavior:</b> | |||
* \par | |||
* The function is implemented using a 64-bit internal accumulator. | |||
* Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. | |||
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. | |||
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. | |||
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. | |||
* Lastly, the accumulator is saturated to yield a result in 1.15 format. | |||
*/ | |||
@@ -5383,7 +5383,7 @@ extern "C" | |||
* and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code> | |||
* can be calculated using only <code>Ia</code> and <code>Ib</code>. | |||
* | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The library provides separate functions for Q31 and floating-point data types. | |||
* \par Algorithm | |||
* \image html clarkeFormula.gif | |||
@@ -5487,8 +5487,8 @@ extern "C" | |||
/** | |||
* @defgroup inv_clarke Vector Inverse Clarke Transform | |||
* Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases. | |||
* | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The library provides separate functions for Q31 and floating-point data types. | |||
* \par Algorithm | |||
* \image html clarkeInvFormula.gif | |||
@@ -5530,7 +5530,7 @@ extern "C" | |||
} | |||
/** | |||
* @brief Inverse Clarke transform for Q31 version | |||
* @brief Inverse Clarke transform for Q31 version | |||
* @param[in] Ialpha input two-phase orthogonal vector axis alpha | |||
* @param[in] Ibeta input two-phase orthogonal vector axis beta | |||
* @param[out] *pIa points to output three-phase coordinate <code>a</code> | |||
@@ -5592,19 +5592,19 @@ extern "C" | |||
* @defgroup park Vector Park Transform | |||
* | |||
* Forward Park transform converts the input two-coordinate vector to flux and torque components. | |||
* The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents | |||
* from the stationary to the moving reference frame and control the spatial relationship between | |||
* The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents | |||
* from the stationary to the moving reference frame and control the spatial relationship between | |||
* the stator vector current and rotor flux vector. | |||
* If we consider the d axis aligned with the rotor flux, the diagram below shows the | |||
* If we consider the d axis aligned with the rotor flux, the diagram below shows the | |||
* current vector and the relationship from the two reference frames: | |||
* \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame" | |||
* | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The library provides separate functions for Q31 and floating-point data types. | |||
* \par Algorithm | |||
* \image html parkFormula.gif | |||
* where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components, | |||
* <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the | |||
* where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components, | |||
* <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the | |||
* cosine and sine values of theta (rotor flux position). | |||
* \par Fixed-Point Behavior | |||
* Care must be taken when using the Q31 version of the Park transform. | |||
@@ -5648,7 +5648,7 @@ extern "C" | |||
} | |||
/** | |||
* @brief Park transform for Q31 version | |||
* @brief Park transform for Q31 version | |||
* @param[in] Ialpha input two-phase vector coordinate alpha | |||
* @param[in] Ibeta input two-phase vector coordinate beta | |||
* @param[out] *pId points to output rotor reference frame d | |||
@@ -5721,12 +5721,12 @@ extern "C" | |||
* @defgroup inv_park Vector Inverse Park transform | |||
* Inverse Park transform converts the input flux and torque components to two-coordinate vector. | |||
* | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The function operates on a single sample of data and each call to the function returns the processed output. | |||
* The library provides separate functions for Q31 and floating-point data types. | |||
* \par Algorithm | |||
* \image html parkInvFormula.gif | |||
* where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components, | |||
* <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the | |||
* where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components, | |||
* <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the | |||
* cosine and sine values of theta (rotor flux position). | |||
* \par Fixed-Point Behavior | |||
* Care must be taken when using the Q31 version of the Park transform. | |||
@@ -5768,7 +5768,7 @@ extern "C" | |||
/** | |||
* @brief Inverse Park transform for Q31 version | |||
* @brief Inverse Park transform for Q31 version | |||
* @param[in] Id input coordinate of rotor reference frame d | |||
* @param[in] Iq input coordinate of rotor reference frame q | |||
* @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha | |||
@@ -5844,7 +5844,7 @@ extern "C" | |||
* Linear interpolation is a method of curve fitting using linear polynomials. | |||
* Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line | |||
* | |||
* \par | |||
* \par | |||
* \image html LinearInterp.gif "Linear interpolation" | |||
* | |||
* \par | |||
@@ -5864,10 +5864,10 @@ extern "C" | |||
* sample of data and each call to the function returns a single processed value. | |||
* <code>S</code> points to an instance of the Linear Interpolate function data structure. | |||
* <code>x</code> is the input sample value. The functions returns the output value. | |||
* | |||
* | |||
* \par | |||
* if x is outside of the table boundary, Linear interpolation returns first value of the table | |||
* if x is below input range and returns last value of table if x is above range. | |||
* if x is outside of the table boundary, Linear interpolation returns first value of the table | |||
* if x is below input range and returns last value of table if x is above range. | |||
*/ | |||
/** | |||
@@ -5999,7 +5999,7 @@ extern "C" | |||
* | |||
* \par | |||
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. | |||
* This function can support maximum of table size 2^12. | |||
* This function can support maximum of table size 2^12. | |||
* | |||
*/ | |||
@@ -6179,7 +6179,7 @@ extern "C" | |||
* @defgroup SQRT Square Root | |||
* | |||
* Computes the square root of a number. | |||
* There are separate functions for Q15, Q31, and floating-point data types. | |||
* There are separate functions for Q15, Q31, and floating-point data types. | |||
* The square root function is computed using the Newton-Raphson algorithm. | |||
* This is an iterative algorithm of the form: | |||
* <pre> | |||
@@ -7089,11 +7089,11 @@ extern "C" | |||
uint32_t numSamples); | |||
/** | |||
* @brief Converts the elements of the floating-point vector to Q31 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @brief Converts the elements of the floating-point vector to Q31 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @param[out] *pDst points to the Q31 output vector | |||
* @param[in] blockSize length of the input vector | |||
* @return none. | |||
* @param[in] blockSize length of the input vector | |||
* @return none. | |||
*/ | |||
void arm_float_to_q31( | |||
float32_t * pSrc, | |||
@@ -7101,10 +7101,10 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Converts the elements of the floating-point vector to Q15 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @brief Converts the elements of the floating-point vector to Q15 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @param[out] *pDst points to the Q15 output vector | |||
* @param[in] blockSize length of the input vector | |||
* @param[in] blockSize length of the input vector | |||
* @return none | |||
*/ | |||
void arm_float_to_q15( | |||
@@ -7113,10 +7113,10 @@ extern "C" | |||
uint32_t blockSize); | |||
/** | |||
* @brief Converts the elements of the floating-point vector to Q7 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @brief Converts the elements of the floating-point vector to Q7 vector. | |||
* @param[in] *pSrc points to the floating-point input vector | |||
* @param[out] *pDst points to the Q7 output vector | |||
* @param[in] blockSize length of the input vector | |||
* @param[in] blockSize length of the input vector | |||
* @return none | |||
*/ | |||
void arm_float_to_q7( | |||
@@ -7236,12 +7236,12 @@ extern "C" | |||
* + f(XF, YF+1) * (1-(x-XF))*(y-YF) | |||
* + f(XF+1, YF+1) * (x-XF)*(y-YF) | |||
* </pre> | |||
* Note that the coordinates (x, y) contain integer and fractional components. | |||
* Note that the coordinates (x, y) contain integer and fractional components. | |||
* The integer components specify which portion of the table to use while the | |||
* fractional components control the interpolation processor. | |||
* | |||
* \par | |||
* if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. | |||
* if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. | |||
*/ | |||
/** |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -47,28 +47,28 @@ class PORTDemulation | |||
public: | |||
inline PORTDemulation & operator = (int val) __attribute__((always_inline)) { | |||
digitalWriteFast(0, (val & (1<<0))); | |||
if (!(CORE_PIN0_DDRREG & CORE_PIN0_BIT)) | |||
if (!(CORE_PIN0_DDRREG & CORE_PIN0_BIT)) | |||
CORE_PIN0_CONFIG = ((val & (1<<0)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(1, (val & (1<<1))); | |||
if (!(CORE_PIN1_DDRREG & CORE_PIN1_BIT)) | |||
if (!(CORE_PIN1_DDRREG & CORE_PIN1_BIT)) | |||
CORE_PIN1_CONFIG = ((val & (1<<1)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(2, (val & (1<<2))); | |||
if (!(CORE_PIN2_DDRREG & CORE_PIN2_BIT)) | |||
if (!(CORE_PIN2_DDRREG & CORE_PIN2_BIT)) | |||
CORE_PIN2_CONFIG = ((val & (1<<2)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(3, (val & (1<<3))); | |||
if (!(CORE_PIN3_DDRREG & CORE_PIN3_BIT)) | |||
if (!(CORE_PIN3_DDRREG & CORE_PIN3_BIT)) | |||
CORE_PIN3_CONFIG = ((val & (1<<3)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(4, (val & (1<<4))); | |||
if (!(CORE_PIN4_DDRREG & CORE_PIN4_BIT)) | |||
if (!(CORE_PIN4_DDRREG & CORE_PIN4_BIT)) | |||
CORE_PIN4_CONFIG = ((val & (1<<4)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(5, (val & (1<<5))); | |||
if (!(CORE_PIN5_DDRREG & CORE_PIN5_BIT)) | |||
if (!(CORE_PIN5_DDRREG & CORE_PIN5_BIT)) | |||
CORE_PIN5_CONFIG = ((val & (1<<5)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(6, (val & (1<<6))); | |||
if (!(CORE_PIN6_DDRREG & CORE_PIN6_BIT)) | |||
if (!(CORE_PIN6_DDRREG & CORE_PIN6_BIT)) | |||
CORE_PIN6_CONFIG = ((val & (1<<6)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(7, (val & (1<<7))); | |||
if (!(CORE_PIN7_DDRREG & CORE_PIN7_BIT)) | |||
if (!(CORE_PIN7_DDRREG & CORE_PIN7_BIT)) | |||
CORE_PIN7_CONFIG = ((val & (1<<7)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
return *this; | |||
} | |||
@@ -298,22 +298,22 @@ class PORTBemulation | |||
public: | |||
inline PORTBemulation & operator = (int val) __attribute__((always_inline)) { | |||
digitalWriteFast(8, (val & (1<<0))); | |||
if (!(CORE_PIN8_DDRREG & CORE_PIN8_BIT)) | |||
if (!(CORE_PIN8_DDRREG & CORE_PIN8_BIT)) | |||
CORE_PIN8_CONFIG = ((val & (1<<0)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(9, (val & (1<<1))); | |||
if (!(CORE_PIN9_DDRREG & CORE_PIN9_BIT)) | |||
if (!(CORE_PIN9_DDRREG & CORE_PIN9_BIT)) | |||
CORE_PIN9_CONFIG = ((val & (1<<1)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(10, (val & (1<<2))); | |||
if (!(CORE_PIN10_DDRREG & CORE_PIN10_BIT)) | |||
if (!(CORE_PIN10_DDRREG & CORE_PIN10_BIT)) | |||
CORE_PIN10_CONFIG = ((val & (1<<2)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(11, (val & (1<<3))); | |||
if (!(CORE_PIN11_DDRREG & CORE_PIN11_BIT)) | |||
if (!(CORE_PIN11_DDRREG & CORE_PIN11_BIT)) | |||
CORE_PIN11_CONFIG = ((val & (1<<3)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(12, (val & (1<<4))); | |||
if (!(CORE_PIN12_DDRREG & CORE_PIN12_BIT)) | |||
if (!(CORE_PIN12_DDRREG & CORE_PIN12_BIT)) | |||
CORE_PIN12_CONFIG = ((val & (1<<4)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(13, (val & (1<<5))); | |||
if (!(CORE_PIN13_DDRREG & CORE_PIN13_BIT)) | |||
if (!(CORE_PIN13_DDRREG & CORE_PIN13_BIT)) | |||
CORE_PIN13_CONFIG = ((val & (1<<5)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
return *this; | |||
} | |||
@@ -499,22 +499,22 @@ class PORTCemulation | |||
public: | |||
inline PORTCemulation & operator = (int val) __attribute__((always_inline)) { | |||
digitalWriteFast(14, (val & (1<<0))); | |||
if (!(CORE_PIN14_DDRREG & CORE_PIN14_BIT)) | |||
if (!(CORE_PIN14_DDRREG & CORE_PIN14_BIT)) | |||
CORE_PIN14_CONFIG = ((val & (1<<0)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(15, (val & (1<<1))); | |||
if (!(CORE_PIN15_DDRREG & CORE_PIN15_BIT)) | |||
if (!(CORE_PIN15_DDRREG & CORE_PIN15_BIT)) | |||
CORE_PIN15_CONFIG = ((val & (1<<1)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(16, (val & (1<<2))); | |||
if (!(CORE_PIN16_DDRREG & CORE_PIN16_BIT)) | |||
if (!(CORE_PIN16_DDRREG & CORE_PIN16_BIT)) | |||
CORE_PIN16_CONFIG = ((val & (1<<2)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(17, (val & (1<<3))); | |||
if (!(CORE_PIN17_DDRREG & CORE_PIN17_BIT)) | |||
if (!(CORE_PIN17_DDRREG & CORE_PIN17_BIT)) | |||
CORE_PIN17_CONFIG = ((val & (1<<3)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(18, (val & (1<<4))); | |||
if (!(CORE_PIN18_DDRREG & CORE_PIN18_BIT)) | |||
if (!(CORE_PIN18_DDRREG & CORE_PIN18_BIT)) | |||
CORE_PIN18_CONFIG = ((val & (1<<4)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
digitalWriteFast(19, (val & (1<<5))); | |||
if (!(CORE_PIN19_DDRREG & CORE_PIN19_BIT)) | |||
if (!(CORE_PIN19_DDRREG & CORE_PIN19_BIT)) | |||
CORE_PIN19_CONFIG = ((val & (1<<5)) ? CONFIG_PULLUP : CONFIG_NOPULLUP); | |||
return *this; | |||
} |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -669,14 +669,14 @@ typedef struct | |||
__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ | |||
uint32_t RESERVED2[15]; | |||
__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ | |||
uint32_t RESERVED3[29]; | |||
uint32_t RESERVED3[29]; | |||
__O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ | |||
__I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ | |||
__IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ | |||
uint32_t RESERVED4[43]; | |||
uint32_t RESERVED4[43]; | |||
__O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ | |||
__I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ | |||
uint32_t RESERVED5[6]; | |||
uint32_t RESERVED5[6]; | |||
__I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ | |||
__I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ | |||
__I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -50,29 +50,29 @@ | |||
// Pin Arduino | |||
// 0 B16 RXD | |||
// 1 B17 TXD | |||
// 2 D0 | |||
// 3 A12 FTM1_CH0 | |||
// 4 A13 FTM1_CH1 | |||
// 2 D0 | |||
// 3 A12 FTM1_CH0 | |||
// 4 A13 FTM1_CH1 | |||
// 5 D7 FTM0_CH7 OC0B/T1 | |||
// 6 D4 FTM0_CH4 OC0A | |||
// 7 D2 | |||
// 7 D2 | |||
// 8 D3 ICP1 | |||
// 9 C3 FTM0_CH2 OC1A | |||
// 10 C4 FTM0_CH3 SS/OC1B | |||
// 11 C6 MOSI/OC2A | |||
// 12 C7 MISO | |||
// 13 C5 SCK | |||
// 14 D1 | |||
// 15 C0 | |||
// 16 B0 (FTM1_CH0) | |||
// 17 B1 (FTM1_CH1) | |||
// 13 C5 SCK | |||
// 14 D1 | |||
// 15 C0 | |||
// 16 B0 (FTM1_CH0) | |||
// 17 B1 (FTM1_CH1) | |||
// 18 B3 SDA | |||
// 19 B2 SCL | |||
// 20 D5 FTM0_CH5 | |||
// 21 D6 FTM0_CH6 | |||
// 22 C1 FTM0_CH0 | |||
// 23 C2 FTM0_CH1 | |||
// 24 A5 (FTM0_CH2) | |||
// 20 D5 FTM0_CH5 | |||
// 21 D6 FTM0_CH6 | |||
// 22 C1 FTM0_CH0 | |||
// 23 C2 FTM0_CH1 | |||
// 24 A5 (FTM0_CH2) | |||
// 25 B19 | |||
// 26 E1 | |||
// 27 C9 | |||
@@ -773,7 +773,7 @@ static inline void delayMicroseconds(uint32_t usec) | |||
#if F_CPU == 168000000 | |||
uint32_t n = usec * 56; | |||
#elif F_CPU == 144000000 | |||
uint32_t n = usec * 48; | |||
uint32_t n = usec * 48; | |||
#elif F_CPU == 120000000 | |||
uint32_t n = usec * 40; | |||
#elif F_CPU == 96000000 |
@@ -1,17 +1,17 @@ | |||
/* Elapsed time types - for easy-to-use measurements of elapsed time | |||
* http://www.pjrc.com/teensy/ | |||
* Copyright (c) 2011 PJRC.COM, LLC | |||
* | |||
* | |||
* Permission is hereby granted, free of charge, to any person obtaining a copy | |||
* of this software and associated documentation files (the "Software"), to deal | |||
* in the Software without restriction, including without limitation the rights | |||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |||
* copies of the Software, and to permit persons to whom the Software is | |||
* furnished to do so, subject to the following conditions: | |||
* | |||
* | |||
* The above copyright notice and this permission notice shall be included in | |||
* all copies or substantial portions of the Software. | |||
* | |||
* | |||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -63,7 +63,7 @@ const KEYCODE_TYPE keycodes_ascii[] = { | |||
M(ASCII_74), M(ASCII_75), M(ASCII_76), M(ASCII_77), | |||
M(ASCII_78), M(ASCII_79), M(ASCII_7A), M(ASCII_7B), | |||
M(ASCII_7C), M(ASCII_7D), M(ASCII_7E), M(ASCII_7F) | |||
}; | |||
}; | |||
#ifdef ISO_8859_1_A0 | |||
const KEYCODE_TYPE keycodes_iso_8859_1[] = { |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -233,8 +233,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -286,7 +286,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE // 91 [ | |||
#define ASCII_5C KEY_BACKSLASH // 92 | |||
#define ASCII_5C KEY_BACKSLASH // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE // 93 ] | |||
#define ASCII_5E KEY_6 + SHIFT_MASK // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -352,8 +352,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 ACUTE_ACCENT_BITS + KEY_SPACE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 ACUTE_ACCENT_BITS + KEY_SPACE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -405,7 +405,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE // 91 [ | |||
#define ASCII_5C KEY_BACKSLASH // 92 | |||
#define ASCII_5C KEY_BACKSLASH // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -570,8 +570,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_RIGHT_BRACE // 43 + | |||
@@ -623,7 +623,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Z + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Y + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -789,8 +789,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_RIGHT_BRACE // 43 + | |||
@@ -842,7 +842,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Z + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Y + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_5 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_7 + ALTGR_MASK + SHIFT_MASK // 92 | |||
#define ASCII_5C KEY_7 + ALTGR_MASK + SHIFT_MASK // 92 | |||
#define ASCII_5D KEY_6 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -1012,9 +1012,9 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_COMMA + SHIFT_MASK // 39 ' | |||
//#define ASCII_27 ACUTE_ACCENT_BITS + KEY_SPACE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_COMMA + SHIFT_MASK // 39 ' | |||
//#define ASCII_27 ACUTE_ACCENT_BITS + KEY_SPACE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -1066,7 +1066,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -1233,8 +1233,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_COMMA + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_COMMA + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -1286,7 +1286,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_9 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_TILDE + SHIFT_MASK // 92 | |||
#define ASCII_5C KEY_TILDE + SHIFT_MASK // 92 | |||
#define ASCII_5D KEY_0 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -1440,8 +1440,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -1493,7 +1493,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE // 93 ] | |||
#define ASCII_5E KEY_6 + SHIFT_MASK // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -1660,8 +1660,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_MINUS // 43 + | |||
@@ -1713,7 +1713,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -1883,8 +1883,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_RIGHT_BRACE // 36 $ | |||
#define ASCII_25 KEY_QUOTE + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_1 // 38 & | |||
#define ASCII_27 KEY_4 // 39 ' | |||
#define ASCII_28 KEY_5 // 40 ( | |||
#define ASCII_27 KEY_4 // 39 ' | |||
#define ASCII_28 KEY_5 // 40 ( | |||
#define ASCII_29 KEY_MINUS // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -1936,7 +1936,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_W + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_5 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_8 + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_8 + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_MINUS + ALTGR_MASK // 93 ] | |||
#define ASCII_5E KEY_9 + ALTGR_MASK // 94 ^ | |||
#define ASCII_5F KEY_8 // 95 _ | |||
@@ -2104,8 +2104,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_MINUS // 43 + | |||
@@ -2157,7 +2157,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -2326,8 +2326,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_MINUS // 43 + | |||
@@ -2379,7 +2379,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_EQUAL // 92 | |||
#define ASCII_5C KEY_EQUAL // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -2549,8 +2549,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_MINUS // 43 + | |||
@@ -2602,7 +2602,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -2772,8 +2772,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_RIGHT_BRACE // 43 + | |||
@@ -2825,7 +2825,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -3046,7 +3046,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_TILDE + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -3206,8 +3206,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_RIGHT_BRACE // 43 + | |||
@@ -3259,7 +3259,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_TILDE // 92 | |||
#define ASCII_5C KEY_TILDE // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E KEY_EQUAL + SHIFT_MASK // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -3639,8 +3639,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_RIGHT_BRACE // 36 $ | |||
#define ASCII_25 KEY_QUOTE + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_1 // 38 & | |||
#define ASCII_27 KEY_4 // 39 ' | |||
#define ASCII_28 KEY_5 // 40 ( | |||
#define ASCII_27 KEY_4 // 39 ' | |||
#define ASCII_28 KEY_5 // 40 ( | |||
#define ASCII_29 KEY_MINUS // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_SLASH + SHIFT_MASK // 43 + | |||
@@ -3692,7 +3692,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_W + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_RIGHT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_LEFT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E KEY_6 + ALTGR_MASK // 94 ^ | |||
#define ASCII_5F KEY_EQUAL + SHIFT_MASK // 95 _ | |||
@@ -3859,8 +3859,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_BACKSLASH // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_3 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_1 + SHIFT_MASK // 43 + | |||
@@ -3912,7 +3912,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Z + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Y + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -4079,8 +4079,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_BACKSLASH // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_3 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_1 + SHIFT_MASK // 43 + | |||
@@ -4132,7 +4132,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Z + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Y + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_NON_US_100 + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -4298,8 +4298,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_MINUS // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_RIGHT_BRACE + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_RIGHT_BRACE // 43 + | |||
@@ -4351,7 +4351,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_QUOTE + SHIFT_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_BACKSLASH + SHIFT_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ | |||
@@ -4508,8 +4508,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_7 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_QUOTE // 39 ' | |||
#define ASCII_28 KEY_9 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_0 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_8 + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_EQUAL + SHIFT_MASK // 43 + | |||
@@ -4561,7 +4561,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_LEFT_BRACE // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5D KEY_RIGHT_BRACE // 93 ] | |||
#define ASCII_5E KEY_6 + SHIFT_MASK // 94 ^ | |||
#define ASCII_5F KEY_MINUS + SHIFT_MASK // 95 _ | |||
@@ -4729,8 +4729,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + SHIFT_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_QUOTE + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_QUOTE + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_BACKSLASH + SHIFT_MASK // 42 * | |||
#define ASCII_2B KEY_BACKSLASH // 43 + | |||
@@ -4782,7 +4782,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_EQUAL + SHIFT_MASK // 95 _ | |||
@@ -4949,8 +4949,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_4 + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_5 + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_6 + SHIFT_MASK // 38 & | |||
#define ASCII_27 KEY_2 + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_2 + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_8 + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_9 + SHIFT_MASK // 41 ) | |||
#define ASCII_2A KEY_MINUS // 42 * | |||
#define ASCII_2B KEY_4 + SHIFT_MASK // 43 + | |||
@@ -5002,7 +5002,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Y + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Z + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_8 + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5C KEY_MINUS + ALTGR_MASK // 92 | |||
#define ASCII_5D KEY_9 + ALTGR_MASK // 93 ] | |||
#define ASCII_5E CIRCUMFLEX_BITS + KEY_SPACE // 94 ^ | |||
#define ASCII_5F KEY_EQUAL + SHIFT_MASK // 95 _ | |||
@@ -5194,8 +5194,8 @@ extern "C"{ | |||
#define ASCII_24 KEY_SEMICOLON + ALTGR_MASK // 36 $ | |||
#define ASCII_25 KEY_MINUS + SHIFT_MASK // 37 % | |||
#define ASCII_26 KEY_C + ALTGR_MASK // 38 & | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_RIGHT_BRACE + SHIFT_MASK // 40 ( | |||
#define ASCII_27 KEY_BACKSLASH + SHIFT_MASK // 39 ' | |||
#define ASCII_28 KEY_RIGHT_BRACE + SHIFT_MASK // 40 ( | |||
#define ASCII_29 KEY_RIGHT_BRACE // 41 ) | |||
#define ASCII_2A KEY_SLASH + ALTGR_MASK // 42 * | |||
#define ASCII_2B KEY_1 // 43 + | |||
@@ -5247,7 +5247,7 @@ extern "C"{ | |||
#define ASCII_59 KEY_Z + SHIFT_MASK // 89 Y | |||
#define ASCII_5A KEY_Y + SHIFT_MASK // 90 Z | |||
#define ASCII_5B KEY_F + ALTGR_MASK // 91 [ | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5C KEY_NON_US_100 // 92 | |||
#define ASCII_5D KEY_G + ALTGR_MASK // 93 ] | |||
#define ASCII_5E KEY_3 + ALTGR_MASK // 94 ^ TODO: testme | |||
#define ASCII_5F KEY_SLASH + SHIFT_MASK // 95 _ |
@@ -1,32 +1,32 @@ | |||
/* ---------------------------------------------------------------------- | |||
* Copyright (C) 2010 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 29. November 2010 | |||
* $Revision: V1.0.3 | |||
* | |||
* Project: CMSIS DSP Library | |||
* Copyright (C) 2010 ARM Limited. All rights reserved. | |||
* | |||
* $Date: 29. November 2010 | |||
* $Revision: V1.0.3 | |||
* | |||
* Project: CMSIS DSP Library | |||
* | |||
* Title: math_helper.h | |||
* | |||
* | |||
* Description: Prototypes of all helper functions required. | |||
* | |||
* Description: Prototypes of all helper functions required. | |||
* | |||
* Target Processor: Cortex-M4/Cortex-M3 | |||
* | |||
* Version 1.0.3 2010/11/29 | |||
* Re-organized the CMSIS folders and updated documentation. | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 0.0.7 2010/06/10 | |||
* Misra-C changes done | |||
* | |||
* Version 1.0.3 2010/11/29 | |||
* Re-organized the CMSIS folders and updated documentation. | |||
* | |||
* Version 1.0.2 2010/11/11 | |||
* Documentation updated. | |||
* | |||
* Version 1.0.1 2010/10/05 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 1.0.0 2010/09/20 | |||
* Production release and review comments incorporated. | |||
* | |||
* Version 0.0.7 2010/06/10 | |||
* Misra-C changes done | |||
* -------------------------------------------------------------------- */ | |||
@@ -40,7 +40,7 @@ extern "C" | |||
{ | |||
#endif | |||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); | |||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); | |||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); | |||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); | |||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -268,7 +268,7 @@ extern "C" { | |||
#define SIM_SOPT1 *(volatile uint32_t *)0x40047000 // System Options Register 1 | |||
#define SIM_SOPT1CFG *(volatile uint32_t *)0x40047004 // SOPT1 Configuration Register | |||
#define SIM_SOPT2 *(volatile uint32_t *)0x40048004 // System Options Register 2 | |||
#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL | |||
#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL | |||
#define SIM_SOPT2_PLLFLLSEL (uint32_t)0x00010000 // 0=FLL, 1=PLL | |||
#define SIM_SOPT2_TRACECLKSEL (uint32_t)0x00001000 // 0=MCGOUTCLK, 1=CPU | |||
#define SIM_SOPT2_PTD7PAD (uint32_t)0x00000800 // 0=normal, 1=double drive PTD7 | |||
@@ -672,7 +672,7 @@ extern "C" { | |||
#define DMA_TCD_NBYTES_DMLOE ((uint32_t)1<<30) // Destination Minor Loop Offset Enable | |||
#define DMA_TCD_NBYTES_MLOFFNO_NBYTES(n) ((uint32_t)(n)) // NBytes transfer count when minor loop disabled | |||
#define DMA_TCD_NBYTES_MLOFFYES_NBYTES(n) ((uint32_t)(n & 0x1F)) // NBytes transfer count when minor loop enabled | |||
#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(n) ((uint32_t)(n & 0xFFFFF)<<10) // Offset | |||
#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(n) ((uint32_t)(n & 0xFFFFF)<<10) // Offset | |||
#define DMA_TCD0_SADDR *(volatile const void * volatile *)0x40009000 // TCD Source Address | |||
#define DMA_TCD0_SOFF *(volatile int16_t *)0x40009004 // TCD Signed Source Address Offset | |||
@@ -975,10 +975,10 @@ extern "C" { | |||
#define MCG_C2 *(volatile uint8_t *)0x40064001 // MCG Control 2 Register | |||
#define MCG_C2_IRCS (uint8_t)0x01 // Internal Reference Clock Select, Selects between the fast or slow internal reference clock source. | |||
#define MCG_C2_LP (uint8_t)0x02 // Low Power Select, Controls whether the FLL or PLL is disabled in BLPI and BLPE modes. | |||
#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock. | |||
#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock. | |||
#define MCG_C2_HGO0 (uint8_t)0x08 // High Gain Oscillator Select, Controls the crystal oscillator mode of operation | |||
#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator | |||
#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 | |||
#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 | |||
#define MCG_C3 *(volatile uint8_t *)0x40064002 // MCG Control 3 Register | |||
#define MCG_C3_SCTRIM(n) (uint8_t)(n) // Slow Internal Reference Clock Trim Setting | |||
#define MCG_C4 *(volatile uint8_t *)0x40064003 // MCG Control 4 Register | |||
@@ -993,7 +993,7 @@ extern "C" { | |||
#define MCG_C6 *(volatile uint8_t *)0x40064005 // MCG Control 6 Register | |||
#define MCG_C6_VDIV0(n) (uint8_t)((n) & 0x1F) // VCO 0 Divider | |||
#define MCG_C6_CME0 (uint8_t)0x20 // Clock Monitor Enable | |||
#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. | |||
#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. | |||
#define MCG_C6_LOLIE0 (uint8_t)0x80 // Loss of Lock Interrrupt Enable | |||
#define MCG_S *(volatile uint8_t *)0x40064006 // MCG Status Register | |||
#define MCG_S_IRCST (uint8_t)0x01 // Internal Reference Clock Status | |||
@@ -1173,25 +1173,25 @@ extern "C" { | |||
#define ADC1_CLM1 *(volatile uint32_t *)0x400BB068 // ADC minus-side general calibration value register | |||
#define ADC1_CLM0 *(volatile uint32_t *)0x400BB06C // ADC minus-side general calibration value register | |||
#define DAC0_DAT0L *(volatile uint8_t *)0x400CC000 // DAC Data Low Register | |||
#define DAC0_DATH *(volatile uint8_t *)0x400CC001 // DAC Data High Register | |||
#define DAC0_DAT1L *(volatile uint8_t *)0x400CC002 // DAC Data Low Register | |||
#define DAC0_DAT2L *(volatile uint8_t *)0x400CC004 // DAC Data Low Register | |||
#define DAC0_DAT3L *(volatile uint8_t *)0x400CC006 // DAC Data Low Register | |||
#define DAC0_DAT4L *(volatile uint8_t *)0x400CC008 // DAC Data Low Register | |||
#define DAC0_DAT5L *(volatile uint8_t *)0x400CC00A // DAC Data Low Register | |||
#define DAC0_DAT6L *(volatile uint8_t *)0x400CC00C // DAC Data Low Register | |||
#define DAC0_DAT7L *(volatile uint8_t *)0x400CC00E // DAC Data Low Register | |||
#define DAC0_DAT8L *(volatile uint8_t *)0x400CC010 // DAC Data Low Register | |||
#define DAC0_DAT9L *(volatile uint8_t *)0x400CC012 // DAC Data Low Register | |||
#define DAC0_DAT10L *(volatile uint8_t *)0x400CC014 // DAC Data Low Register | |||
#define DAC0_DAT11L *(volatile uint8_t *)0x400CC016 // DAC Data Low Register | |||
#define DAC0_DAT12L *(volatile uint8_t *)0x400CC018 // DAC Data Low Register | |||
#define DAC0_DAT13L *(volatile uint8_t *)0x400CC01A // DAC Data Low Register | |||
#define DAC0_DAT14L *(volatile uint8_t *)0x400CC01C // DAC Data Low Register | |||
#define DAC0_DAT15L *(volatile uint8_t *)0x400CC01E // DAC Data Low Register | |||
#define DAC0_SR *(volatile uint8_t *)0x400CC020 // DAC Status Register | |||
#define DAC0_C0 *(volatile uint8_t *)0x400CC021 // DAC Control Register | |||
#define DAC0_DAT0L *(volatile uint8_t *)0x400CC000 // DAC Data Low Register | |||
#define DAC0_DATH *(volatile uint8_t *)0x400CC001 // DAC Data High Register | |||
#define DAC0_DAT1L *(volatile uint8_t *)0x400CC002 // DAC Data Low Register | |||
#define DAC0_DAT2L *(volatile uint8_t *)0x400CC004 // DAC Data Low Register | |||
#define DAC0_DAT3L *(volatile uint8_t *)0x400CC006 // DAC Data Low Register | |||
#define DAC0_DAT4L *(volatile uint8_t *)0x400CC008 // DAC Data Low Register | |||
#define DAC0_DAT5L *(volatile uint8_t *)0x400CC00A // DAC Data Low Register | |||
#define DAC0_DAT6L *(volatile uint8_t *)0x400CC00C // DAC Data Low Register | |||
#define DAC0_DAT7L *(volatile uint8_t *)0x400CC00E // DAC Data Low Register | |||
#define DAC0_DAT8L *(volatile uint8_t *)0x400CC010 // DAC Data Low Register | |||
#define DAC0_DAT9L *(volatile uint8_t *)0x400CC012 // DAC Data Low Register | |||
#define DAC0_DAT10L *(volatile uint8_t *)0x400CC014 // DAC Data Low Register | |||
#define DAC0_DAT11L *(volatile uint8_t *)0x400CC016 // DAC Data Low Register | |||
#define DAC0_DAT12L *(volatile uint8_t *)0x400CC018 // DAC Data Low Register | |||
#define DAC0_DAT13L *(volatile uint8_t *)0x400CC01A // DAC Data Low Register | |||
#define DAC0_DAT14L *(volatile uint8_t *)0x400CC01C // DAC Data Low Register | |||
#define DAC0_DAT15L *(volatile uint8_t *)0x400CC01E // DAC Data Low Register | |||
#define DAC0_SR *(volatile uint8_t *)0x400CC020 // DAC Status Register | |||
#define DAC0_C0 *(volatile uint8_t *)0x400CC021 // DAC Control Register | |||
#define DAC_C0_DACEN 0x80 // DAC Enable | |||
#define DAC_C0_DACRFS 0x40 // DAC Reference Select | |||
#define DAC_C0_DACTRGSEL 0x20 // DAC Trigger Select | |||
@@ -1200,19 +1200,19 @@ extern "C" { | |||
#define DAC_C0_DACBWIEN 0x04 // DAC Buffer Watermark Interrupt Enable | |||
#define DAC_C0_DACBTIEN 0x02 // DAC Buffer Read Pointer Top Flag Interrupt Enable | |||
#define DAC_C0_DACBBIEN 0x01 // DAC Buffer Read Pointer Bottom Flag Interrupt Enable | |||
#define DAC0_C1 *(volatile uint8_t *)0x400CC022 // DAC Control Register 1 | |||
#define DAC0_C1 *(volatile uint8_t *)0x400CC022 // DAC Control Register 1 | |||
#define DAC_C1_DMAEN 0x80 // DMA Enable Select | |||
#define DAC_C1_DACBFWM(n) (((n) & 3) << 3) // DAC Buffer Watermark Select | |||
#define DAC_C1_DACBFMD(n) (((n) & 3) << 0) // DAC Buffer Work Mode Select | |||
#define DAC_C1_DACBFEN 0x00 // DAC Buffer Enable | |||
#define DAC0_C2 *(volatile uint8_t *)0x400CC023 // DAC Control Register 2 | |||
#define DAC0_C2 *(volatile uint8_t *)0x400CC023 // DAC Control Register 2 | |||
#define DAC_C2_DACBFRP(n) (((n) & 15) << 4) // DAC Buffer Read Pointer | |||
#define DAC_C2_DACBFUP(n) (((n) & 15) << 0) // DAC Buffer Upper Limit | |||
//#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator | |||
//#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 | |||
//#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 | |||
// Chapter 32: Comparator (CMP) | |||
#define CMP0_CR0 *(volatile uint8_t *)0x40073000 // CMP Control Register 0 | |||
@@ -1302,14 +1302,14 @@ extern "C" { | |||
#define FTM_MODE_INIT 0x02 // Initialize The Channels Output | |||
#define FTM_MODE_FTMEN 0x01 // FTM Enable | |||
#define FTM0_SYNC *(volatile uint32_t *)0x40038058 // Synchronization | |||
#define FTM_SYNC_SWSYNC 0x80 // | |||
#define FTM_SYNC_TRIG2 0x40 // | |||
#define FTM_SYNC_TRIG1 0x20 // | |||
#define FTM_SYNC_TRIG0 0x10 // | |||
#define FTM_SYNC_SYNCHOM 0x08 // | |||
#define FTM_SYNC_REINIT 0x04 // | |||
#define FTM_SYNC_CNTMAX 0x02 // | |||
#define FTM_SYNC_CNTMIN 0x01 // | |||
#define FTM_SYNC_SWSYNC 0x80 // | |||
#define FTM_SYNC_TRIG2 0x40 // | |||
#define FTM_SYNC_TRIG1 0x20 // | |||
#define FTM_SYNC_TRIG0 0x10 // | |||
#define FTM_SYNC_SYNCHOM 0x08 // | |||
#define FTM_SYNC_REINIT 0x04 // | |||
#define FTM_SYNC_CNTMAX 0x02 // | |||
#define FTM_SYNC_CNTMIN 0x01 // | |||
#define FTM0_OUTINIT *(volatile uint32_t *)0x4003805C // Initial State For Channels Output | |||
#define FTM0_OUTMASK *(volatile uint32_t *)0x40038060 // Output Mask | |||
#define FTM0_COMBINE *(volatile uint32_t *)0x40038064 // Function For Linked Channels | |||
@@ -1430,21 +1430,21 @@ extern "C" { | |||
#define RTC_TCR_CIR(n) (((n) & 255) << 8) // Compensation Interval Register | |||
#define RTC_TCR_TCR(n) (((n) & 255) << 0) // Time Compensation Register | |||
#define RTC_CR *(volatile uint32_t *)0x4003D010 // RTC Control Register | |||
#define RTC_CR_SC2P (uint32_t)0x00002000 // | |||
#define RTC_CR_SC4P (uint32_t)0x00001000 // | |||
#define RTC_CR_SC8P (uint32_t)0x00000800 // | |||
#define RTC_CR_SC16P (uint32_t)0x00000400 // | |||
#define RTC_CR_CLKO (uint32_t)0x00000200 // | |||
#define RTC_CR_OSCE (uint32_t)0x00000100 // | |||
#define RTC_CR_UM (uint32_t)0x00000008 // | |||
#define RTC_CR_SUP (uint32_t)0x00000004 // | |||
#define RTC_CR_WPE (uint32_t)0x00000002 // | |||
#define RTC_CR_SWR (uint32_t)0x00000001 // | |||
#define RTC_CR_SC2P (uint32_t)0x00002000 // | |||
#define RTC_CR_SC4P (uint32_t)0x00001000 // | |||
#define RTC_CR_SC8P (uint32_t)0x00000800 // | |||
#define RTC_CR_SC16P (uint32_t)0x00000400 // | |||
#define RTC_CR_CLKO (uint32_t)0x00000200 // | |||
#define RTC_CR_OSCE (uint32_t)0x00000100 // | |||
#define RTC_CR_UM (uint32_t)0x00000008 // | |||
#define RTC_CR_SUP (uint32_t)0x00000004 // | |||
#define RTC_CR_WPE (uint32_t)0x00000002 // | |||
#define RTC_CR_SWR (uint32_t)0x00000001 // | |||
#define RTC_SR *(volatile uint32_t *)0x4003D014 // RTC Status Register | |||
#define RTC_SR_TCE (uint32_t)0x00000010 // | |||
#define RTC_SR_TAF (uint32_t)0x00000004 // | |||
#define RTC_SR_TOF (uint32_t)0x00000002 // | |||
#define RTC_SR_TIF (uint32_t)0x00000001 // | |||
#define RTC_SR_TCE (uint32_t)0x00000010 // | |||
#define RTC_SR_TAF (uint32_t)0x00000004 // | |||
#define RTC_SR_TOF (uint32_t)0x00000002 // | |||
#define RTC_SR_TIF (uint32_t)0x00000001 // | |||
#define RTC_LR *(volatile uint32_t *)0x4003D018 // RTC Lock Register | |||
#define RTC_IER *(volatile uint32_t *)0x4003D01C // RTC Interrupt Enable Register | |||
#define RTC_WAR *(volatile uint32_t *)0x4003D800 // RTC Write Access Register | |||
@@ -1463,71 +1463,71 @@ extern "C" { | |||
#define USB_OTGISTAT_B_SESS_CHG (uint8_t)0x04 // | |||
#define USB_OTGISTAT_AVBUSCHG (uint8_t)0x01 // | |||
#define USB0_OTGICR *(volatile uint8_t *)0x40072014 // OTG Interrupt Control Register | |||
#define USB_OTGICR_IDEN (uint8_t)0x80 // | |||
#define USB_OTGICR_ONEMSECEN (uint8_t)0x40 // | |||
#define USB_OTGICR_LINESTATEEN (uint8_t)0x20 // | |||
#define USB_OTGICR_SESSVLDEN (uint8_t)0x08 // | |||
#define USB_OTGICR_BSESSEN (uint8_t)0x04 // | |||
#define USB_OTGICR_AVBUSEN (uint8_t)0x01 // | |||
#define USB_OTGICR_IDEN (uint8_t)0x80 // | |||
#define USB_OTGICR_ONEMSECEN (uint8_t)0x40 // | |||
#define USB_OTGICR_LINESTATEEN (uint8_t)0x20 // | |||
#define USB_OTGICR_SESSVLDEN (uint8_t)0x08 // | |||
#define USB_OTGICR_BSESSEN (uint8_t)0x04 // | |||
#define USB_OTGICR_AVBUSEN (uint8_t)0x01 // | |||
#define USB0_OTGSTAT *(volatile uint8_t *)0x40072018 // OTG Status register | |||
#define USB_OTGSTAT_ID (uint8_t)0x80 // | |||
#define USB_OTGSTAT_ONEMSECEN (uint8_t)0x40 // | |||
#define USB_OTGSTAT_LINESTATESTABLE (uint8_t)0x20 // | |||
#define USB_OTGSTAT_SESS_VLD (uint8_t)0x08 // | |||
#define USB_OTGSTAT_BSESSEND (uint8_t)0x04 // | |||
#define USB_OTGSTAT_AVBUSVLD (uint8_t)0x01 // | |||
#define USB_OTGSTAT_ID (uint8_t)0x80 // | |||
#define USB_OTGSTAT_ONEMSECEN (uint8_t)0x40 // | |||
#define USB_OTGSTAT_LINESTATESTABLE (uint8_t)0x20 // | |||
#define USB_OTGSTAT_SESS_VLD (uint8_t)0x08 // | |||
#define USB_OTGSTAT_BSESSEND (uint8_t)0x04 // | |||
#define USB_OTGSTAT_AVBUSVLD (uint8_t)0x01 // | |||
#define USB0_OTGCTL *(volatile uint8_t *)0x4007201C // OTG Control Register | |||
#define USB_OTGCTL_DPHIGH (uint8_t)0x80 // | |||
#define USB_OTGCTL_DPLOW (uint8_t)0x20 // | |||
#define USB_OTGCTL_DMLOW (uint8_t)0x10 // | |||
#define USB_OTGCTL_OTGEN (uint8_t)0x04 // | |||
#define USB_OTGCTL_DPHIGH (uint8_t)0x80 // | |||
#define USB_OTGCTL_DPLOW (uint8_t)0x20 // | |||
#define USB_OTGCTL_DMLOW (uint8_t)0x10 // | |||
#define USB_OTGCTL_OTGEN (uint8_t)0x04 // | |||
#define USB0_ISTAT *(volatile uint8_t *)0x40072080 // Interrupt Status Register | |||
#define USB_ISTAT_STALL (uint8_t)0x80 // | |||
#define USB_ISTAT_ATTACH (uint8_t)0x40 // | |||
#define USB_ISTAT_RESUME (uint8_t)0x20 // | |||
#define USB_ISTAT_SLEEP (uint8_t)0x10 // | |||
#define USB_ISTAT_TOKDNE (uint8_t)0x08 // | |||
#define USB_ISTAT_SOFTOK (uint8_t)0x04 // | |||
#define USB_ISTAT_ERROR (uint8_t)0x02 // | |||
#define USB_ISTAT_USBRST (uint8_t)0x01 // | |||
#define USB_ISTAT_STALL (uint8_t)0x80 // | |||
#define USB_ISTAT_ATTACH (uint8_t)0x40 // | |||
#define USB_ISTAT_RESUME (uint8_t)0x20 // | |||
#define USB_ISTAT_SLEEP (uint8_t)0x10 // | |||
#define USB_ISTAT_TOKDNE (uint8_t)0x08 // | |||
#define USB_ISTAT_SOFTOK (uint8_t)0x04 // | |||
#define USB_ISTAT_ERROR (uint8_t)0x02 // | |||
#define USB_ISTAT_USBRST (uint8_t)0x01 // | |||
#define USB0_INTEN *(volatile uint8_t *)0x40072084 // Interrupt Enable Register | |||
#define USB_INTEN_STALLEN (uint8_t)0x80 // | |||
#define USB_INTEN_ATTACHEN (uint8_t)0x40 // | |||
#define USB_INTEN_RESUMEEN (uint8_t)0x20 // | |||
#define USB_INTEN_SLEEPEN (uint8_t)0x10 // | |||
#define USB_INTEN_TOKDNEEN (uint8_t)0x08 // | |||
#define USB_INTEN_SOFTOKEN (uint8_t)0x04 // | |||
#define USB_INTEN_ERROREN (uint8_t)0x02 // | |||
#define USB_INTEN_USBRSTEN (uint8_t)0x01 // | |||
#define USB_INTEN_STALLEN (uint8_t)0x80 // | |||
#define USB_INTEN_ATTACHEN (uint8_t)0x40 // | |||
#define USB_INTEN_RESUMEEN (uint8_t)0x20 // | |||
#define USB_INTEN_SLEEPEN (uint8_t)0x10 // | |||
#define USB_INTEN_TOKDNEEN (uint8_t)0x08 // | |||
#define USB_INTEN_SOFTOKEN (uint8_t)0x04 // | |||
#define USB_INTEN_ERROREN (uint8_t)0x02 // | |||
#define USB_INTEN_USBRSTEN (uint8_t)0x01 // | |||
#define USB0_ERRSTAT *(volatile uint8_t *)0x40072088 // Error Interrupt Status Register | |||
#define USB_ERRSTAT_BTSERR (uint8_t)0x80 // | |||
#define USB_ERRSTAT_DMAERR (uint8_t)0x20 // | |||
#define USB_ERRSTAT_BTOERR (uint8_t)0x10 // | |||
#define USB_ERRSTAT_DFN8 (uint8_t)0x08 // | |||
#define USB_ERRSTAT_CRC16 (uint8_t)0x04 // | |||
#define USB_ERRSTAT_CRC5EOF (uint8_t)0x02 // | |||
#define USB_ERRSTAT_PIDERR (uint8_t)0x01 // | |||
#define USB_ERRSTAT_BTSERR (uint8_t)0x80 // | |||
#define USB_ERRSTAT_DMAERR (uint8_t)0x20 // | |||
#define USB_ERRSTAT_BTOERR (uint8_t)0x10 // | |||
#define USB_ERRSTAT_DFN8 (uint8_t)0x08 // | |||
#define USB_ERRSTAT_CRC16 (uint8_t)0x04 // | |||
#define USB_ERRSTAT_CRC5EOF (uint8_t)0x02 // | |||
#define USB_ERRSTAT_PIDERR (uint8_t)0x01 // | |||
#define USB0_ERREN *(volatile uint8_t *)0x4007208C // Error Interrupt Enable Register | |||
#define USB_ERREN_BTSERREN (uint8_t)0x80 // | |||
#define USB_ERREN_DMAERREN (uint8_t)0x20 // | |||
#define USB_ERREN_BTOERREN (uint8_t)0x10 // | |||
#define USB_ERREN_DFN8EN (uint8_t)0x08 // | |||
#define USB_ERREN_CRC16EN (uint8_t)0x04 // | |||
#define USB_ERREN_CRC5EOFEN (uint8_t)0x02 // | |||
#define USB_ERREN_PIDERREN (uint8_t)0x01 // | |||
#define USB_ERREN_BTSERREN (uint8_t)0x80 // | |||
#define USB_ERREN_DMAERREN (uint8_t)0x20 // | |||
#define USB_ERREN_BTOERREN (uint8_t)0x10 // | |||
#define USB_ERREN_DFN8EN (uint8_t)0x08 // | |||
#define USB_ERREN_CRC16EN (uint8_t)0x04 // | |||
#define USB_ERREN_CRC5EOFEN (uint8_t)0x02 // | |||
#define USB_ERREN_PIDERREN (uint8_t)0x01 // | |||
#define USB0_STAT *(volatile uint8_t *)0x40072090 // Status Register | |||
#define USB_STAT_TX (uint8_t)0x08 // | |||
#define USB_STAT_ODD (uint8_t)0x04 // | |||
#define USB_STAT_ENDP(n) (uint8_t)((n) >> 4) // | |||
#define USB_STAT_TX (uint8_t)0x08 // | |||
#define USB_STAT_ODD (uint8_t)0x04 // | |||
#define USB_STAT_ENDP(n) (uint8_t)((n) >> 4) // | |||
#define USB0_CTL *(volatile uint8_t *)0x40072094 // Control Register | |||
#define USB_CTL_JSTATE (uint8_t)0x80 // | |||
#define USB_CTL_SE0 (uint8_t)0x40 // | |||
#define USB_CTL_TXSUSPENDTOKENBUSY (uint8_t)0x20 // | |||
#define USB_CTL_RESET (uint8_t)0x10 // | |||
#define USB_CTL_HOSTMODEEN (uint8_t)0x08 // | |||
#define USB_CTL_RESUME (uint8_t)0x04 // | |||
#define USB_CTL_ODDRST (uint8_t)0x02 // | |||
#define USB_CTL_USBENSOFEN (uint8_t)0x01 // | |||
#define USB_CTL_JSTATE (uint8_t)0x80 // | |||
#define USB_CTL_SE0 (uint8_t)0x40 // | |||
#define USB_CTL_TXSUSPENDTOKENBUSY (uint8_t)0x20 // | |||
#define USB_CTL_RESET (uint8_t)0x10 // | |||
#define USB_CTL_HOSTMODEEN (uint8_t)0x08 // | |||
#define USB_CTL_RESUME (uint8_t)0x04 // | |||
#define USB_CTL_ODDRST (uint8_t)0x02 // | |||
#define USB_CTL_USBENSOFEN (uint8_t)0x01 // | |||
#define USB0_ADDR *(volatile uint8_t *)0x40072098 // Address Register | |||
#define USB0_BDTPAGE1 *(volatile uint8_t *)0x4007209C // BDT Page Register 1 | |||
#define USB0_FRMNUML *(volatile uint8_t *)0x400720A0 // Frame Number Register Low | |||
@@ -1563,9 +1563,9 @@ extern "C" { | |||
#define USB_USBCTRL_SUSP (uint8_t)0x80 // Places the USB transceiver into the suspend state. | |||
#define USB_USBCTRL_PDE (uint8_t)0x40 // Enables the weak pulldowns on the USB transceiver. | |||
#define USB0_OBSERVE *(volatile uint8_t *)0x40072104 // USB OTG Observe Register | |||
#define USB_OBSERVE_DPPU (uint8_t)0x80 // | |||
#define USB_OBSERVE_DPPD (uint8_t)0x40 // | |||
#define USB_OBSERVE_DMPD (uint8_t)0x10 // | |||
#define USB_OBSERVE_DPPU (uint8_t)0x80 // | |||
#define USB_OBSERVE_DPPD (uint8_t)0x40 // | |||
#define USB_OBSERVE_DMPD (uint8_t)0x10 // | |||
#define USB0_CONTROL *(volatile uint8_t *)0x40072108 // USB OTG Control Register | |||
#define USB_CONTROL_DPPULLUPNONOTG (uint8_t)0x10 // Provides control of the DP PULLUP in the USB OTG module, if USB is configured in non-OTG device mode. | |||
#define USB0_USBTRC0 *(volatile uint8_t *)0x4007210C // USB Transceiver Control Register 0 | |||
@@ -1586,20 +1586,20 @@ extern "C" { | |||
// Chapter 43: SPI (DSPI) | |||
#define SPI0_MCR *(volatile uint32_t *)0x4002C000 // DSPI Module Configuration Register | |||
#define SPI_MCR_MSTR (uint32_t)0x80000000 // Master/Slave Mode Select | |||
#define SPI_MCR_CONT_SCKE (uint32_t)0x40000000 // | |||
#define SPI_MCR_DCONF(n) (((n) & 3) << 28) // | |||
#define SPI_MCR_FRZ (uint32_t)0x08000000 // | |||
#define SPI_MCR_MTFE (uint32_t)0x04000000 // | |||
#define SPI_MCR_ROOE (uint32_t)0x01000000 // | |||
#define SPI_MCR_CONT_SCKE (uint32_t)0x40000000 // | |||
#define SPI_MCR_DCONF(n) (((n) & 3) << 28) // | |||
#define SPI_MCR_FRZ (uint32_t)0x08000000 // | |||
#define SPI_MCR_MTFE (uint32_t)0x04000000 // | |||
#define SPI_MCR_ROOE (uint32_t)0x01000000 // | |||
#define SPI_MCR_PCSIS(n) (((n) & 0x1F) << 16) // | |||
#define SPI_MCR_DOZE (uint32_t)0x00008000 // | |||
#define SPI_MCR_MDIS (uint32_t)0x00004000 // | |||
#define SPI_MCR_DIS_TXF (uint32_t)0x00002000 // | |||
#define SPI_MCR_DIS_RXF (uint32_t)0x00001000 // | |||
#define SPI_MCR_CLR_TXF (uint32_t)0x00000800 // | |||
#define SPI_MCR_CLR_RXF (uint32_t)0x00000400 // | |||
#define SPI_MCR_DOZE (uint32_t)0x00008000 // | |||
#define SPI_MCR_MDIS (uint32_t)0x00004000 // | |||
#define SPI_MCR_DIS_TXF (uint32_t)0x00002000 // | |||
#define SPI_MCR_DIS_RXF (uint32_t)0x00001000 // | |||
#define SPI_MCR_CLR_TXF (uint32_t)0x00000800 // | |||
#define SPI_MCR_CLR_RXF (uint32_t)0x00000400 // | |||
#define SPI_MCR_SMPL_PT(n) (((n) & 3) << 8) // | |||
#define SPI_MCR_HALT (uint32_t)0x00000001 // | |||
#define SPI_MCR_HALT (uint32_t)0x00000001 // | |||
#define SPI0_TCR *(volatile uint32_t *)0x4002C008 // DSPI Transfer Count Register | |||
#define SPI0_CTAR0 *(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Master Mode | |||
#define SPI_CTAR_DBR (uint32_t)0x80000000 // Double Baud Rate | |||
@@ -1635,10 +1635,10 @@ extern "C" { | |||
#define SPI_RSER_RFDF_RE (uint32_t)0x00020000 // Receive FIFO Drain Request Enable | |||
#define SPI_RSER_RFDF_DIRS (uint32_t)0x00010000 // Receive FIFO Drain DMA or Interrupt Request Select | |||
#define SPI0_PUSHR *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Master Mode | |||
#define SPI_PUSHR_CONT (uint32_t)0x80000000 // | |||
#define SPI_PUSHR_CTAS(n) (((n) & 7) << 28) // | |||
#define SPI_PUSHR_EOQ (uint32_t)0x08000000 // | |||
#define SPI_PUSHR_CTCNT (uint32_t)0x04000000 // | |||
#define SPI_PUSHR_CONT (uint32_t)0x80000000 // | |||
#define SPI_PUSHR_CTAS(n) (((n) & 7) << 28) // | |||
#define SPI_PUSHR_EOQ (uint32_t)0x08000000 // | |||
#define SPI_PUSHR_CTCNT (uint32_t)0x04000000 // | |||
#define SPI_PUSHR_PCS(n) (((n) & 31) << 16) // | |||
#define SPI0_PUSHR_SLAVE *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Slave Mode | |||
#define SPI0_POPR *(volatile uint32_t *)0x4002C038 // DSPI POP RX FIFO Register | |||
@@ -1764,11 +1764,11 @@ typedef struct { | |||
#define UART_PFIFO_TXFE (uint8_t)0x80 | |||
#define UART_PFIFO_RXFE (uint8_t)0x08 | |||
#define UART0_CFIFO *(volatile uint8_t *)0x4006A011 // UART FIFO Control Register | |||
#define UART_CFIFO_TXFLUSH (uint8_t)0x80 // | |||
#define UART_CFIFO_RXFLUSH (uint8_t)0x40 // | |||
#define UART_CFIFO_RXOFE (uint8_t)0x04 // | |||
#define UART_CFIFO_TXOFE (uint8_t)0x02 // | |||
#define UART_CFIFO_RXUFE (uint8_t)0x01 // | |||
#define UART_CFIFO_TXFLUSH (uint8_t)0x80 // | |||
#define UART_CFIFO_RXFLUSH (uint8_t)0x40 // | |||
#define UART_CFIFO_RXOFE (uint8_t)0x04 // | |||
#define UART_CFIFO_TXOFE (uint8_t)0x02 // | |||
#define UART_CFIFO_RXUFE (uint8_t)0x01 // | |||
#define UART0_SFIFO *(volatile uint8_t *)0x4006A012 // UART FIFO Status Register | |||
#define UART_SFIFO_TXEMPT (uint8_t)0x80 | |||
#define UART_SFIFO_RXEMPT (uint8_t)0x40 | |||
@@ -2047,28 +2047,28 @@ typedef struct { | |||
// Chapter 48: Touch sense input (TSI) | |||
#define TSI0_GENCS *(volatile uint32_t *)0x40045000 // General Control and Status Register | |||
#define TSI_GENCS_LPCLKS (uint32_t)0x10000000 // | |||
#define TSI_GENCS_LPSCNITV(n) (((n) & 15) << 24) // | |||
#define TSI_GENCS_NSCN(n) (((n) & 31) << 19) // | |||
#define TSI_GENCS_PS(n) (((n) & 7) << 16) // | |||
#define TSI_GENCS_EOSF (uint32_t)0x00008000 // | |||
#define TSI_GENCS_OUTRGF (uint32_t)0x00004000 // | |||
#define TSI_GENCS_EXTERF (uint32_t)0x00002000 // | |||
#define TSI_GENCS_OVRF (uint32_t)0x00001000 // | |||
#define TSI_GENCS_SCNIP (uint32_t)0x00000200 // | |||
#define TSI_GENCS_SWTS (uint32_t)0x00000100 // | |||
#define TSI_GENCS_TSIEN (uint32_t)0x00000080 // | |||
#define TSI_GENCS_TSIIE (uint32_t)0x00000040 // | |||
#define TSI_GENCS_ERIE (uint32_t)0x00000020 // | |||
#define TSI_GENCS_ESOR (uint32_t)0x00000010 // | |||
#define TSI_GENCS_STM (uint32_t)0x00000002 // | |||
#define TSI_GENCS_STPE (uint32_t)0x00000001 // | |||
#define TSI_GENCS_LPCLKS (uint32_t)0x10000000 // | |||
#define TSI_GENCS_LPSCNITV(n) (((n) & 15) << 24) // | |||
#define TSI_GENCS_NSCN(n) (((n) & 31) << 19) // | |||
#define TSI_GENCS_PS(n) (((n) & 7) << 16) // | |||
#define TSI_GENCS_EOSF (uint32_t)0x00008000 // | |||
#define TSI_GENCS_OUTRGF (uint32_t)0x00004000 // | |||
#define TSI_GENCS_EXTERF (uint32_t)0x00002000 // | |||
#define TSI_GENCS_OVRF (uint32_t)0x00001000 // | |||
#define TSI_GENCS_SCNIP (uint32_t)0x00000200 // | |||
#define TSI_GENCS_SWTS (uint32_t)0x00000100 // | |||
#define TSI_GENCS_TSIEN (uint32_t)0x00000080 // | |||
#define TSI_GENCS_TSIIE (uint32_t)0x00000040 // | |||
#define TSI_GENCS_ERIE (uint32_t)0x00000020 // | |||
#define TSI_GENCS_ESOR (uint32_t)0x00000010 // | |||
#define TSI_GENCS_STM (uint32_t)0x00000002 // | |||
#define TSI_GENCS_STPE (uint32_t)0x00000001 // | |||
#define TSI0_SCANC *(volatile uint32_t *)0x40045004 // SCAN Control Register | |||
#define TSI_SCANC_REFCHRG(n) (((n) & 15) << 24) // | |||
#define TSI_SCANC_EXTCHRG(n) (((n) & 7) << 16) // | |||
#define TSI_SCANC_SMOD(n) (((n) & 255) << 8) // | |||
#define TSI_SCANC_AMCLKS(n) (((n) & 3) << 3) // | |||
#define TSI_SCANC_AMPSC(n) (((n) & 7) << 0) // | |||
#define TSI_SCANC_REFCHRG(n) (((n) & 15) << 24) // | |||
#define TSI_SCANC_EXTCHRG(n) (((n) & 7) << 16) // | |||
#define TSI_SCANC_SMOD(n) (((n) & 255) << 8) // | |||
#define TSI_SCANC_AMCLKS(n) (((n) & 3) << 3) // | |||
#define TSI_SCANC_AMPSC(n) (((n) & 7) << 0) // | |||
#define TSI0_PEN *(volatile uint32_t *)0x40045008 // Pin Enable Register | |||
#define TSI0_WUCNTR *(volatile uint32_t *)0x4004500C // Wake-Up Channel Counter Register | |||
#define TSI0_CNTR1 *(volatile uint32_t *)0x40045100 // Counter Register |
@@ -1,5 +1,5 @@ | |||
/* Header to define new/delete operators as they aren't provided by avr-gcc by default | |||
Taken from http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=59453 | |||
Taken from http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=59453 | |||
*/ | |||
#ifndef NEW_H | |||
@@ -18,7 +18,7 @@ __extension__ typedef int __guard __attribute__((mode (__DI__))); | |||
extern "C" int __cxa_guard_acquire(__guard *); | |||
extern "C" void __cxa_guard_release (__guard *); | |||
extern "C" void __cxa_guard_abort (__guard *); | |||
extern "C" void __cxa_guard_abort (__guard *); | |||
extern "C" void __cxa_pure_virtual(void); | |||
#endif // __cplusplus |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -409,7 +409,7 @@ static uint8_t config_descriptor[CONFIG_DESC_SIZE] = { | |||
// MIDI MS Interface Header, USB MIDI 6.1.2.1, page 21, Table 6-2 | |||
7, // bLength | |||
0x24, // bDescriptorType = CS_INTERFACE | |||
0x01, // bDescriptorSubtype = MS_HEADER | |||
0x01, // bDescriptorSubtype = MS_HEADER | |||
0x00, 0x01, // bcdMSC = revision 01.00 | |||
0x41, 0x00, // wTotalLength | |||
// MIDI IN Jack Descriptor, B.4.3, Table B-7 (embedded), page 40 | |||
@@ -448,7 +448,7 @@ static uint8_t config_descriptor[CONFIG_DESC_SIZE] = { | |||
0, // iJack | |||
// Standard Bulk OUT Endpoint Descriptor, B.5.1, Table B-11, pae 42 | |||
9, // bLength | |||
5, // bDescriptorType = ENDPOINT | |||
5, // bDescriptorType = ENDPOINT | |||
MIDI_RX_ENDPOINT, // bEndpointAddress | |||
0x02, // bmAttributes (0x02=bulk) | |||
MIDI_RX_SIZE, 0, // wMaxPacketSize | |||
@@ -463,7 +463,7 @@ static uint8_t config_descriptor[CONFIG_DESC_SIZE] = { | |||
1, // BaAssocJackID(1) = jack ID #1 | |||
// Standard Bulk IN Endpoint Descriptor, B.5.1, Table B-11, pae 42 | |||
9, // bLength | |||
5, // bDescriptorType = ENDPOINT | |||
5, // bDescriptorType = ENDPOINT | |||
MIDI_TX_ENDPOINT | 0x80, // bEndpointAddress | |||
0x02, // bmAttributes (0x02=bulk) | |||
MIDI_TX_SIZE, 0, // wMaxPacketSize | |||
@@ -800,16 +800,16 @@ const usb_descriptor_list_t usb_descriptor_list[] = { | |||
// 0x19 = Recieve only | |||
// 0x15 = Transmit only | |||
// 0x1D = Transmit & Recieve | |||
// | |||
const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = | |||
// | |||
const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = | |||
{ | |||
0x00, 0x15, 0x19, 0x15, 0x00, 0x00, 0x00, 0x00, | |||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |||
0x00, 0x15, 0x19, 0x15, 0x00, 0x00, 0x00, 0x00, | |||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |||
}; | |||
#endif | |||
const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = | |||
const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = | |||
{ | |||
#if (defined(ENDPOINT1_CONFIG) && NUM_ENDPOINTS >= 1) | |||
ENDPOINT1_CONFIG, |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. | |||
@@ -286,7 +286,7 @@ static void usb_setup(void) | |||
//serial_print("\n"); | |||
for (list = usb_descriptor_list; 1; list++) { | |||
if (list->addr == NULL) break; | |||
//if (setup.wValue == list->wValue && | |||
//if (setup.wValue == list->wValue && | |||
//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) { | |||
if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) { | |||
data = list->addr; | |||
@@ -629,7 +629,7 @@ void usb_rx_memory(usb_packet_t *packet) | |||
__enable_irq(); | |||
// we should never reach this point. If we get here, it means | |||
// usb_rx_memory_needed was set greater than zero, but no memory | |||
// was actually needed. | |||
// was actually needed. | |||
usb_rx_memory_needed = 0; | |||
usb_free(packet); | |||
return; | |||
@@ -867,7 +867,7 @@ void usb_isr(void) | |||
table[index(0, RX, ODD)].addr = ep0_rx1_buf; | |||
table[index(0, TX, EVEN)].desc = 0; | |||
table[index(0, TX, ODD)].desc = 0; | |||
// activate endpoint 0 | |||
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |||
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -10,10 +10,10 @@ | |||
* permit persons to whom the Software is furnished to do so, subject to | |||
* the following conditions: | |||
* | |||
* 1. The above copyright notice and this permission notice shall be | |||
* 1. The above copyright notice and this permission notice shall be | |||
* included in all copies or substantial portions of the Software. | |||
* | |||
* 2. If the Software is incorporated into a build system that allows | |||
* 2. If the Software is incorporated into a build system that allows | |||
* selection among a list of target devices, then similar target | |||
* devices manufactured by PJRC.COM must be included in the list of | |||
* target devices and selectable in the same manner. |
@@ -1,17 +1,17 @@ | |||
/* USB API for Teensy USB Development Board | |||
* http://www.pjrc.com/teensy/teensyduino.html | |||
* Copyright (c) 2008 PJRC.COM, LLC | |||
* | |||
* | |||
* Permission is hereby granted, free of charge, to any person obtaining a copy | |||
* of this software and associated documentation files (the "Software"), to deal | |||
* in the Software without restriction, including without limitation the rights | |||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |||
* copies of the Software, and to permit persons to whom the Software is | |||
* furnished to do so, subject to the following conditions: | |||
* | |||
* | |||
* The above copyright notice and this permission notice shall be included in | |||
* all copies or substantial portions of the Software. | |||
* | |||
* | |||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |||
@@ -255,7 +255,7 @@ void usb_serial_class::write(uint8_t c) | |||
#if ARDUINO >= 100 | |||
size_t usb_serial_class::write(const uint8_t *buffer, uint16_t size) | |||
#else | |||
#define setWriteError() | |||
#define setWriteError() | |||
void usb_serial_class::write(const uint8_t *buffer, uint16_t size) | |||
#endif | |||
{ |