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@@ -1175,7 +1175,6 @@ typedef struct { |
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#define CCM_CBCMR_LCDIF_PODF_MASK ((uint32_t)(0x07 << 23)) |
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#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK ((uint32_t)(0x03 << 18)) |
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#define CCM_CBCMR_TRACE_CLK_SEL_MASK ((uint32_t)(0x03 << 14)) |
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#define CCM_CBCMR_PERIPH_CLK2_SEL_MASK ((uint32_t)(0x03 << 12)) |
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#define CCM_CBCMR_LPSPI_CLK_SEL_MASK ((uint32_t)(0x03 << 4)) |
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#define CCM_CSCMR1_FLEXSPI_CLK_SEL(n) ((uint32_t)(((n) & 0x03) << 29)) |
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#define CCM_CSCMR1_FLEXSPI_PODF(n) ((uint32_t)(((n) & 0x07) << 23)) |
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@@ -6552,7 +6551,20 @@ typedef struct { |
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#define SRC_GPR9 (IMXRT_SRC.offset040) |
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#define SRC_GPR10 (IMXRT_SRC.offset044) |
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// 53.3: page 2986 TODO... |
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// 53.3: page 2986 |
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#define IMXRT_TEMPMON (*(IMXRT_REGISTER32_t *)0x400F8180) |
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#define TEMPMON_TEMPSENSE0 (IMXRT_TEMPMON.offset000) |
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#define TEMPMON_TEMPSENSE0_SET (IMXRT_TEMPMON.offset004) |
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#define TEMPMON_TEMPSENSE0_CLR (IMXRT_TEMPMON.offset008) |
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#define TEMPMON_TEMPSENSE0_TOG (IMXRT_TEMPMON.offset08c) |
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#define TEMPMON_TEMPSENSE1 (IMXRT_TEMPMON.offset090) |
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#define TEMPMON_TEMPSENSE1_SET (IMXRT_TEMPMON.offset094) |
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#define TEMPMON_TEMPSENSE1_CLR (IMXRT_TEMPMON.offset098) |
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#define TEMPMON_TEMPSENSE1_TOG (IMXRT_TEMPMON.offset09C) |
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#define TEMPMON_TEMPSENSE2 (IMXRT_TEMPMON.offset100) |
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#define TEMPMON_TEMPSENSE2_SET (IMXRT_TEMPMON.offset104) |
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#define TEMPMON_TEMPSENSE2_CLR (IMXRT_TEMPMON.offset108) |
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#define TEMPMON_TEMPSENSE2_TOG (IMXRT_TEMPMON.offset10C) |
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// 54.3: page 2998 |
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#define IMXRT_TSC (*(IMXRT_REGISTER32_t *)0x400E0000) |