Browse Source

Add SD Cards as IO pins - plus fix Serial2 and Serial8 for T4 B2

Fixed the Serial2 object to use the new correct pins, plus made Serial8 only valid for T4 B1 (not B2).

Also I defined IO pins for the six signals associated with the SD Card slot.

I have tested these both as IO pins and now as SPI2
main
Kurt Eckhardt 5 years ago
parent
commit
df673baeae
7 changed files with 127 additions and 10 deletions
  1. +4
    -0
      teensy4/HardwareSerial.cpp
  2. +10
    -2
      teensy4/HardwareSerial.h
  3. +5
    -0
      teensy4/HardwareSerial2.cpp
  4. +2
    -0
      teensy4/HardwareSerial8.cpp
  5. +93
    -5
      teensy4/core_pins.h
  6. +9
    -1
      teensy4/digital.c
  7. +4
    -2
      teensy4/pins_arduino.h

+ 4
- 0
teensy4/HardwareSerial.cpp View File



#define UART_CLOCK 24000000 #define UART_CLOCK 24000000


#if defined(__IMXRT1052__)
SerialEventCheckingFunctionPointer HardwareSerial::serial_event_handler_checks[8] = {nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr}; SerialEventCheckingFunctionPointer HardwareSerial::serial_event_handler_checks[8] = {nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr};
#else
SerialEventCheckingFunctionPointer HardwareSerial::serial_event_handler_checks[7] = {nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr};
#endif
uint8_t HardwareSerial::serial_event_handlers_active = 0; uint8_t HardwareSerial::serial_event_handlers_active = 0;





+ 10
- 2
teensy4/HardwareSerial.h View File

extern void IRQHandler_Serial5(); extern void IRQHandler_Serial5();
extern void IRQHandler_Serial6(); extern void IRQHandler_Serial6();
extern void IRQHandler_Serial7(); extern void IRQHandler_Serial7();
#if defined(__IMXRT1052__)
extern void IRQHandler_Serial8(); extern void IRQHandler_Serial8();
#endif
} }


typedef void(*SerialEventCheckingFunctionPointer)(); typedef void(*SerialEventCheckingFunctionPointer)();
friend void IRQHandler_Serial5(); friend void IRQHandler_Serial5();
friend void IRQHandler_Serial6(); friend void IRQHandler_Serial6();
friend void IRQHandler_Serial7(); friend void IRQHandler_Serial7();
#if defined(__IMXRT1052__)
friend void IRQHandler_Serial8(); friend void IRQHandler_Serial8();

static SerialEventCheckingFunctionPointer serial_event_handler_checks[8]; static SerialEventCheckingFunctionPointer serial_event_handler_checks[8];
#else
static SerialEventCheckingFunctionPointer serial_event_handler_checks[7];
#endif
static uint8_t serial_event_handlers_active; static uint8_t serial_event_handlers_active;




extern HardwareSerial Serial5; extern HardwareSerial Serial5;
extern HardwareSerial Serial6; extern HardwareSerial Serial6;
extern HardwareSerial Serial7; extern HardwareSerial Serial7;
extern HardwareSerial Serial8;
extern void serialEvent1(void); extern void serialEvent1(void);
extern void serialEvent2(void); extern void serialEvent2(void);
extern void serialEvent3(void); extern void serialEvent3(void);
extern void serialEvent5(void); extern void serialEvent5(void);
extern void serialEvent6(void); extern void serialEvent6(void);
extern void serialEvent7(void); extern void serialEvent7(void);

#if defined(__IMXRT1052__)
extern HardwareSerial Serial8;
extern void serialEvent8(void); extern void serialEvent8(void);
#endif




#endif // __cplusplus #endif // __cplusplus

+ 5
- 0
teensy4/HardwareSerial2.cpp View File

static HardwareSerial::hardware_t UART4_Hardware = { static HardwareSerial::hardware_t UART4_Hardware = {
1, IRQ_LPUART4, &IRQHandler_Serial2, &serial_event_check_serial2, 1, IRQ_LPUART4, &IRQHandler_Serial2, &serial_event_check_serial2,
CCM_CCGR1, CCM_CCGR1_LPUART4(CCM_CCGR_ON), CCM_CCGR1, CCM_CCGR1_LPUART4(CCM_CCGR_ON),
#if defined(__IMXRT1052__)
6, //IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01, // pin 6 6, //IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01, // pin 6
7, // IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00, // pin 7 7, // IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00, // pin 7
#elif defined(__IMXRT1062__)
7, //IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01, // pin 6
8, // IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00, // pin 7
#endif
0xff, // No CTS pin 0xff, // No CTS pin
IOMUXC_LPUART4_RX_SELECT_INPUT, IOMUXC_LPUART4_RX_SELECT_INPUT,
2, // page 521 2, // page 521

+ 2
- 0
teensy4/HardwareSerial8.cpp View File



#include <Arduino.h> #include <Arduino.h>
#include "HardwareSerial.h" #include "HardwareSerial.h"
#if defined(__IMXRT1052__)


#ifndef SERIAL8_TX_BUFFER_SIZE #ifndef SERIAL8_TX_BUFFER_SIZE
#define SERIAL8_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer #define SERIAL8_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer


void serialEvent8() __attribute__((weak)); void serialEvent8() __attribute__((weak));
void serialEvent8() {Serial8.disableSerialEvents(); } // No use calling this so disable if called... void serialEvent8() {Serial8.disableSerialEvents(); } // No use calling this so disable if called...
#endif

+ 93
- 5
teensy4/core_pins.h View File



#if defined(__IMXRT1062__) #if defined(__IMXRT1062__)


#define CORE_NUM_TOTAL_PINS 34
#define CORE_NUM_DIGITAL 34
#define CORE_NUM_INTERRUPT 34
#define CORE_NUM_TOTAL_PINS 40
#define CORE_NUM_DIGITAL 40
#define CORE_NUM_INTERRUPT 40
#define CORE_NUM_ANALOG 14 #define CORE_NUM_ANALOG 14
#define CORE_NUM_PWM 27 #define CORE_NUM_PWM 27


#define CORE_PIN31_BIT 23 #define CORE_PIN31_BIT 23
#define CORE_PIN32_BIT 12 #define CORE_PIN32_BIT 12
#define CORE_PIN33_BIT 7 #define CORE_PIN33_BIT 7
#define CORE_PIN34_BIT 15
#define CORE_PIN35_BIT 14
#define CORE_PIN36_BIT 13
#define CORE_PIN37_BIT 12
#define CORE_PIN38_BIT 17
#define CORE_PIN39_BIT 16


#define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT)) #define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT))
#define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT)) #define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT))
#define CORE_PIN31_BITMASK (1<<(CORE_PIN31_BIT)) #define CORE_PIN31_BITMASK (1<<(CORE_PIN31_BIT))
#define CORE_PIN32_BITMASK (1<<(CORE_PIN32_BIT)) #define CORE_PIN32_BITMASK (1<<(CORE_PIN32_BIT))
#define CORE_PIN33_BITMASK (1<<(CORE_PIN33_BIT)) #define CORE_PIN33_BITMASK (1<<(CORE_PIN33_BIT))
#define CORE_PIN34_BITMASK (1<<(CORE_PIN34_BIT))
#define CORE_PIN35_BITMASK (1<<(CORE_PIN35_BIT))
#define CORE_PIN36_BITMASK (1<<(CORE_PIN36_BIT))
#define CORE_PIN37_BITMASK (1<<(CORE_PIN37_BIT))
#define CORE_PIN38_BITMASK (1<<(CORE_PIN38_BIT))
#define CORE_PIN39_BITMASK (1<<(CORE_PIN39_BIT))


#define CORE_PIN0_PORTREG GPIO1_DR #define CORE_PIN0_PORTREG GPIO1_DR
#define CORE_PIN1_PORTREG GPIO1_DR #define CORE_PIN1_PORTREG GPIO1_DR
#define CORE_PIN31_PORTREG GPIO4_DR #define CORE_PIN31_PORTREG GPIO4_DR
#define CORE_PIN32_PORTREG GPIO2_DR #define CORE_PIN32_PORTREG GPIO2_DR
#define CORE_PIN33_PORTREG GPIO4_DR #define CORE_PIN33_PORTREG GPIO4_DR
#define CORE_PIN34_PORTREG GPIO3_DR
#define CORE_PIN35_PORTREG GPIO3_DR
#define CORE_PIN36_PORTREG GPIO3_DR
#define CORE_PIN37_PORTREG GPIO3_DR
#define CORE_PIN38_PORTREG GPIO3_DR
#define CORE_PIN39_PORTREG GPIO3_DR


#define CORE_PIN0_PORTSET GPIO1_DR_SET #define CORE_PIN0_PORTSET GPIO1_DR_SET
#define CORE_PIN1_PORTSET GPIO1_DR_SET #define CORE_PIN1_PORTSET GPIO1_DR_SET
#define CORE_PIN31_PORTSET GPIO4_DR_SET #define CORE_PIN31_PORTSET GPIO4_DR_SET
#define CORE_PIN32_PORTSET GPIO2_DR_SET #define CORE_PIN32_PORTSET GPIO2_DR_SET
#define CORE_PIN33_PORTSET GPIO4_DR_SET #define CORE_PIN33_PORTSET GPIO4_DR_SET
#define CORE_PIN34_PORTSET GPIO3_DR_SET
#define CORE_PIN35_PORTSET GPIO3_DR_SET
#define CORE_PIN36_PORTSET GPIO3_DR_SET
#define CORE_PIN37_PORTSET GPIO3_DR_SET
#define CORE_PIN38_PORTSET GPIO3_DR_SET
#define CORE_PIN39_PORTSET GPIO3_DR_SET


#define CORE_PIN0_PORTCLEAR GPIO1_DR_CLEAR #define CORE_PIN0_PORTCLEAR GPIO1_DR_CLEAR
#define CORE_PIN1_PORTCLEAR GPIO1_DR_CLEAR #define CORE_PIN1_PORTCLEAR GPIO1_DR_CLEAR
#define CORE_PIN31_PORTCLEAR GPIO4_DR_CLEAR #define CORE_PIN31_PORTCLEAR GPIO4_DR_CLEAR
#define CORE_PIN32_PORTCLEAR GPIO2_DR_CLEAR #define CORE_PIN32_PORTCLEAR GPIO2_DR_CLEAR
#define CORE_PIN33_PORTCLEAR GPIO4_DR_CLEAR #define CORE_PIN33_PORTCLEAR GPIO4_DR_CLEAR
#define CORE_PIN34_PORTCLEAR GPIO3_DR_CLEAR
#define CORE_PIN35_PORTCLEAR GPIO3_DR_CLEAR
#define CORE_PIN36_PORTCLEAR GPIO3_DR_CLEAR
#define CORE_PIN37_PORTCLEAR GPIO3_DR_CLEAR
#define CORE_PIN38_PORTCLEAR GPIO3_DR_CLEAR
#define CORE_PIN39_PORTCLEAR GPIO3_DR_CLEAR


#define CORE_PIN0_DDRREG GPIO1_GDIR #define CORE_PIN0_DDRREG GPIO1_GDIR
#define CORE_PIN1_DDRREG GPIO1_GDIR #define CORE_PIN1_DDRREG GPIO1_GDIR
#define CORE_PIN31_DDRREG GPIO4_GDIR #define CORE_PIN31_DDRREG GPIO4_GDIR
#define CORE_PIN32_DDRREG GPIO2_GDIR #define CORE_PIN32_DDRREG GPIO2_GDIR
#define CORE_PIN33_DDRREG GPIO4_GDIR #define CORE_PIN33_DDRREG GPIO4_GDIR
#define CORE_PIN34_DDRREG GPIO3_GDIR
#define CORE_PIN35_DDRREG GPIO3_GDIR
#define CORE_PIN36_DDRREG GPIO3_GDIR
#define CORE_PIN37_DDRREG GPIO3_GDIR
#define CORE_PIN38_DDRREG GPIO3_GDIR
#define CORE_PIN39_DDRREG GPIO3_GDIR


#define CORE_PIN0_PINREG GPIO1_PSR #define CORE_PIN0_PINREG GPIO1_PSR
#define CORE_PIN1_PINREG GPIO1_PSR #define CORE_PIN1_PINREG GPIO1_PSR
#define CORE_PIN31_PINREG GPIO4_PSR #define CORE_PIN31_PINREG GPIO4_PSR
#define CORE_PIN32_PINREG GPIO2_PSR #define CORE_PIN32_PINREG GPIO2_PSR
#define CORE_PIN33_PINREG GPIO4_PSR #define CORE_PIN33_PINREG GPIO4_PSR
#define CORE_PIN34_PINREG GPIO3_PSR
#define CORE_PIN35_PINREG GPIO3_PSR
#define CORE_PIN36_PINREG GPIO3_PSR
#define CORE_PIN37_PINREG GPIO3_PSR
#define CORE_PIN38_PINREG GPIO3_PSR
#define CORE_PIN39_PINREG GPIO3_PSR


// mux config registers control which peripheral uses the pin // mux config registers control which peripheral uses the pin
#define CORE_PIN0_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 #define CORE_PIN0_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03
#define CORE_PIN31_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23 #define CORE_PIN31_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23
#define CORE_PIN32_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12 #define CORE_PIN32_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12
#define CORE_PIN33_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07 #define CORE_PIN33_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07
#define CORE_PIN34_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_03
#define CORE_PIN35_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_02
#define CORE_PIN36_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_01
#define CORE_PIN37_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_00
#define CORE_PIN38_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05
#define CORE_PIN39_CONFIG IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04


// pad config registers control pullup/pulldown/keeper, drive strength, etc // pad config registers control pullup/pulldown/keeper, drive strength, etc
#define CORE_PIN0_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 #define CORE_PIN0_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03
#define CORE_PIN31_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23 #define CORE_PIN31_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23
#define CORE_PIN32_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12 #define CORE_PIN32_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12
#define CORE_PIN33_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07 #define CORE_PIN33_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07
#define CORE_PIN34_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_03
#define CORE_PIN35_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_02
#define CORE_PIN36_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_01
#define CORE_PIN37_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_00
#define CORE_PIN38_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05
#define CORE_PIN39_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04


#define CORE_LED0_PIN 13 #define CORE_LED0_PIN 13




#define CORE_RXD0_PIN 0 #define CORE_RXD0_PIN 0
#define CORE_TXD0_PIN 1 #define CORE_TXD0_PIN 1
#define CORE_RXD1_PIN 6
#define CORE_TXD1_PIN 7
#define CORE_RXD1_PIN 7
#define CORE_TXD1_PIN 8
#define CORE_RXD2_PIN 15 #define CORE_RXD2_PIN 15
#define CORE_TXD2_PIN 14 #define CORE_TXD2_PIN 14
#define CORE_RXD3_PIN 16 #define CORE_RXD3_PIN 16
#define CORE_INT31_PIN 31 #define CORE_INT31_PIN 31
#define CORE_INT32_PIN 32 #define CORE_INT32_PIN 32
#define CORE_INT33_PIN 33 #define CORE_INT33_PIN 33
#define CORE_INT34_PIN 34
#define CORE_INT35_PIN 35
#define CORE_INT36_PIN 36
#define CORE_INT37_PIN 37
#define CORE_INT38_PIN 38
#define CORE_INT39_PIN 39
#define CORE_INT_EVERY_PIN 1 #define CORE_INT_EVERY_PIN 1




CORE_PIN32_PORTSET = CORE_PIN32_BITMASK; CORE_PIN32_PORTSET = CORE_PIN32_BITMASK;
} else if (pin == 33) { } else if (pin == 33) {
CORE_PIN33_PORTSET = CORE_PIN33_BITMASK; CORE_PIN33_PORTSET = CORE_PIN33_BITMASK;
#if defined(__IMXRT1062__)
} else if (pin == 34) {
CORE_PIN34_PORTSET = CORE_PIN34_BITMASK;
} else if (pin == 35) {
CORE_PIN35_PORTSET = CORE_PIN35_BITMASK;
} else if (pin == 36) {
CORE_PIN36_PORTSET = CORE_PIN36_BITMASK;
} else if (pin == 37) {
CORE_PIN37_PORTSET = CORE_PIN37_BITMASK;
} else if (pin == 38) {
CORE_PIN38_PORTSET = CORE_PIN38_BITMASK;
} else if (pin == 39) {
CORE_PIN39_PORTSET = CORE_PIN39_BITMASK;
#endif
} }
} else { } else {
if (pin == 0) { if (pin == 0) {
CORE_PIN32_PORTCLEAR = CORE_PIN32_BITMASK; CORE_PIN32_PORTCLEAR = CORE_PIN32_BITMASK;
} else if (pin == 33) { } else if (pin == 33) {
CORE_PIN33_PORTCLEAR = CORE_PIN33_BITMASK; CORE_PIN33_PORTCLEAR = CORE_PIN33_BITMASK;
#if defined(__IMXRT1062__)
} else if (pin == 34) {
CORE_PIN34_PORTCLEAR = CORE_PIN34_BITMASK;
} else if (pin == 35) {
CORE_PIN35_PORTCLEAR = CORE_PIN35_BITMASK;
} else if (pin == 36) {
CORE_PIN36_PORTCLEAR = CORE_PIN36_BITMASK;
} else if (pin == 37) {
CORE_PIN37_PORTCLEAR = CORE_PIN37_BITMASK;
} else if (pin == 38) {
CORE_PIN38_PORTCLEAR = CORE_PIN38_BITMASK;
} else if (pin == 39) {
CORE_PIN39_PORTCLEAR = CORE_PIN39_BITMASK;
#endif
} }
} }
} else { } else {

+ 9
- 1
teensy4/digital.c View File

{&CORE_PIN31_PORTREG, &CORE_PIN31_CONFIG, &CORE_PIN31_PADCONFIG, CORE_PIN31_BITMASK}, {&CORE_PIN31_PORTREG, &CORE_PIN31_CONFIG, &CORE_PIN31_PADCONFIG, CORE_PIN31_BITMASK},
{&CORE_PIN32_PORTREG, &CORE_PIN32_CONFIG, &CORE_PIN32_PADCONFIG, CORE_PIN32_BITMASK}, {&CORE_PIN32_PORTREG, &CORE_PIN32_CONFIG, &CORE_PIN32_PADCONFIG, CORE_PIN32_BITMASK},
{&CORE_PIN33_PORTREG, &CORE_PIN33_CONFIG, &CORE_PIN33_PADCONFIG, CORE_PIN33_BITMASK}, {&CORE_PIN33_PORTREG, &CORE_PIN33_CONFIG, &CORE_PIN33_PADCONFIG, CORE_PIN33_BITMASK},
};
#if defined(__IMXRT1062__)
{&CORE_PIN34_PORTREG, &CORE_PIN34_CONFIG, &CORE_PIN34_PADCONFIG, CORE_PIN34_BITMASK},
{&CORE_PIN35_PORTREG, &CORE_PIN35_CONFIG, &CORE_PIN35_PADCONFIG, CORE_PIN35_BITMASK},
{&CORE_PIN36_PORTREG, &CORE_PIN36_CONFIG, &CORE_PIN36_PADCONFIG, CORE_PIN36_BITMASK},
{&CORE_PIN37_PORTREG, &CORE_PIN37_CONFIG, &CORE_PIN37_PADCONFIG, CORE_PIN37_BITMASK},
{&CORE_PIN38_PORTREG, &CORE_PIN38_CONFIG, &CORE_PIN38_PADCONFIG, CORE_PIN38_BITMASK},
{&CORE_PIN39_PORTREG, &CORE_PIN39_CONFIG, &CORE_PIN39_PADCONFIG, CORE_PIN39_BITMASK},
#endif
};


void digitalWrite(uint8_t pin, uint8_t val) void digitalWrite(uint8_t pin, uint8_t val)
{ {

+ 4
- 2
teensy4/pins_arduino.h View File

#define PIN_SERIAL_TX (1) #define PIN_SERIAL_TX (1)




#define NUM_DIGITAL_PINS 34
#define NUM_DIGITAL_PINS 40
#define NUM_ANALOG_INPUTS 12 #define NUM_ANALOG_INPUTS 12




#define SERIAL_PORT_HARDWARE4 Serial5 #define SERIAL_PORT_HARDWARE4 Serial5
#define SERIAL_PORT_HARDWARE5 Serial6 #define SERIAL_PORT_HARDWARE5 Serial6
#define SERIAL_PORT_HARDWARE6 Serial7 #define SERIAL_PORT_HARDWARE6 Serial7
#define SERIAL_PORT_HARDWARE7 Serial8
#define SERIAL_PORT_HARDWARE_OPEN3 Serial4 #define SERIAL_PORT_HARDWARE_OPEN3 Serial4
#define SERIAL_PORT_HARDWARE_OPEN4 Serial5 #define SERIAL_PORT_HARDWARE_OPEN4 Serial5
#define SERIAL_PORT_HARDWARE_OPEN5 Serial6 #define SERIAL_PORT_HARDWARE_OPEN5 Serial6
#define SERIAL_PORT_HARDWARE_OPEN6 Serial7 #define SERIAL_PORT_HARDWARE_OPEN6 Serial7
#if defined(__IMXRT1052__)
#define SERIAL_PORT_HARDWARE7 Serial8
#define SERIAL_PORT_HARDWARE_OPEN7 Serial8 #define SERIAL_PORT_HARDWARE_OPEN7 Serial8
#endif


#define SerialUSB Serial #define SerialUSB Serial



Loading…
Cancel
Save