// Fast memcpy | // Fast memcpy | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#ifdef __cplusplus | #ifdef __cplusplus | ||||
extern "C" { | extern "C" { | ||||
extern void *memcpy (void *dst, const void *src, size_t count); | extern void *memcpy (void *dst, const void *src, size_t count); |
#include "core_pins.h" | #include "core_pins.h" | ||||
//#include "HardwareSerial.h" | //#include "HardwareSerial.h" | ||||
#if defined(__MK66FX1M0__) // ugly hack for now... | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) // ugly hack for now... | |||||
#define __MK20DX256__ | #define __MK20DX256__ | ||||
#endif | #endif | ||||
} | } | ||||
#if defined(__MK66FX1M0__) | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
void analogWriteDAC1(int val) | void analogWriteDAC1(int val) | ||||
{ | { | ||||
SIM_SCGC2 |= SIM_SCGC2_DAC1; | SIM_SCGC2 |= SIM_SCGC2_DAC1; |
// 84062840 | // 84062840 | ||||
// 322111 | // 322111 | ||||
// 17395173 | // 17395173 | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) | #if defined(__MK20DX128__) || defined(__MK20DX256__) | ||||
#define EIMSK_pA 0x01000018 // pins 3, 4, 24 | #define EIMSK_pA 0x01000018 // pins 3, 4, 24 | ||||
#define EIMSK_pC 0x78C0BE00 // pins 9-13, 15, 22, 23, 27-30 | #define EIMSK_pC 0x78C0BE00 // pins 9-13, 15, 22, 23, 27-30 | ||||
#define EIMSK_pD 0x003041E4 // pins 2, 5-8, 14, 20, 21 | #define EIMSK_pD 0x003041E4 // pins 2, 5-8, 14, 20, 21 | ||||
#define EIMSK_pE 0x84000000 // pins 26, 31 | #define EIMSK_pE 0x84000000 // pins 26, 31 | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define EIMSK_pA 0x1E000018 // pins 3, 4, 25-28 | #define EIMSK_pA 0x1E000018 // pins 3, 4, 25-28 | ||||
#define EIMSK_pB 0xE00F0003 // pins 0, 1, 16-19, 29-31 | #define EIMSK_pB 0xE00F0003 // pins 0, 1, 16-19, 29-31 | ||||
#define EIMSK_pC 0x00C0BE00 // pins 9-13, 15, 22, 23 | #define EIMSK_pC 0x00C0BE00 // pins 9-13, 15, 22, 23 |
#define CORE_NUM_INTERRUPT 24 // really only 18, but 6 "holes" | #define CORE_NUM_INTERRUPT 24 // really only 18, but 6 "holes" | ||||
#define CORE_NUM_ANALOG 13 | #define CORE_NUM_ANALOG 13 | ||||
#define CORE_NUM_PWM 10 | #define CORE_NUM_PWM 10 | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define CORE_NUM_TOTAL_PINS 40 | #define CORE_NUM_TOTAL_PINS 40 | ||||
#define CORE_NUM_DIGITAL 40 | #define CORE_NUM_DIGITAL 40 | ||||
#define CORE_NUM_INTERRUPT 40 | #define CORE_NUM_INTERRUPT 40 | ||||
#define CORE_INT23_PIN 23 | #define CORE_INT23_PIN 23 | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define CORE_PIN0_BIT 16 | #define CORE_PIN0_BIT 16 | ||||
#define CORE_PIN1_BIT 17 | #define CORE_PIN1_BIT 17 | ||||
void analog_init(void); | void analog_init(void); | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define DEFAULT 0 | #define DEFAULT 0 | ||||
#define INTERNAL 2 | #define INTERNAL 2 | ||||
#define INTERNAL1V2 2 | #define INTERNAL1V2 2 |
#if (F_CPU == 192000000) | #if (F_CPU == 192000000) | ||||
#define F_PLL 192000000 | #define F_PLL 192000000 | ||||
#define F_BUS 64000000 | |||||
#define F_BUS 48000000 | |||||
#define F_MEM 27428571 | #define F_MEM 27428571 | ||||
#elif (F_CPU == 180000000) | #elif (F_CPU == 180000000) | ||||
#define F_PLL 180000000 | #define F_PLL 180000000 |
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||||
*/ | */ | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#if defined (__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) | #if defined (__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) | ||||
#define __ARM_FEATURE_UNALIGNED 1 | #define __ARM_FEATURE_UNALIGNED 1 | ||||
#endif | #endif | ||||
// now program the clock dividers | // now program the clock dividers | ||||
#if F_CPU == 192000000 | #if F_CPU == 192000000 | ||||
// config divisors: 192 MHz core, 64 MHz bus, 27.4 MHz flash, USB = 192 * 4 | |||||
// config divisors: 192 MHz core, 48 MHz bus, 27.4 MHz flash, USB = 192 * 4 | |||||
// TODO: gradual ramp-up for HSRUN mode | // TODO: gradual ramp-up for HSRUN mode | ||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) | SIM_CLKDIV1_OUTDIV4(6); | |||||
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(6); | |||||
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(3); | SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(3); | ||||
#elif F_CPU == 180000000 | #elif F_CPU == 180000000 | ||||
// config divisors: 180 MHz core, 60 MHz bus, 25.7 MHz flash, USB = not feasible | // config divisors: 180 MHz core, 60 MHz bus, 25.7 MHz flash, USB = not feasible |
const static uint8_t A10 = 24; | const static uint8_t A10 = 24; | ||||
const static uint8_t A11 = 25; | const static uint8_t A11 = 25; | ||||
const static uint8_t A12 = 26; | const static uint8_t A12 = 26; | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
const static uint8_t A10 = 40; | const static uint8_t A10 = 40; | ||||
const static uint8_t A11 = 41; | const static uint8_t A11 = 41; | ||||
const static uint8_t A12 = 31; | const static uint8_t A12 = 31; | ||||
#define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) <= 12) ? (p) + 14 : -1)) | #define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) <= 12) ? (p) + 14 : -1)) | ||||
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 16 || (p) == 17 || (p) == 20 || (p) == 22 || (p) == 23) | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 16 || (p) == 17 || (p) == 20 || (p) == 22 || (p) == 23) | ||||
#define digitalPinToInterrupt(p) ((((p) >= 2 && (p) <= 15) || ((p) >= 20 && (p) <= 23)) ? (p) : -1) | #define digitalPinToInterrupt(p) ((((p) >= 2 && (p) <= 15) || ((p) >= 20 && (p) <= 23)) ? (p) : -1) | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) >= 12 && (p) <= 20) ? (p) + 19 : -1)) | #define analogInputToDigitalPin(p) (((p) <= 9) ? (p) + 14 : (((p) >= 12 && (p) <= 20) ? (p) + 19 : -1)) | ||||
#define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 10) || (p) == 14 || ((p) >= 20 && (p) <= 23) || (p) == 29 || (p) == 30 || ((p) >= 35 && (p) <= 38)) | #define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 10) || (p) == 14 || ((p) >= 20 && (p) <= 23) || (p) == 29 || (p) == 30 || ((p) >= 35 && (p) <= 38)) | ||||
#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) | #define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) |
if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21](); | if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21](); | ||||
} | } | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
static void porta_interrupt(void) | static void porta_interrupt(void) | ||||
{ | { | ||||
#endif | #endif | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
unsigned long rtc_get(void) | unsigned long rtc_get(void) | ||||
{ | { | ||||
//void init_pins(void) | //void init_pins(void) | ||||
void _init_Teensyduino_internal_(void) | void _init_Teensyduino_internal_(void) | ||||
{ | { | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
NVIC_ENABLE_IRQ(IRQ_PORTA); | NVIC_ENABLE_IRQ(IRQ_PORTA); | ||||
NVIC_ENABLE_IRQ(IRQ_PORTB); | NVIC_ENABLE_IRQ(IRQ_PORTB); | ||||
NVIC_ENABLE_IRQ(IRQ_PORTC); | NVIC_ENABLE_IRQ(IRQ_PORTC); | ||||
FTM0_C3SC = 0x28; | FTM0_C3SC = 0x28; | ||||
FTM0_C4SC = 0x28; | FTM0_C4SC = 0x28; | ||||
FTM0_C5SC = 0x28; | FTM0_C5SC = 0x28; | ||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) | |||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
FTM0_C6SC = 0x28; | FTM0_C6SC = 0x28; | ||||
FTM0_C7SC = 0x28; | FTM0_C7SC = 0x28; | ||||
#endif | #endif | ||||
#if defined(__MK66FX1M0__) | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
FTM3_C0SC = 0x28; | FTM3_C0SC = 0x28; | ||||
FTM3_C1SC = 0x28; | FTM3_C1SC = 0x28; | ||||
FTM3_C2SC = 0x28; | FTM3_C2SC = 0x28; | ||||
FTM1_C0SC = 0x28; | FTM1_C0SC = 0x28; | ||||
FTM1_C1SC = 0x28; | FTM1_C1SC = 0x28; | ||||
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | ||||
#if defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__) | |||||
#if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__) | |||||
FTM2_CNT = 0; | FTM2_CNT = 0; | ||||
FTM2_MOD = DEFAULT_FTM_MOD; | FTM2_MOD = DEFAULT_FTM_MOD; | ||||
FTM2_C0SC = 0x28; | FTM2_C0SC = 0x28; | ||||
FTM2_C1SC = 0x28; | FTM2_C1SC = 0x28; | ||||
FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | ||||
#endif | #endif | ||||
#if defined(__MK66FX1M0__) | |||||
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
FTM3_CNT = 0; | FTM3_CNT = 0; | ||||
FTM3_MOD = DEFAULT_FTM_MOD; | FTM3_MOD = DEFAULT_FTM_MOD; | ||||
FTM3_C0SC = 0x28; | FTM3_C0SC = 0x28; | ||||
#define FTM1_CH1_PIN 17 | #define FTM1_CH1_PIN 17 | ||||
#define FTM2_CH0_PIN 3 | #define FTM2_CH0_PIN 3 | ||||
#define FTM2_CH1_PIN 4 | #define FTM2_CH1_PIN 4 | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
#define FTM0_CH0_PIN 22 | #define FTM0_CH0_PIN 22 | ||||
#define FTM0_CH1_PIN 23 | #define FTM0_CH1_PIN 23 | ||||
#define FTM0_CH2_PIN 9 | #define FTM0_CH2_PIN 9 | ||||
analogWriteDAC0(val); | analogWriteDAC0(val); | ||||
return; | return; | ||||
} | } | ||||
#elif defined(__MK66FX1M0__) | |||||
#elif defined(__MK64FX512__) || defined(__MK66FX1M0__) | |||||
if (pin == A21 || pin == A22) { | if (pin == A21 || pin == A22) { | ||||
uint8_t res = analog_write_res; | uint8_t res = analog_write_res; | ||||
if (res < 12) { | if (res < 12) { |