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IntervalTimer on imxrt

main
PaulStoffregen 5 years ago
parent
commit
e3bb2b648a
3 changed files with 41 additions and 39 deletions
  1. +30
    -33
      teensy4/IntervalTimer.cpp
  2. +3
    -5
      teensy4/IntervalTimer.h
  3. +8
    -1
      teensy4/startup.c

+ 30
- 33
teensy4/IntervalTimer.cpp View File

/* Teensyduino Core Library /* Teensyduino Core Library
* http://www.pjrc.com/teensy/ * http://www.pjrc.com/teensy/
* Copyright (c) 2017 PJRC.COM, LLC.
* Copyright (c) 2018 PJRC.COM, LLC.
* *
* Permission is hereby granted, free of charge, to any person obtaining * Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the * a copy of this software and associated documentation files (the
*/ */


#include "IntervalTimer.h" #include "IntervalTimer.h"
#include "debug/printf.h"


static void dummy_funct(void); static void dummy_funct(void);
static void pit_isr(void);


#define NUM_CHANNELS 4 #define NUM_CHANNELS 4
static void (*funct_table[4])(void) = {dummy_funct, dummy_funct, dummy_funct, dummy_funct}; static void (*funct_table[4])(void) = {dummy_funct, dummy_funct, dummy_funct, dummy_funct};


bool IntervalTimer::beginCycles(void (*funct)(), uint32_t cycles) bool IntervalTimer::beginCycles(void (*funct)(), uint32_t cycles)
{ {
#if 0
printf("beginCycles %u\n", cycles);
if (channel) { if (channel) {
channel->TCTRL = 0; channel->TCTRL = 0;
channel->TFLG = 1; channel->TFLG = 1;
} else { } else {
SIM_SCGC6 |= SIM_SCGC6_PIT;
__asm__ volatile("nop"); // solves timing problem on Teensy 3.5
CCM_CCGR1 |= CCM_CCGR1_PIT(CCM_CCGR_ON);
//__asm__ volatile("nop"); // solves timing problem on Teensy 3.5
PIT_MCR = 1; PIT_MCR = 1;
channel = KINETISK_PIT_CHANNELS;
channel = IMXRT_PIT_CHANNELS;
while (1) { while (1) {
if (channel->TCTRL == 0) break; if (channel->TCTRL == 0) break;
if (++channel >= KINETISK_PIT_CHANNELS + NUM_CHANNELS) {
if (++channel >= IMXRT_PIT_CHANNELS + NUM_CHANNELS) {
channel = NULL; channel = NULL;
return false; return false;
} }
} }
} }
int index = channel - KINETISK_PIT_CHANNELS;
int index = channel - IMXRT_PIT_CHANNELS;
funct_table[index] = funct; funct_table[index] = funct;
channel->LDVAL = cycles; channel->LDVAL = cycles;
channel->TCTRL = 3; channel->TCTRL = 3;
#if defined(KINETISK)
NVIC_SET_PRIORITY(IRQ_PIT_CH0 + index, nvic_priority);
NVIC_ENABLE_IRQ(IRQ_PIT_CH0 + index);
#elif defined(KINETISL)
nvic_priorites[index] = nvic_priority; nvic_priorites[index] = nvic_priority;
if (nvic_priorites[0] <= nvic_priorites[1]) {
NVIC_SET_PRIORITY(IRQ_PIT, nvic_priorites[0]);
} else {
NVIC_SET_PRIORITY(IRQ_PIT, nvic_priorites[1]);
uint8_t top_priority = 255;
for (int i=0; i < NUM_CHANNELS; i++) {
if (top_priority > nvic_priorites[i]) top_priority = nvic_priorites[i];
} }
attachInterruptVector(IRQ_PIT, &pit_isr);
NVIC_SET_PRIORITY(IRQ_PIT, top_priority);
NVIC_ENABLE_IRQ(IRQ_PIT); NVIC_ENABLE_IRQ(IRQ_PIT);
#endif
#endif
return true; return true;
} }




void IntervalTimer::end() { void IntervalTimer::end() {
#if 0
#if 1
if (channel) { if (channel) {
int index = channel - KINETISK_PIT_CHANNELS;
// TODO: disable IRQ_PIT, but only if both instances ended
int index = channel - IMXRT_PIT_CHANNELS;
// TODO: disable IRQ_PIT, but only if all instances ended
funct_table[index] = dummy_funct; funct_table[index] = dummy_funct;
channel->TCTRL = 0; channel->TCTRL = 0;
nvic_priorites[index] = 255; nvic_priorites[index] = 255;
if (nvic_priorites[0] <= nvic_priorites[1]) {
NVIC_SET_PRIORITY(IRQ_PIT, nvic_priorites[0]);
} else {
NVIC_SET_PRIORITY(IRQ_PIT, nvic_priorites[1]);
uint8_t top_priority = 255;
for (int i=0; i < NUM_CHANNELS; i++) {
if (top_priority > nvic_priorites[i]) top_priority = nvic_priorites[i];
} }
NVIC_SET_PRIORITY(IRQ_PIT, top_priority);
channel = 0; channel = 0;
} }
#endif #endif
} }


void pit_isr() {
if (PIT_TFLG0) {
PIT_TFLG0 = 1;
funct_table[0]();
}
if (PIT_TFLG1) {
PIT_TFLG1 = 1;
funct_table[1]();
//FASTRUN
static void pit_isr()
{
for (int i=0; i < NUM_CHANNELS; i++) {
IMXRT_PIT_CHANNEL_t *channel = IMXRT_PIT_CHANNELS + i;
if (channel->TFLG) {
channel->TFLG = 1;
funct_table[i]();
}
} }
} }



+ 3
- 5
teensy4/IntervalTimer.h View File

private: private:
static const uint32_t MAX_PERIOD = UINT32_MAX / (24000000 / 1000000); static const uint32_t MAX_PERIOD = UINT32_MAX / (24000000 / 1000000);
public: public:
IntervalTimer() {
channel = NULL;
nvic_priority = 128;
constexpr IntervalTimer() {
} }
~IntervalTimer() { ~IntervalTimer() {
end(); end();
} }
private: private:
//#define IMXRT_PIT_CHANNELS ((IMXRT_PIT_CHANNEL_t *)(&(IMXRT_PIT.offset100))) //#define IMXRT_PIT_CHANNELS ((IMXRT_PIT_CHANNEL_t *)(&(IMXRT_PIT.offset100)))
IMXRT_PIT_CHANNEL_t *channel;
uint8_t nvic_priority;
IMXRT_PIT_CHANNEL_t *channel = nullptr;
uint8_t nvic_priority = 128;
static uint8_t nvic_priorites[4]; static uint8_t nvic_priorites[4];
bool beginCycles(void (*funct)(), uint32_t cycles); bool beginCycles(void (*funct)(), uint32_t cycles);



+ 8
- 1
teensy4/startup.c View File

GPIO2_GDIR |= (1<<3); GPIO2_GDIR |= (1<<3);
GPIO2_DR_SET = (1<<3); GPIO2_DR_SET = (1<<3);


// Initialize memory
memory_copy(&_stext, &_stextload, &_etext); memory_copy(&_stext, &_stextload, &_etext);
memory_copy(&_sdata, &_sdataload, &_edata); memory_copy(&_sdata, &_sdataload, &_edata);
memory_clear(&_sbss, &_ebss); memory_clear(&_sbss, &_ebss);


SCB_CPACR = 0x00F00000; // enable FPU
// enable FPU
SCB_CPACR = 0x00F00000;

// set up blank interrupt & exception vector table
for (i=0; i < 176; i++) _VectorsRam[i] = &unused_interrupt_vector; for (i=0; i < 176; i++) _VectorsRam[i] = &unused_interrupt_vector;
SCB_VTOR = (uint32_t)_VectorsRam; SCB_VTOR = (uint32_t)_VectorsRam;


// PIT & GPT timers to run from 24 MHz clock (independent of CPU speed)
CCM_CSCMR1 = (CCM_CSCMR1 & ~CCM_CSCMR1_PERCLK_PODF(0x3F)) | CCM_CSCMR1_PERCLK_CLK_SEL;

// must enable PRINT_DEBUG_STUFF in debug/print.h // must enable PRINT_DEBUG_STUFF in debug/print.h
printf_init(); printf_init();
printf("\n***********IMXRT Startup**********\n"); printf("\n***********IMXRT Startup**********\n");

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