Tempmon registers - bit definitions

teensy4/imxrt.h

 #define SRC_GPR10			(IMXRT_SRC.offset044)
 
 // 53.3: page 2986
-#define IMXRT_TEMPMON				(*(IMXRT_REGISTER32_t *)0x400F8180)
-#define TEMPMON_TEMPSENSE0          (IMXRT_TEMPMON.offset000)
+#define IMXRT_TEMPMON		(*(IMXRT_REGISTER32_t *)0x400F8180)
+#define TEMPMON_TEMPSENSE0          	(IMXRT_TEMPMON.offset000)
 #define TEMPMON_TEMPSENSE0_SET		(IMXRT_TEMPMON.offset004)
 #define TEMPMON_TEMPSENSE0_CLR		(IMXRT_TEMPMON.offset008)
 #define TEMPMON_TEMPSENSE0_TOG		(IMXRT_TEMPMON.offset08c)
-#define TEMPMON_TEMPSENSE1			(IMXRT_TEMPMON.offset090)
+#define TEMPMON_TEMPSENSE1		(IMXRT_TEMPMON.offset090)
 #define TEMPMON_TEMPSENSE1_SET		(IMXRT_TEMPMON.offset094)
 #define TEMPMON_TEMPSENSE1_CLR		(IMXRT_TEMPMON.offset098)
 #define TEMPMON_TEMPSENSE1_TOG		(IMXRT_TEMPMON.offset09C)
-#define TEMPMON_TEMPSENSE2			(IMXRT_TEMPMON.offset100)
+#define TEMPMON_TEMPSENSE2		(IMXRT_TEMPMON.offset100)
 #define TEMPMON_TEMPSENSE2_SET		(IMXRT_TEMPMON.offset104)
 #define TEMPMON_TEMPSENSE2_CLR		(IMXRT_TEMPMON.offset108)
 #define TEMPMON_TEMPSENSE2_TOG		(IMXRT_TEMPMON.offset10C)
+#define TEMPMON_CTRL0_ALARM_VALUE(n)	((uint32_t)(((n) & 0x0fff) << 20))
+#define TEMPMON_CTRL0_TEMP_CNT(n)	((uint32_t)(((n) & 0x0fff) << 8))
+#define TEMPMON_CTRL0_FINISHED		((uint32_t)(1 << 2))
+#define TEMPMON_CTRL0_MEASURE_TEMP	((uint32_t)(1 << 1))
+#define TEMPMON_CTRL0_POWER_DOWN	((uint32_t)(1 << 0))
+#define TEMPMON_CTRL1_MEASURE_FREQ(n)	((uint32_t)(((n) & 0xffff) << 0))
+#define TEMPMON_CTRL2_PANIC_ALARM_VALUE(n)	((uint32_t)(((n) & 0x0fff) << 16))
+#define TEMPMON_CTRL2_LOW_ALARM_VALUE(n)	((uint32_t)(((n) & 0x0fff) << 0))
 
 // 54.3: page 2998
 #define IMXRT_TSC		(*(IMXRT_REGISTER32_t *)0x400E0000)