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0, // 7/A7 AD_B1_11 |
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0, // 7/A7 AD_B1_11 |
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13, // 8/A8 AD_B1_08 |
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13, // 8/A8 AD_B1_08 |
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14, // 9/A9 AD_B1_09 |
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14, // 9/A9 AD_B1_09 |
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#if 0 |
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128, // 10 |
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128, // 10 |
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128, // 11 |
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128, // 11 |
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128, // 12 |
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128, // 12 |
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128, // 13 |
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128, // 13 |
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#else |
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1, // 24/A10 AD_B0_12 |
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2, // 25/A11 AD_B0_13 |
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128+3, // 26/A12 AD_B1_14 - only on ADC2, 3 |
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128+4, // 27/A13 AD_B1_15 - only on ADC2, 4 |
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#endif |
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7, // 14/A0 AD_B1_02 |
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7, // 14/A0 AD_B1_02 |
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8, // 15/A1 AD_B1_03 |
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8, // 15/A1 AD_B1_03 |
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12, // 16/A2 AD_B1_07 |
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12, // 16/A2 AD_B1_07 |
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13, // 22/A8 AD_B1_08 |
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13, // 22/A8 AD_B1_08 |
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14, // 23/A9 AD_B1_09 |
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14, // 23/A9 AD_B1_09 |
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1, // 24/A10 AD_B0_12 |
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1, // 24/A10 AD_B0_12 |
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2 // 25/A11 AD_B0_13 |
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// 26/A12 AD_B1_14 - only on ADC2 |
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// 27/A13 AD_B1_15 - only on ADC2 |
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2, // 25/A11 AD_B0_13 |
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128+3, // 26/A12 AD_B1_14 - only on ADC2, 3 |
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128+4 // 27/A13 AD_B1_15 - only on ADC2, 4 |
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}; |
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}; |
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static void wait_for_cal(void) |
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static void wait_for_cal(void) |
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{ |
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{ |
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printf("wait_for_cal\n"); |
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//printf("wait_for_cal\n"); |
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while (ADC1_GC & ADC_GC_CAL) ; |
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while (ADC1_GC & ADC_GC_CAL) ; |
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// TODO: check CALF, but what do to about CAL failure? |
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// TODO: check CALF, but what do to about CAL failure? |
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calibrating = 0; |
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calibrating = 0; |
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printf("cal complete\n"); |
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//printf("cal complete\n"); |
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} |
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} |
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if (pin > sizeof(pin_to_channel)) return 0; |
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if (pin > sizeof(pin_to_channel)) return 0; |
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if (calibrating) wait_for_cal(); |
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if (calibrating) wait_for_cal(); |
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uint8_t ch = pin_to_channel[pin]; |
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uint8_t ch = pin_to_channel[pin]; |
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if (ch > 15) return 0; |
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ADC1_HC0 = ch; |
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while (!(ADC1_HS & ADC_HS_COCO0)) ; // wait |
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return ADC1_R0; |
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// printf("%d\n", ch); |
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// if (ch > 15) return 0; |
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if(!(ch & 0x80)) { |
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ADC1_HC0 = ch; |
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while (!(ADC1_HS & ADC_HS_COCO0)) ; // wait |
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return ADC1_R0; |
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} else { |
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ADC2_HC0 = ch & 0x7f; |
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while (!(ADC2_HS & ADC_HS_COCO0)) ; // wait |
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return ADC2_R0; |
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} |
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} |
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} |
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void analogReference(uint8_t type) |
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void analogReference(uint8_t type) |
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tmp32 |= mode; |
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tmp32 |= mode; |
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ADC1_CFG = tmp32; |
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ADC1_CFG = tmp32; |
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tmp32 = (ADC2_CFG & (0xFFFFFC00)); |
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tmp32 |= (ADC2_CFG & (0x03)); // ADICLK |
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tmp32 |= (ADC2_CFG & (0xE0)); // ADIV & ADLPC |
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tmp32 |= mode; |
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ADC2_CFG = tmp32; |
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} |
|
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} |
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void analogReadAveraging(unsigned int num) |
|
|
void analogReadAveraging(unsigned int num) |
|
|
{ |
|
|
{ |
|
|
uint32_t mode; |
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|
|
uint32_t mode, mode1; |
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|
//disable averaging |
|
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|
|
//disable averaging, ADC1 and ADC2 |
|
|
ADC1_GC &= ~0x20; |
|
|
ADC1_GC &= ~0x20; |
|
|
mode = ADC1_CFG & ~0xC000; |
|
|
mode = ADC1_CFG & ~0xC000; |
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|
|
ADC2_GC &= ~0x20; |
|
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|
mode1 = ADC2_CFG & ~0xC000; |
|
|
|
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|
|
if (num >= 32) { |
|
|
if (num >= 32) { |
|
|
mode |= ADC_CFG_AVGS(3); |
|
|
mode |= ADC_CFG_AVGS(3); |
|
|
|
|
|
mode1 |= ADC_CFG_AVGS(3); |
|
|
|
|
|
|
|
|
} else if (num >= 16) { |
|
|
} else if (num >= 16) { |
|
|
mode |= ADC_CFG_AVGS(2); |
|
|
mode |= ADC_CFG_AVGS(2); |
|
|
|
|
|
mode1 |= ADC_CFG_AVGS(2); |
|
|
|
|
|
|
|
|
} else if (num >= 8) { |
|
|
} else if (num >= 8) { |
|
|
mode |= ADC_CFG_AVGS(1); |
|
|
mode |= ADC_CFG_AVGS(1); |
|
|
|
|
|
mode1 |= ADC_CFG_AVGS(1); |
|
|
|
|
|
|
|
|
} else if (num >= 4) { |
|
|
} else if (num >= 4) { |
|
|
mode |= ADC_CFG_AVGS(0); |
|
|
mode |= ADC_CFG_AVGS(0); |
|
|
|
|
|
mode1 |= ADC_CFG_AVGS(0); |
|
|
|
|
|
|
|
|
} else { |
|
|
} else { |
|
|
mode |= 0; |
|
|
mode |= 0; |
|
|
|
|
|
mode1 |= 0; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
ADC1_CFG |= mode; |
|
|
ADC1_CFG |= mode; |
|
|
|
|
|
|
|
|
if(num >= 4) |
|
|
|
|
|
|
|
|
ADC2_CFG |= mode1; |
|
|
|
|
|
|
|
|
|
|
|
if(num >= 4){ |
|
|
ADC1_GC |= ADC_GC_AVGE;// turns on averaging |
|
|
ADC1_GC |= ADC_GC_AVGE;// turns on averaging |
|
|
|
|
|
ADC2_GC |= ADC_GC_AVGE;// turns on averaging |
|
|
|
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
#define MAX_ADC_CLOCK 20000000 |
|
|
#define MAX_ADC_CLOCK 20000000 |
|
|
|
|
|
|
|
|
printf("analogInit\n"); |
|
|
printf("analogInit\n"); |
|
|
|
|
|
|
|
|
CCM_CCGR1 |= CCM_CCGR1_ADC1(CCM_CCGR_ON); |
|
|
CCM_CCGR1 |= CCM_CCGR1_ADC1(CCM_CCGR_ON); |
|
|
|
|
|
|
|
|
|
|
|
CCM_CCGR1 |= CCM_CCGR1_ADC2(CCM_CCGR_ON); |
|
|
|
|
|
|
|
|
if (analog_config_bits == 8) { |
|
|
if (analog_config_bits == 8) { |
|
|
// 8 bit conversion (17 clocks) plus 8 clocks for input settling |
|
|
// 8 bit conversion (17 clocks) plus 8 clocks for input settling |
|
|
mode = ADC_CFG_MODE(0) | ADC_CFG_ADSTS(3); |
|
|
mode = ADC_CFG_MODE(0) | ADC_CFG_ADSTS(3); |
|
|
|
|
|
|
|
|
mode |= ADC_CFG_ADIV(0) | ADC_CFG_ADICLK(0); // use IPG |
|
|
mode |= ADC_CFG_ADIV(0) | ADC_CFG_ADICLK(0); // use IPG |
|
|
} |
|
|
} |
|
|
#endif |
|
|
#endif |
|
|
|
|
|
|
|
|
|
|
|
//ADC1 |
|
|
ADC1_CFG = mode | ADC_HC_AIEN | ADC_CFG_ADHSC; |
|
|
ADC1_CFG = mode | ADC_HC_AIEN | ADC_CFG_ADHSC; |
|
|
ADC1_GC = avg | ADC_GC_CAL; // begin cal |
|
|
ADC1_GC = avg | ADC_GC_CAL; // begin cal |
|
|
calibrating = 1; |
|
|
calibrating = 1; |
|
|
|
|
|
while (ADC1_GC & ADC_GC_CAL) ; |
|
|
|
|
|
calibrating = 0; |
|
|
|
|
|
//ADC2 |
|
|
|
|
|
ADC2_CFG = mode | ADC_HC_AIEN | ADC_CFG_ADHSC; |
|
|
|
|
|
ADC2_GC = avg | ADC_GC_CAL; // begin cal |
|
|
|
|
|
calibrating = 1; |
|
|
|
|
|
while (ADC1_GC & ADC_GC_CAL) ; |
|
|
|
|
|
calibrating = 0; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|