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@@ -6655,19 +6655,27 @@ These register are used by the ROM code and should not be used by application so |
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#define SRC_SBMR2_SEC_CONFIG(n) ((uint32_t)(((n) & 0x03) << 0)) |
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// 53.3: page 2986 |
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#define IMXRT_TEMPMON (*(IMXRT_REGISTER32_t *)0x400F8180) |
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#define TEMPMON_TEMPSENSE0 (IMXRT_TEMPMON.offset000) |
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#define IMXRT_TEMPMON (*(IMXRT_REGISTER32_t *)0x400F8180) |
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#define TEMPMON_TEMPSENSE0 (IMXRT_TEMPMON.offset000) |
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#define TEMPMON_TEMPSENSE0_SET (IMXRT_TEMPMON.offset004) |
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#define TEMPMON_TEMPSENSE0_CLR (IMXRT_TEMPMON.offset008) |
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#define TEMPMON_TEMPSENSE0_TOG (IMXRT_TEMPMON.offset08c) |
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#define TEMPMON_TEMPSENSE1 (IMXRT_TEMPMON.offset090) |
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#define TEMPMON_TEMPSENSE1 (IMXRT_TEMPMON.offset090) |
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#define TEMPMON_TEMPSENSE1_SET (IMXRT_TEMPMON.offset094) |
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#define TEMPMON_TEMPSENSE1_CLR (IMXRT_TEMPMON.offset098) |
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#define TEMPMON_TEMPSENSE1_TOG (IMXRT_TEMPMON.offset09C) |
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#define TEMPMON_TEMPSENSE2 (IMXRT_TEMPMON.offset100) |
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#define TEMPMON_TEMPSENSE2 (IMXRT_TEMPMON.offset100) |
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#define TEMPMON_TEMPSENSE2_SET (IMXRT_TEMPMON.offset104) |
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#define TEMPMON_TEMPSENSE2_CLR (IMXRT_TEMPMON.offset108) |
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#define TEMPMON_TEMPSENSE2_TOG (IMXRT_TEMPMON.offset10C) |
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#define TEMPMON_CTRL0_ALARM_VALUE(n) ((uint32_t)(((n) & 0x0fff) << 20)) |
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#define TEMPMON_CTRL0_TEMP_CNT(n) ((uint32_t)(((n) & 0x0fff) << 8)) |
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#define TEMPMON_CTRL0_FINISHED ((uint32_t)(1 << 2)) |
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#define TEMPMON_CTRL0_MEASURE_TEMP ((uint32_t)(1 << 1)) |
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#define TEMPMON_CTRL0_POWER_DOWN ((uint32_t)(1 << 0)) |
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#define TEMPMON_CTRL1_MEASURE_FREQ(n) ((uint32_t)(((n) & 0xffff) << 0)) |
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#define TEMPMON_CTRL2_PANIC_ALARM_VALUE(n) ((uint32_t)(((n) & 0x0fff) << 16)) |
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#define TEMPMON_CTRL2_LOW_ALARM_VALUE(n) ((uint32_t)(((n) & 0x0fff) << 0)) |
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// 54.3: page 2998 |
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#define IMXRT_TSC (*(IMXRT_REGISTER32_t *)0x400E0000) |