There was questions up on forum threads:

https://forum.pjrc.com/threads/66076-Teensy-4-x-s-1062-MCU-has-16-bytes-of-NVRAM-on-RTC-unit?p=268385#post268385

Originally in the thread: https://forum.pjrc.com/threads/64592-Teensyduino-1-54-Beta-5?p=268336&viewfull=1#post268336

That said that the 16 byte memory that was battery backup was not defined nor worked.

So added the defines for the 4 registers.  Only one early on alias was defined before this for the first one...

Also added in the SNVS_LPCR_GPR_Z define which the register bit was talked about in a few other register definitions, this bit was not actually defined in the reference manual, it said it was reserved.  But reads or writes without this bit set in the register will zero out the 4 registers.

Tried example sketch to make sure it worked

Wondered  if this had already been done earlier.

Was not so am trying it now.

One side effect was had to change interrupt.c as there were
#defines for things like DR, GDIR which then caused compile issues with the structure.  So renamed the defines.

Built about 3 programs with it so far.  Which appear to still be working.

Missed a few, pllus one register fields name had wrong register name

Looks like the macro was defined with a space instead of an underscore, breaking the intended macro name.

https://github.com/PaulStoffregen/cores/issues/424#issue-555760117

see RM V2 Page 3221

https://forum.pjrc.com/threads/59815-teensy-4-0-XBAR-questions?p=231803&viewfull=1#post231803

https://forum.pjrc.com/threads/59815-teensy-4-0-XBAR-questions

Add T4 ADC_ETC definitions for bits plus structure

Decided to go to the format that is closer to the the manual to
and use names like: chain_1_0, chain_3_2...

Add structure to make it easer to use ADC objects,

Plus updated defines to use the structure.
Left in my own define for structure location as a trigger to not define it in my own code when running older version of core...

Also added defines for XBAR, such that we can hopefully not have to use magic numbers to say, map PID1 to ADC_ETC1_...

The TX and RX values were reversed.
That is for example on Serial1 (LPUART6)
Before we had:
```
```
now we have
```
```
So for example trying to get WS2812Serial library to work was failing, to output anything.

Needed to implement Quad encoder library.

Current naming is confusing since it differs between GTP1 and GTP2. The GTP2 version is compatible to the naming in the data sheet. So I suggest to adjust the naming for  GPT1

I suggest to explicitely delcare a (say)  IMXRT_TMR_CH_t struct which collects the registers for a TMR  channel instead of implicitely defining this struct in the declaration of IMXRT_TMR_t.

This would allow for an easier definition of user classes modelling a TMR channel.
Not a big deal, could also do that mayself the class code but it would be more convenient if this would be done in imxrt.h

Moved from my flexio_t4 library.
Libary was updated to see if already defined before it now defines it.

The FlexIO registers are 32 bits, the masks were all setup for 16 bits so the high word of registers were not updated

I created a structure IMXRT_LPSPI_t
like what was done for UARTS.

I hopefully got all of the unused fields in properly to get the registers on the correct addresses.
Note: I did not update the other #define LPSPIn_ values but left them, likewise, I create a new define for each of the addresses.

That way we can double check I have everything properly aligned