teensy-cores

Grafico dei commit

Autore	SHA1	Messaggio	Data
Frank Bösing	7d43e33fbe	cosmetic changes	6 anni fa
Frank Bösing	72d7b11fb6	F_BUS 128MHz analog.c	6 anni fa
PaulStoffregen	27cdeb1cb9	Teensy LC does not support saturate instruction	6 anni fa
shkshk90	edc3f0c12b	Add saturate instruction Use ARM's unsigned saturate instruction to limit the value, to be written to DAC, to 11 bits (range 0 to 4095).	6 anni fa
shkshk90	b90f36c8b7	Update analog.c	6 anni fa
PaulStoffregen	392c93cb87	Fix analogReadAveraging with ADC1	7 anni fa
PaulStoffregen	7099935c0e	Update open source license info	7 anni fa
Tilo Nitzsche	56b2af9f9a	analogWrite() can fail with LTO. Fix casts with undefined behavior.	7 anni fa
PaulStoffregen	2185bdc936	Fix analogReadResolution ADC1 cal	8 anni fa
PaulStoffregen	3b96d28851	Fix pin number comments	8 anni fa
PaulStoffregen	28d7ba477e	Use analog pin to channel tables (faster)	8 anni fa
Kurt Eckhardt	8fdabf68ed	One less compare	8 anni fa
Kurt Eckhardt	cf6bf5863a	Add A23 and A24 for T3.5 and T3.6 board I added pins 49 and 50 as analog pins A23 and A24. I still left in the special casing for pins 44 and 45 being used for Temp and analog reference	8 anni fa
PaulStoffregen	de0677a6e0	Enable VREF on K66 fixes #145	8 anni fa
Frank Bösing	8752969dbb	Add missing F_BUS	8 anni fa
PaulStoffregen	6856d4eedc	Fix analogRead on K66	8 anni fa
PaulStoffregen	6040145aac	More K66 overclocking options	8 anni fa
PaulStoffregen	e0dd146824	More defs	8 anni fa
PaulStoffregen	aa212b61e0	Defs for MK66FX1M0	9 anni fa
PaulStoffregen	1e49af2dd2	Add register definitions	9 anni fa
PaulStoffregen	ea4252feb8	Add internal analog channels on Teensy-LC	9 anni fa
PaulStoffregen	af89f7072e	Add support for Teensy-LC DAC	9 anni fa
PaulStoffregen	9b8d74c089	Initial support for Teensy-LC	9 anni fa
PaulStoffregen	663e4fddec	Add support for 2, 4, 8, 16MHz (Duff)	10 anni fa
PaulStoffregen	7bee55654c	Support more CPU and bus frequencies	10 anni fa
Frank Bösing	fdcaeb932e	Stripped to 144MHz only for Paul	10 anni fa
Frank Bösing	bbd726f690	Update to 168MHz, 42 MHZ Bus, 28MHz Flash	10 anni fa
Frank Bösing	856a79b321	Modified for additional 120MHz Core-Clock	10 anni fa
PaulStoffregen	a781e92f77	Fix analogRead(39) (Vref) on Teensy 3.1	10 anni fa
PaulStoffregen	729c211500	Support for Teensy 3.1	11 anni fa
PaulStoffregen	5cecdee933	Initial commit, version 1.17-rc1	11 anni fa

28 Commit (d9fe2d70a4c5fa6fd30cd6242a81c8eb6f0a095c)