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  1. /* Teensyduino Core Library
  2. * http://www.pjrc.com/teensy/
  3. * Copyright (c) 2013 PJRC.COM, LLC.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * 1. The above copyright notice and this permission notice shall be
  14. * included in all copies or substantial portions of the Software.
  15. *
  16. * 2. If the Software is incorporated into a build system that allows
  17. * selection among a list of target devices, then similar target
  18. * devices manufactured by PJRC.COM must be included in the list of
  19. * target devices and selectable in the same manner.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  25. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  26. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  27. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  28. * SOFTWARE.
  29. */
  30. #include "mk20dx128.h"
  31. #include "core_pins.h"
  32. #include "HardwareSerial.h"
  33. // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
  34. // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
  35. #ifdef SERIAL_9BIT_SUPPORT
  36. static uint8_t use9Bits = 0;
  37. #define BUFTYPE uint16_t
  38. #else
  39. #define BUFTYPE uint8_t
  40. #define use9Bits 0
  41. #endif
  42. #define TX_BUFFER_SIZE 40
  43. static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE];
  44. static volatile uint8_t transmitting = 0;
  45. #if TX_BUFFER_SIZE > 255
  46. static volatile uint16_t tx_buffer_head = 0;
  47. static volatile uint16_t tx_buffer_tail = 0;
  48. #else
  49. static volatile uint8_t tx_buffer_head = 0;
  50. static volatile uint8_t tx_buffer_tail = 0;
  51. #endif
  52. #define RX_BUFFER_SIZE 64
  53. static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE];
  54. static volatile uint8_t rx_buffer_head = 0;
  55. static volatile uint8_t rx_buffer_tail = 0;
  56. #define C2_ENABLE UART_C2_TE | UART_C2_RE | UART_C2_RIE
  57. #define C2_TX_ACTIVE C2_ENABLE | UART_C2_TIE
  58. #define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
  59. #define C2_TX_INACTIVE C2_ENABLE
  60. void serial3_begin(uint32_t divisor)
  61. {
  62. SIM_SCGC4 |= SIM_SCGC4_UART2; // turn on clock, TODO: use bitband
  63. rx_buffer_head = 0;
  64. rx_buffer_tail = 0;
  65. tx_buffer_head = 0;
  66. tx_buffer_tail = 0;
  67. transmitting = 0;
  68. CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
  69. CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
  70. UART2_BDH = (divisor >> 13) & 0x1F;
  71. UART2_BDL = (divisor >> 5) & 0xFF;
  72. UART2_C4 = divisor & 0x1F;
  73. UART2_C1 = 0;
  74. UART2_PFIFO = 0;
  75. UART2_C2 = C2_TX_INACTIVE;
  76. NVIC_SET_PRIORITY(IRQ_UART2_STATUS, 64);
  77. NVIC_ENABLE_IRQ(IRQ_UART2_STATUS);
  78. }
  79. void serial3_format(uint32_t format)
  80. {
  81. uint8_t c;
  82. c = UART2_C1;
  83. c = (c & ~0x13) | (format & 0x03); // configure parity
  84. if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
  85. UART2_C1 = c;
  86. if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
  87. c = UART2_S2 & ~0x10;
  88. if (format & 0x10) c |= 0x10; // rx invert
  89. UART2_S2 = c;
  90. c = UART2_C3 & ~0x10;
  91. if (format & 0x20) c |= 0x10; // tx invert
  92. UART2_C3 = c;
  93. #ifdef SERIAL_9BIT_SUPPORT
  94. c = UART2_C4 & 0x1F;
  95. if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits)
  96. UART2_C4 = c;
  97. use9Bits = format & 0x80;
  98. #endif
  99. }
  100. void serial3_end(void)
  101. {
  102. if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
  103. while (transmitting) yield(); // wait for buffered data to send
  104. NVIC_DISABLE_IRQ(IRQ_UART2_STATUS);
  105. UART2_C2 = 0;
  106. CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  107. CORE_PIN8_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
  108. rx_buffer_head = 0;
  109. rx_buffer_tail = 0;
  110. }
  111. void serial3_putchar(uint32_t c)
  112. {
  113. uint32_t head;
  114. if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
  115. head = tx_buffer_head;
  116. if (++head >= TX_BUFFER_SIZE) head = 0;
  117. while (tx_buffer_tail == head) {
  118. yield(); // wait
  119. }
  120. tx_buffer[head] = c;
  121. transmitting = 1;
  122. tx_buffer_head = head;
  123. UART2_C2 = C2_TX_ACTIVE;
  124. }
  125. void serial3_write(const void *buf, unsigned int count)
  126. {
  127. const uint8_t *p = (const uint8_t *)buf;
  128. while (count-- > 0) serial3_putchar(*p++);
  129. }
  130. void serial3_flush(void)
  131. {
  132. while (transmitting) yield(); // wait
  133. }
  134. int serial3_available(void)
  135. {
  136. uint32_t head, tail;
  137. head = rx_buffer_head;
  138. tail = rx_buffer_tail;
  139. if (head >= tail) return head - tail;
  140. return RX_BUFFER_SIZE + head - tail;
  141. }
  142. int serial3_getchar(void)
  143. {
  144. uint32_t head, tail;
  145. int c;
  146. head = rx_buffer_head;
  147. tail = rx_buffer_tail;
  148. if (head == tail) return -1;
  149. if (++tail >= RX_BUFFER_SIZE) tail = 0;
  150. c = rx_buffer[tail];
  151. rx_buffer_tail = tail;
  152. return c;
  153. }
  154. int serial3_peek(void)
  155. {
  156. uint32_t head, tail;
  157. head = rx_buffer_head;
  158. tail = rx_buffer_tail;
  159. if (head == tail) return -1;
  160. if (++tail >= RX_BUFFER_SIZE) tail = 0;
  161. return rx_buffer[tail];
  162. }
  163. void serial3_clear(void)
  164. {
  165. rx_buffer_head = rx_buffer_tail;
  166. }
  167. // status interrupt combines
  168. // Transmit data below watermark UART_S1_TDRE
  169. // Transmit complete UART_S1_TC
  170. // Idle line UART_S1_IDLE
  171. // Receive data above watermark UART_S1_RDRF
  172. // LIN break detect UART_S2_LBKDIF
  173. // RxD pin active edge UART_S2_RXEDGIF
  174. void uart2_status_isr(void)
  175. {
  176. uint32_t head, tail, n;
  177. uint8_t c;
  178. //digitalWriteFast(4, HIGH);
  179. if (UART2_S1 & UART_S1_RDRF) {
  180. //digitalWriteFast(5, HIGH);
  181. n = UART2_D;
  182. if (use9Bits && (UART2_C3 & 0x80)) n |= 0x100;
  183. head = rx_buffer_head + 1;
  184. if (head >= RX_BUFFER_SIZE) head = 0;
  185. if (head != rx_buffer_tail) {
  186. rx_buffer[head] = n;
  187. rx_buffer_head = head;
  188. }
  189. //digitalWriteFast(5, LOW);
  190. }
  191. c = UART2_C2;
  192. if ((c & UART_C2_TIE) && (UART2_S1 & UART_S1_TDRE)) {
  193. //digitalWriteFast(5, HIGH);
  194. head = tx_buffer_head;
  195. tail = tx_buffer_tail;
  196. if (head == tail) {
  197. UART2_C2 = C2_TX_COMPLETING;
  198. } else {
  199. if (++tail >= TX_BUFFER_SIZE) tail = 0;
  200. n = tx_buffer[tail];
  201. if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2);
  202. UART2_D = n;
  203. tx_buffer_tail = tail;
  204. }
  205. //digitalWriteFast(5, LOW);
  206. }
  207. if ((c & UART_C2_TCIE) && (UART2_S1 & UART_S1_TC)) {
  208. transmitting = 0;
  209. UART2_C2 = C2_TX_INACTIVE;
  210. }
  211. //digitalWriteFast(4, LOW);
  212. }