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  1. #include "imxrt.h"
  2. #include "wiring.h"
  3. #include "usb_dev.h"
  4. #include "debug/printf.h"
  5. // from the linker
  6. extern unsigned long _stextload;
  7. extern unsigned long _stext;
  8. extern unsigned long _etext;
  9. extern unsigned long _sdataload;
  10. extern unsigned long _sdata;
  11. extern unsigned long _edata;
  12. extern unsigned long _sbss;
  13. extern unsigned long _ebss;
  14. __attribute__ ((used, aligned(1024)))
  15. void (* _VectorsRam[NVIC_NUM_INTERRUPTS+16])(void);
  16. static void memory_copy(uint32_t *dest, const uint32_t *src, uint32_t *dest_end);
  17. static void memory_clear(uint32_t *dest, uint32_t *dest_end);
  18. static void configure_systick(void);
  19. static void reset_PFD();
  20. extern void systick_isr(void);
  21. extern void pendablesrvreq_isr(void);
  22. void configure_cache(void);
  23. void unused_interrupt_vector(void);
  24. void usb_pll_start();
  25. extern void analog_init(void); // analog.c
  26. extern void pwm_init(void); // pwm.c
  27. extern void tempmon_init(void); //tempmon.c
  28. uint32_t set_arm_clock(uint32_t frequency); // clockspeed.c
  29. extern void __libc_init_array(void); // C++ standard library
  30. __attribute__((section(".startup"), optimize("no-tree-loop-distribute-patterns")))
  31. void ResetHandler(void)
  32. {
  33. unsigned int i;
  34. //force the stack to begin at some arbitrary location
  35. //__asm__ volatile("mov sp, %0" : : "r" (0x20010000) : );
  36. // pin 13 - if startup crashes, use this to turn on the LED early for troubleshooting
  37. //IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 5;
  38. //IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03 = IOMUXC_PAD_DSE(7);
  39. //GPIO2_GDIR |= (1<<3);
  40. //GPIO2_DR_SET = (1<<3); // digitalWrite(13, HIGH);
  41. // Initialize memory
  42. memory_copy(&_stext, &_stextload, &_etext);
  43. memory_copy(&_sdata, &_sdataload, &_edata);
  44. memory_clear(&_sbss, &_ebss);
  45. // enable FPU
  46. SCB_CPACR = 0x00F00000;
  47. // set up blank interrupt & exception vector table
  48. for (i=0; i < NVIC_NUM_INTERRUPTS + 16; i++) _VectorsRam[i] = &unused_interrupt_vector;
  49. for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
  50. SCB_VTOR = (uint32_t)_VectorsRam;
  51. reset_PFD();
  52. // Configure clocks
  53. // TODO: make sure all affected peripherals are turned off!
  54. // PIT & GPT timers to run from 24 MHz clock (independent of CPU speed)
  55. CCM_CSCMR1 = (CCM_CSCMR1 & ~CCM_CSCMR1_PERCLK_PODF(0x3F)) | CCM_CSCMR1_PERCLK_CLK_SEL;
  56. // UARTs run from 24 MHz clock (works if PLL3 off or bypassed)
  57. CCM_CSCDR1 = (CCM_CSCDR1 & ~CCM_CSCDR1_UART_CLK_PODF(0x3F)) | CCM_CSCDR1_UART_CLK_SEL;
  58. // must enable PRINT_DEBUG_STUFF in debug/print.h
  59. printf_debug_init();
  60. printf("\n***********IMXRT Startup**********\n");
  61. printf("test %d %d %d\n", 1, -1234567, 3);
  62. configure_cache();
  63. configure_systick();
  64. usb_pll_start();
  65. reset_PFD(); //TODO: is this really needed?
  66. set_arm_clock(600000000);
  67. //set_arm_clock(984000000); Ludicrous Speed
  68. while (millis() < 20) ; // wait at least 20ms before starting USB
  69. usb_init();
  70. analog_init();
  71. pwm_init();
  72. tempmon_init();
  73. while (millis() < 300) ; // wait at least 300ms before calling user code
  74. printf("before C++ constructors\n");
  75. __libc_init_array();
  76. printf("after C++ constructors\n");
  77. printf("before setup\n");
  78. setup();
  79. printf("after setup\n");
  80. while (1) {
  81. //printf("loop\n");
  82. loop();
  83. }
  84. }
  85. // ARM SysTick is used for most Ardiuno timing functions, delay(), millis(),
  86. // micros(). SysTick can run from either the ARM core clock, or from an
  87. // "external" clock. NXP documents it as "24 MHz XTALOSC can be the external
  88. // clock source of SYSTICK" (RT1052 ref manual, rev 1, page 411). However,
  89. // NXP actually hid an undocumented divide-by-240 circuit in the hardware, so
  90. // the external clock is really 100 kHz. We use this clock rather than the
  91. // ARM clock, to allow SysTick to maintain correct timing even when we change
  92. // the ARM clock to run at different speeds.
  93. #define SYSTICK_EXT_FREQ 100000
  94. extern volatile uint32_t systick_cycle_count;
  95. static void configure_systick(void)
  96. {
  97. _VectorsRam[14] = pendablesrvreq_isr;
  98. _VectorsRam[15] = systick_isr;
  99. SYST_RVR = (SYSTICK_EXT_FREQ / 1000) - 1;
  100. SYST_CVR = 0;
  101. SYST_CSR = SYST_CSR_TICKINT | SYST_CSR_ENABLE;
  102. SCB_SHPR3 = 0x20000000; // Systick = priority 32
  103. ARM_DEMCR |= ARM_DEMCR_TRCENA;
  104. ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA; // turn on cycle counter
  105. systick_cycle_count = ARM_DWT_CYCCNT; // compiled 0, corrected w/1st systick
  106. }
  107. // concise defines for SCB_MPU_RASR and SCB_MPU_RBAR, ARM DDI0403E, pg 696
  108. #define NOEXEC SCB_MPU_RASR_XN
  109. #define READONLY SCB_MPU_RASR_AP(7)
  110. #define READWRITE SCB_MPU_RASR_AP(3)
  111. #define NOACCESS SCB_MPU_RASR_AP(0)
  112. #define MEM_CACHE_WT SCB_MPU_RASR_TEX(0) | SCB_MPU_RASR_C
  113. #define MEM_CACHE_WB SCB_MPU_RASR_TEX(0) | SCB_MPU_RASR_C | SCB_MPU_RASR_B
  114. #define MEM_CACHE_WBWA SCB_MPU_RASR_TEX(1) | SCB_MPU_RASR_C | SCB_MPU_RASR_B
  115. #define MEM_NOCACHE SCB_MPU_RASR_TEX(1)
  116. #define DEV_NOCACHE SCB_MPU_RASR_TEX(2)
  117. #define SIZE_128K (SCB_MPU_RASR_SIZE(16) | SCB_MPU_RASR_ENABLE)
  118. #define SIZE_256K (SCB_MPU_RASR_SIZE(17) | SCB_MPU_RASR_ENABLE)
  119. #define SIZE_512K (SCB_MPU_RASR_SIZE(18) | SCB_MPU_RASR_ENABLE)
  120. #define SIZE_1M (SCB_MPU_RASR_SIZE(19) | SCB_MPU_RASR_ENABLE)
  121. #define SIZE_2M (SCB_MPU_RASR_SIZE(20) | SCB_MPU_RASR_ENABLE)
  122. #define SIZE_4M (SCB_MPU_RASR_SIZE(21) | SCB_MPU_RASR_ENABLE)
  123. #define SIZE_8M (SCB_MPU_RASR_SIZE(22) | SCB_MPU_RASR_ENABLE)
  124. #define SIZE_16M (SCB_MPU_RASR_SIZE(23) | SCB_MPU_RASR_ENABLE)
  125. #define SIZE_32M (SCB_MPU_RASR_SIZE(24) | SCB_MPU_RASR_ENABLE)
  126. #define SIZE_64M (SCB_MPU_RASR_SIZE(25) | SCB_MPU_RASR_ENABLE)
  127. #define REGION(n) (SCB_MPU_RBAR_REGION(n) | SCB_MPU_RBAR_VALID)
  128. __attribute__((section(".progmem")))
  129. void configure_cache(void)
  130. {
  131. //printf("MPU_TYPE = %08lX\n", SCB_MPU_TYPE);
  132. //printf("CCR = %08lX\n", SCB_CCR);
  133. // TODO: check if caches already active - skip?
  134. SCB_MPU_CTRL = 0; // turn off MPU
  135. SCB_MPU_RBAR = 0x00000000 | REGION(0); // ITCM
  136. SCB_MPU_RASR = MEM_NOCACHE | READWRITE | SIZE_512K;
  137. SCB_MPU_RBAR = 0x00200000 | REGION(1); // Boot ROM
  138. SCB_MPU_RASR = MEM_CACHE_WT | READONLY | SIZE_128K;
  139. SCB_MPU_RBAR = 0x20000000 | REGION(2); // DTCM
  140. SCB_MPU_RASR = MEM_NOCACHE | READWRITE | NOEXEC | SIZE_512K;
  141. SCB_MPU_RBAR = 0x20200000 | REGION(3); // RAM (AXI bus)
  142. SCB_MPU_RASR = MEM_CACHE_WBWA | READWRITE | NOEXEC | SIZE_1M;
  143. SCB_MPU_RBAR = 0x40000000 | REGION(4); // Peripherals
  144. SCB_MPU_RASR = DEV_NOCACHE | READWRITE | NOEXEC | SIZE_64M;
  145. SCB_MPU_RBAR = 0x60000000 | REGION(5); // QSPI Flash
  146. SCB_MPU_RASR = MEM_CACHE_WBWA | READONLY | SIZE_16M;
  147. // TODO: 32 byte sub-region at 0x00000000 with NOACCESS, to trap NULL pointer deref
  148. // TODO: protect access to power supply config
  149. // TODO: 32 byte sub-region at end of .bss section with NOACCESS, to trap stack overflow
  150. SCB_MPU_CTRL = SCB_MPU_CTRL_ENABLE;
  151. // cache enable, ARM DDI0403E, pg 628
  152. asm("dsb");
  153. asm("isb");
  154. SCB_CACHE_ICIALLU = 0;
  155. asm("dsb");
  156. asm("isb");
  157. SCB_CCR |= (SCB_CCR_IC | SCB_CCR_DC);
  158. }
  159. __attribute__((section(".progmem")))
  160. void usb_pll_start()
  161. {
  162. while (1) {
  163. uint32_t n = CCM_ANALOG_PLL_USB1; // pg 759
  164. printf("CCM_ANALOG_PLL_USB1=%08lX\n", n);
  165. if (n & CCM_ANALOG_PLL_USB1_DIV_SELECT) {
  166. printf(" ERROR, 528 MHz mode!\n"); // never supposed to use this mode!
  167. CCM_ANALOG_PLL_USB1_CLR = 0xC000; // bypass 24 MHz
  168. CCM_ANALOG_PLL_USB1_SET = CCM_ANALOG_PLL_USB1_BYPASS; // bypass
  169. CCM_ANALOG_PLL_USB1_CLR = CCM_ANALOG_PLL_USB1_POWER | // power down
  170. CCM_ANALOG_PLL_USB1_DIV_SELECT | // use 480 MHz
  171. CCM_ANALOG_PLL_USB1_ENABLE | // disable
  172. CCM_ANALOG_PLL_USB1_EN_USB_CLKS; // disable usb
  173. continue;
  174. }
  175. if (!(n & CCM_ANALOG_PLL_USB1_ENABLE)) {
  176. printf(" enable PLL\n");
  177. // TODO: should this be done so early, or later??
  178. CCM_ANALOG_PLL_USB1_SET = CCM_ANALOG_PLL_USB1_ENABLE;
  179. continue;
  180. }
  181. if (!(n & CCM_ANALOG_PLL_USB1_POWER)) {
  182. printf(" power up PLL\n");
  183. CCM_ANALOG_PLL_USB1_SET = CCM_ANALOG_PLL_USB1_POWER;
  184. continue;
  185. }
  186. if (!(n & CCM_ANALOG_PLL_USB1_LOCK)) {
  187. printf(" wait for lock\n");
  188. continue;
  189. }
  190. if (n & CCM_ANALOG_PLL_USB1_BYPASS) {
  191. printf(" turn off bypass\n");
  192. CCM_ANALOG_PLL_USB1_CLR = CCM_ANALOG_PLL_USB1_BYPASS;
  193. continue;
  194. }
  195. if (!(n & CCM_ANALOG_PLL_USB1_EN_USB_CLKS)) {
  196. printf(" enable USB clocks\n");
  197. CCM_ANALOG_PLL_USB1_SET = CCM_ANALOG_PLL_USB1_EN_USB_CLKS;
  198. continue;
  199. }
  200. return; // everything is as it should be :-)
  201. }
  202. }
  203. __attribute__((section(".progmem")))
  204. void reset_PFD()
  205. {
  206. //Reset PLL2 PFDs, set default frequencies:
  207. CCM_ANALOG_PFD_528_SET = (1 << 31) | (1 << 23) | (1 << 15) | (1 << 7);
  208. CCM_ANALOG_PFD_528 = 0x2018101B; // PFD0:352, PFD1:594, PFD2:396, PFD3:297 MHz
  209. //PLL3:
  210. CCM_ANALOG_PFD_480_SET = (1 << 31) | (1 << 23) | (1 << 15) | (1 << 7);
  211. CCM_ANALOG_PFD_480 = 0x13110D0C; // PFD0:720, PFD1:664, PFD2:508, PFD3:454 MHz
  212. }
  213. // Stack frame
  214. // xPSR
  215. // ReturnAddress
  216. // LR (R14) - typically FFFFFFF9 for IRQ or Exception
  217. // R12
  218. // R3
  219. // R2
  220. // R1
  221. // R0
  222. __attribute__((weak))
  223. void unused_interrupt_vector(void)
  224. {
  225. // TODO: polling Serial to complete buffered transmits
  226. #ifdef PRINT_DEBUG_STUFF
  227. uint32_t addr;
  228. asm volatile("mrs %0, ipsr\n" : "=r" (addr)::);
  229. printf("\nirq %d\n", addr & 0x1FF);
  230. asm("ldr %0, [sp, #52]" : "=r" (addr) ::);
  231. printf(" %x\n", addr);
  232. asm("ldr %0, [sp, #48]" : "=r" (addr) ::);
  233. printf(" %x\n", addr);
  234. asm("ldr %0, [sp, #44]" : "=r" (addr) ::);
  235. printf(" %x\n", addr);
  236. asm("ldr %0, [sp, #40]" : "=r" (addr) ::);
  237. printf(" %x\n", addr);
  238. asm("ldr %0, [sp, #36]" : "=r" (addr) ::);
  239. printf(" %x\n", addr);
  240. asm("ldr %0, [sp, #33]" : "=r" (addr) ::);
  241. printf(" %x\n", addr);
  242. asm("ldr %0, [sp, #34]" : "=r" (addr) ::);
  243. printf(" %x\n", addr);
  244. asm("ldr %0, [sp, #28]" : "=r" (addr) ::);
  245. printf(" %x\n", addr);
  246. asm("ldr %0, [sp, #24]" : "=r" (addr) ::);
  247. printf(" %x\n", addr);
  248. asm("ldr %0, [sp, #20]" : "=r" (addr) ::);
  249. printf(" %x\n", addr);
  250. asm("ldr %0, [sp, #16]" : "=r" (addr) ::);
  251. printf(" %x\n", addr);
  252. asm("ldr %0, [sp, #12]" : "=r" (addr) ::);
  253. printf(" %x\n", addr);
  254. asm("ldr %0, [sp, #8]" : "=r" (addr) ::);
  255. printf(" %x\n", addr);
  256. asm("ldr %0, [sp, #4]" : "=r" (addr) ::);
  257. printf(" %x\n", addr);
  258. asm("ldr %0, [sp, #0]" : "=r" (addr) ::);
  259. printf(" %x\n", addr);
  260. #endif
  261. #if 1
  262. if ( F_CPU_ACTUAL >= 600000000 )
  263. set_arm_clock(100000000);
  264. IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 5; // pin 13
  265. IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03 = IOMUXC_PAD_DSE(7);
  266. GPIO2_GDIR |= (1<<3);
  267. GPIO2_DR_SET = (1<<3);
  268. while (1) {
  269. volatile uint32_t n;
  270. GPIO2_DR_SET = (1<<3); //digitalWrite(13, HIGH);
  271. for (n=0; n < 2000000/6; n++) ;
  272. GPIO2_DR_CLEAR = (1<<3); //digitalWrite(13, LOW);
  273. for (n=0; n < 1500000/6; n++) ;
  274. }
  275. #else
  276. if ( F_CPU_ACTUAL >= 600000000 )
  277. set_arm_clock(100000000);
  278. while (1) {
  279. }
  280. #endif
  281. }
  282. __attribute__((section(".startup"), optimize("no-tree-loop-distribute-patterns")))
  283. static void memory_copy(uint32_t *dest, const uint32_t *src, uint32_t *dest_end)
  284. {
  285. if (dest == src) return;
  286. while (dest < dest_end) {
  287. *dest++ = *src++;
  288. }
  289. }
  290. __attribute__((section(".startup"), optimize("no-tree-loop-distribute-patterns")))
  291. static void memory_clear(uint32_t *dest, uint32_t *dest_end)
  292. {
  293. while (dest < dest_end) {
  294. *dest++ = 0;
  295. }
  296. }
  297. // syscall functions need to be in the same C file as the entry point "ResetVector"
  298. // otherwise the linker will discard them in some cases.
  299. #include <errno.h>
  300. // from the linker script
  301. extern unsigned long _heap_start;
  302. extern unsigned long _heap_end;
  303. char *__brkval = (char *)&_heap_start;
  304. void * _sbrk(int incr)
  305. {
  306. char *prev = __brkval;
  307. if (incr != 0) {
  308. if (prev + incr > (char *)&_heap_end) {
  309. errno = ENOMEM;
  310. return (void *)-1;
  311. }
  312. __brkval = prev + incr;
  313. }
  314. return prev;
  315. }
  316. __attribute__((weak))
  317. int _read(int file, char *ptr, int len)
  318. {
  319. return 0;
  320. }
  321. __attribute__((weak))
  322. int _close(int fd)
  323. {
  324. return -1;
  325. }
  326. #include <sys/stat.h>
  327. __attribute__((weak))
  328. int _fstat(int fd, struct stat *st)
  329. {
  330. st->st_mode = S_IFCHR;
  331. return 0;
  332. }
  333. __attribute__((weak))
  334. int _isatty(int fd)
  335. {
  336. return 1;
  337. }
  338. __attribute__((weak))
  339. int _lseek(int fd, long long offset, int whence)
  340. {
  341. return -1;
  342. }
  343. __attribute__((weak))
  344. void _exit(int status)
  345. {
  346. while (1);
  347. }
  348. __attribute__((weak))
  349. void __cxa_pure_virtual()
  350. {
  351. while (1);
  352. }
  353. __attribute__((weak))
  354. int __cxa_guard_acquire (char *g)
  355. {
  356. return !(*g);
  357. }
  358. __attribute__((weak))
  359. void __cxa_guard_release(char *g)
  360. {
  361. *g = 1;
  362. }
  363. __attribute__((weak))
  364. void abort(void)
  365. {
  366. while (1) ;
  367. }