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teensy-cores/teensy4/pwm.c

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  1. #include "imxrt.h"

  2. #include "core_pins.h"

  3. #include "debug/printf.h"

  4. 

  5. 

  6. struct pwm_pin_info_struct {

  7. 	uint8_t type;    // 0=no pwm, 1=flexpwm, 2=quad

  8. 	uint8_t module;  // 0-3, 0-3

  9. 	uint8_t channel; // 0=X, 1=A, 2=B

  10. 	uint8_t muxval;  //

  11. };

  12. 

  13. uint8_t analog_write_res = 8;

  14. 

  15. #define M(a, b) ((((a) - 1) << 4) | (b))

  16. 

  17. #if defined(__IMXRT1062__)

  18. 

  19. const struct pwm_pin_info_struct pwm_pin_info[] = {

  20. 	{1, M(1, 1), 0, 4},  // FlexPWM1_1_X   0  // AD_B0_03

  21. 	{1, M(1, 0), 0, 4},  // FlexPWM1_0_X   1  // AD_B0_02

  22. 	{1, M(4, 2), 1, 1},  // FlexPWM4_2_A   2  // EMC_04

  23. 	{1, M(4, 2), 2, 1},  // FlexPWM4_2_B   3  // EMC_05

  24. 	{1, M(2, 0), 1, 1},  // FlexPWM2_0_A   4  // EMC_06

  25. 	{1, M(2, 1), 1, 1},  // FlexPWM2_1_A   5  // EMC_08

  26. 	{1, M(2, 2), 1, 2},  // FlexPWM2_2_A   6  // B0_10

  27. 	{1, M(1, 3), 2, 6},  // FlexPWM1_3_B   7  // B1_01

  28. 	{1, M(1, 3), 1, 6},  // FlexPWM1_3_A   8  // B1_00

  29. 	{1, M(2, 2), 2, 2},  // FlexPWM2_2_B   9  // B0_11

  30. 	{2, M(1, 0), 0, 1},  // QuadTimer1_0  10  // B0_00

  31. 	{2, M(1, 2), 0, 1},  // QuadTimer1_2  11  // B0_02

  32. 	{2, M(1, 1), 0, 1},  // QuadTimer1_1  12  // B0_01

  33. 	{2, M(2, 0), 0, 1},  // QuadTimer2_0  13  // B0_03

  34. 	{2, M(3, 2), 0, 1},  // QuadTimer3_2  14  // AD_B1_02

  35. 	{2, M(3, 3), 0, 1},  // QuadTimer3_3  15  // AD_B1_03

  36. 	{0, M(1, 0), 0, 0},

  37. 	{0, M(1, 0), 0, 0},

  38. 	{2, M(3, 1), 0, 1},  // QuadTimer3_1  18  // AD_B1_01

  39. 	{2, M(3, 0), 0, 1},  // QuadTimer3_0  19  // AD_B1_00

  40. 	{0, M(1, 0), 0, 0},

  41. 	{0, M(1, 0), 0, 0},

  42. 	{1, M(4, 0), 1, 1},  // FlexPWM4_0_A  22  // AD_B1_08

  43. 	{1, M(4, 1), 1, 1},  // FlexPWM4_1_A  23  // AD_B1_09

  44. 	{1, M(1, 2), 0, 4},  // FlexPWM1_2_X  24  // AD_B0_12

  45. 	{1, M(1, 3), 0, 4},  // FlexPWM1_3_X  25  // AD_B0_13

  46. 	{0, M(1, 0), 0, 0},

  47. 	{0, M(1, 0), 0, 0},

  48. 	{1, M(3, 1), 2, 1},  // FlexPWM3_1_B  28  // EMC_32

  49. 	{1, M(3, 1), 1, 1},  // FlexPWM3_1_A  29  // EMC_31

  50. 	{0, M(1, 0), 0, 0},

  51. 	{0, M(1, 0), 0, 0},

  52. 	{0, M(1, 0), 0, 0},

  53. 	{1, M(2, 0), 2, 1},  // FlexPWM2_0_B  33  // EMC_07

  54. #ifdef ARDUINO_TEENSY40

  55. 	{1, M(1, 1), 2, 1},  // FlexPWM1_1_B  34  // SD_B0_03

  56. 	{1, M(1, 1), 1, 1},  // FlexPWM1_1_A  35  // SD_B0_02

  57. 	{1, M(1, 0), 2, 1},  // FlexPWM1_0_B  36  // SD_B0_01

  58. 	{1, M(1, 0), 1, 1},  // FlexPWM1_0_A  37  // SD_B0_00

  59. 	{1, M(1, 2), 2, 1},  // FlexPWM1_2_B  38  // SD_B0_05

  60. 	{1, M(1, 2), 1, 1},  // FlexPWM1_2_A  39  // SD_B0_04

  61. #endif

  62. #ifdef ARDUINO_TEENSY41

  63. 	{0, M(1, 0), 0, 0},

  64. 	{0, M(1, 0), 0, 0},

  65. 	{1, M(2, 3), 1, 6},  // FlexPWM2_3_A  36  // B1_00

  66. 	{1, M(2, 3), 2, 6},  // FlexPWM2_3_B  37  // B1_01

  67. 	{0, M(1, 0), 0, 0},

  68. 	{0, M(1, 0), 0, 0},

  69. 	{0, M(1, 0), 0, 0},

  70. 	{0, M(1, 0), 0, 0},

  71. 	{1, M(1, 1), 2, 1},  // FlexPWM1_1_B  42  // SD_B0_03

  72. 	{1, M(1, 1), 1, 1},  // FlexPWM1_1_A  43  // SD_B0_02

  73. 	{1, M(1, 0), 2, 1},  // FlexPWM1_0_B  44  // SD_B0_01

  74. 	{1, M(1, 0), 1, 1},  // FlexPWM1_0_A  45  // SD_B0_00

  75. 	{1, M(1, 2), 2, 1},  // FlexPWM1_2_B  46  // SD_B0_05

  76. 	{1, M(1, 2), 1, 1},  // FlexPWM1_2_A  47  // SD_B0_04

  77. 	{0, M(1, 0), 0, 0},  // duplicate FlexPWM1_0_B

  78. 	{0, M(1, 0), 0, 0},  // duplicate FlexPWM1_2_A

  79. 	{0, M(1, 0), 0, 0},  // duplicate FlexPWM1_2_B

  80. 	{1, M(3, 3), 2, 1},  // FlexPWM3_3_B  51  // EMC_22

  81. 	{0, M(1, 0), 0, 0},  // duplicate FlexPWM1_1_B

  82. 	{0, M(1, 0), 0, 0},  // duplicate FlexPWM1_1_A

  83. 	{1, M(3, 0), 1, 1},  // FlexPWM3_0_A  53  // EMC_29

  84. #endif

  85. #ifdef ARDUINO_TEENSY_MICROMOD

  86. 	{1, M(1, 1), 2, 1},  // FlexPWM1_1_B  34  // SD_B0_03

  87. 	{1, M(1, 1), 1, 1},  // FlexPWM1_1_A  35  // SD_B0_02

  88. 	{1, M(1, 0), 2, 1},  // FlexPWM1_0_B  36  // SD_B0_01

  89. 	{1, M(1, 0), 1, 1},  // FlexPWM1_0_A  37  // SD_B0_00

  90. 	{1, M(1, 2), 2, 1},  // FlexPWM1_2_B  38  // SD_B0_05

  91. 	{1, M(1, 2), 1, 1},  // FlexPWM1_2_A  39  // SD_B0_04

  92. 	{2, M(2, 1), 0, 1},  // QuadTimer2_1  40  // B0_04

  93. 	{2, M(2, 2), 0, 1},  // QuadTimer2_2  41  // B0_05

  94. 	{0, M(1, 0), 0, 0},  // duplicate QuadTimer3_0

  95. 	{0, M(1, 0), 0, 0},  // duplicate QuadTimer3_1

  96. 	{0, M(1, 0), 0, 0},  // duplicate QuadTimer3_2

  97. 	{2, M(4, 0), 0, 1},  // QuadTimer4_0  45  // B0_09

  98. #endif

  99. };

  100. 

  101. // Known usage of FlexPWM and QuadTimers

  102. // -------------------------------------

  103. //   FlexPWM1_0    PWM pin 1, 36(T4.0), 37(T4.0), 44(T4.1), 45(T4.1)

  104. //   FlexPWM1_1    PWM pin 0, 34(T4.0), 35(T4.0), 42(T4.1), 43(T4.1)

  105. //   FlexPWM1_2    PWM pin 24, 38(T4.0), 39(T4.0), 46(T4.1), 47(T4.1)

  106. //   FlexPWM1_3    PWM pin 7, 8, 25

  107. //   FlexPWM2_0    PWM pin 4, 33

  108. //   FlexPWM2_1    PWM pin 5

  109. //   FlexPWM2_2    PWM pin 6, 9

  110. //   FlexPWM2_3    PWM pin 36(T4.1), 37(T4.1)

  111. //   FlexPWM3_0    PWM pin 53(T4.1)

  112. //   FlexPWM3_1    PWM pin 28, 29

  113. //   FlexPWM3_2

  114. //   FlexPWM3_3    PWM pin 41(T4.1)

  115. //   FlexPWM4_0    PWM pin 22

  116. //   FlexPWM4_1    PWM pin 23

  117. //   FlexPWM4_2    PWM pin 2, 3

  118. //   FlexPWM4_3

  119. //   QuadTimer1_0  PWM pin 10

  120. //   QuadTimer1_1  PWM pin 12

  121. //   QuadTimer1_2  PWM pin 11

  122. //   QuadTimer1_3

  123. //   QuadTimer2_0  PWM pin 13

  124. //   QuadTimer2_1

  125. //   QuadTimer2_2

  126. //   QuadTimer2_3

  127. //   QuadTimer3_0  PWM pin 19

  128. //   QuadTimer3_1  PWM pin 18

  129. //   QuadTimer3_2  PWM pin 14

  130. //   QuadTimer3_3  PWM pin 15

  131. //   QuadTimer4_0  OctoWS2811

  132. //   QuadTimer4_1  OctoWS2811

  133. //   QuadTimer4_2  OctoWS2811

  134. //   QuadTimer4_3  AudioInputAnalog

  135. 

  136. 

  137. #endif // __IMXRT1062__

  138. 

  139. void flexpwmWrite(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, uint16_t val)

  140. {

  141. 	uint16_t mask = 1 << submodule;

  142. 	uint32_t modulo = p->SM[submodule].VAL1;

  143. 	uint32_t cval = ((uint32_t)val * (modulo + 1)) >> analog_write_res;

  144. 	if (cval > modulo) cval = modulo; // TODO: is this check correct?

  145. 

  146. 	//printf("flexpwmWrite, p=%08lX, sm=%d, ch=%c, cval=%ld\n",

  147. 		//(uint32_t)p, submodule, channel == 0 ? 'X' : (channel == 1 ? 'A' : 'B'), cval);

  148. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);

  149. 	switch (channel) {

  150. 	  case 0: // X

  151. 		p->SM[submodule].VAL0 = modulo - cval;

  152. 		p->OUTEN |= FLEXPWM_OUTEN_PWMX_EN(mask);

  153. 		//printf(" write channel X\n");

  154. 		break;

  155. 	  case 1: // A

  156. 		p->SM[submodule].VAL3 = cval;

  157. 		p->OUTEN |= FLEXPWM_OUTEN_PWMA_EN(mask);

  158. 		//printf(" write channel A\n");

  159. 		break;

  160. 	  case 2: // B

  161. 		p->SM[submodule].VAL5 = cval;

  162. 		p->OUTEN |= FLEXPWM_OUTEN_PWMB_EN(mask);

  163. 		//printf(" write channel B\n");

  164. 	}

  165. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);

  166. }

  167. 

  168. void flexpwmFrequency(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, float frequency)

  169. {

  170. 	uint16_t mask = 1 << submodule;

  171. 	uint32_t olddiv = p->SM[submodule].VAL1;

  172. 	uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5f);

  173. 	uint32_t prescale = 0;

  174. 	//printf(" div=%lu\n", newdiv);

  175. 	while (newdiv > 65535 && prescale < 7) {

  176. 		newdiv = newdiv >> 1;

  177. 		prescale = prescale + 1;

  178. 	}

  179. 	if (newdiv > 65535) {

  180. 		newdiv = 65535;

  181. 	} else if (newdiv < 2) {

  182. 		newdiv = 2;

  183. 	}

  184. 	//printf(" div=%lu, scale=%lu\n", newdiv, prescale);

  185. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);

  186. 	p->SM[submodule].CTRL = FLEXPWM_SMCTRL_FULL | FLEXPWM_SMCTRL_PRSC(prescale);

  187. 	p->SM[submodule].VAL1 = newdiv - 1;

  188. 	p->SM[submodule].VAL0 = (p->SM[submodule].VAL0 * newdiv) / olddiv;

  189. 	p->SM[submodule].VAL3 = (p->SM[submodule].VAL3 * newdiv) / olddiv;

  190. 	p->SM[submodule].VAL5 = (p->SM[submodule].VAL5 * newdiv) / olddiv;

  191. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);

  192. }

  193. 

  194. void quadtimerWrite(IMXRT_TMR_t *p, unsigned int submodule, uint16_t val)

  195. {

  196. 	uint32_t modulo = 65537 - p->CH[submodule].LOAD + p->CH[submodule].CMPLD1;

  197. 	uint32_t high = ((uint32_t)val * (modulo - 1)) >> analog_write_res;

  198. 	if (high >= modulo - 1) high = modulo - 2;

  199. 

  200. 	//printf(" modulo=%lu\n", modulo);

  201. 	//printf(" high=%lu\n", high);

  202. 	uint32_t low = modulo - high; // low must 2 or higher

  203. 	//printf(" low=%lu\n", low);

  204. 

  205. 	p->CH[submodule].LOAD = 65537 - low;

  206. 	p->CH[submodule].CMPLD1 = high;

  207. }

  208. 

  209. void quadtimerFrequency(IMXRT_TMR_t *p, unsigned int submodule, float frequency)

  210. {

  211. 	uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5f);

  212. 	uint32_t prescale = 0;

  213. 	//printf(" div=%lu\n", newdiv);

  214. 	while (newdiv > 65534 && prescale < 7) {

  215. 		newdiv = newdiv >> 1; 

  216. 		prescale = prescale + 1;

  217. 	}

  218. 	if (newdiv > 65534) {

  219. 		newdiv = 65534;

  220. 	} else if (newdiv < 2) {

  221. 		newdiv = 2;

  222. 	}

  223. 	//printf(" div=%lu, scale=%lu\n", newdiv, prescale);

  224. 	uint32_t oldhigh = p->CH[submodule].CMPLD1;

  225. 	uint32_t oldlow = 65537 - p->CH[submodule].LOAD;

  226. 	uint32_t high = (oldhigh * newdiv) / (oldhigh + oldlow);

  227. 	// TODO: low must never be less than 2 - can it happen with this?

  228. 	uint32_t low = newdiv - high;

  229. 	//printf(" high=%lu, low=%lu\n", high, low);

  230. 	p->CH[submodule].LOAD = 65537 - low;

  231. 	p->CH[submodule].CMPLD1 = high;

  232. 	p->CH[submodule].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8 + prescale) |

  233. 		TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);

  234. }

  235. 

  236. void analogWrite(uint8_t pin, int val)

  237. {

  238. 	const struct pwm_pin_info_struct *info;

  239. 

  240. 	if (pin >= CORE_NUM_DIGITAL) return;

  241. 	//printf("analogWrite, pin %d, val %d\n", pin, val);

  242. 	info = pwm_pin_info + pin;

  243. 	if (info->type == 1) {

  244. 		// FlexPWM pin

  245. 		IMXRT_FLEXPWM_t *flexpwm;

  246. 		switch ((info->module >> 4) & 3) {

  247. 		  case 0: flexpwm = &IMXRT_FLEXPWM1; break;

  248. 		  case 1: flexpwm = &IMXRT_FLEXPWM2; break;

  249. 		  case 2: flexpwm = &IMXRT_FLEXPWM3; break;

  250. 		  default: flexpwm = &IMXRT_FLEXPWM4;

  251. 		}

  252. 		flexpwmWrite(flexpwm, info->module & 0x03, info->channel, val);

  253. 	} else if (info->type == 2) {

  254. 		// QuadTimer pin

  255. 		IMXRT_TMR_t *qtimer;

  256. 		switch ((info->module >> 4) & 3) {

  257. 		  case 0: qtimer = &IMXRT_TMR1; break;

  258. 		  case 1: qtimer = &IMXRT_TMR2; break;

  259. 		  case 2: qtimer = &IMXRT_TMR3; break;

  260. 		  default: qtimer = &IMXRT_TMR4;

  261. 		}

  262. 		quadtimerWrite(qtimer, info->module & 0x03, val);

  263. 	} else {

  264. 		return;

  265. 	}

  266. 	*(portConfigRegister(pin)) = info->muxval;

  267. 	// TODO: pad config register

  268. }

  269. 

  270. void analogWriteFrequency(uint8_t pin, float frequency)

  271. {

  272. 	const struct pwm_pin_info_struct *info;

  273. 

  274. 	if (pin >= CORE_NUM_DIGITAL) return;

  275. 	//printf("analogWriteFrequency, pin %d, freq %d\n", pin, (int)frequency);

  276. 	info = pwm_pin_info + pin;

  277. 	if (info->type == 1) {

  278. 		// FlexPWM pin

  279. 		IMXRT_FLEXPWM_t *flexpwm;

  280. 		switch ((info->module >> 4) & 3) {

  281. 		  case 0: flexpwm = &IMXRT_FLEXPWM1; break;

  282. 		  case 1: flexpwm = &IMXRT_FLEXPWM2; break;

  283. 		  case 2: flexpwm = &IMXRT_FLEXPWM3; break;

  284. 		  default: flexpwm = &IMXRT_FLEXPWM4;

  285. 		}

  286. 		flexpwmFrequency(flexpwm, info->module & 0x03, info->channel, frequency);

  287. 	} else if (info->type == 2) {

  288. 		// QuadTimer pin

  289. 		IMXRT_TMR_t *qtimer;

  290. 		switch ((info->module >> 4) & 3) {

  291. 		  case 0: qtimer = &IMXRT_TMR1; break;

  292. 		  case 1: qtimer = &IMXRT_TMR2; break;

  293. 		  case 2: qtimer = &IMXRT_TMR3; break;

  294. 		  default: qtimer = &IMXRT_TMR4;

  295. 		}

  296. 		quadtimerFrequency(qtimer, info->module & 0x03, frequency);

  297. 	}

  298. }

  299. 

  300. void flexpwm_init(IMXRT_FLEXPWM_t *p)

  301. {

  302. 	int i;

  303. 

  304. 	p->FCTRL0 = FLEXPWM_FCTRL0_FLVL(15); // logic high = fault

  305. 	p->FSTS0 = 0x000F; // clear fault status

  306. 	p->FFILT0 = 0;

  307. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(15);

  308. 	for (i=0; i < 4; i++) {

  309. 		p->SM[i].CTRL2 = FLEXPWM_SMCTRL2_INDEP | FLEXPWM_SMCTRL2_WAITEN

  310. 			| FLEXPWM_SMCTRL2_DBGEN;

  311. 		p->SM[i].CTRL = FLEXPWM_SMCTRL_FULL;

  312. 		p->SM[i].OCTRL = 0;

  313. 		p->SM[i].DTCNT0 = 0;

  314. 		p->SM[i].INIT = 0;

  315. 		p->SM[i].VAL0 = 0;

  316. 		p->SM[i].VAL1 = 33464;

  317. 		p->SM[i].VAL2 = 0;

  318. 		p->SM[i].VAL3 = 0;

  319. 		p->SM[i].VAL4 = 0;

  320. 		p->SM[i].VAL5 = 0;

  321. 	}

  322. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(15);

  323. 	p->MCTRL |= FLEXPWM_MCTRL_RUN(15);

  324. }

  325. 

  326. void quadtimer_init(IMXRT_TMR_t *p)

  327. {

  328. 	int i;

  329. 

  330. 	for (i=0; i < 4; i++) {

  331. 		p->CH[i].CTRL = 0; // stop timer

  332. 		p->CH[i].CNTR = 0;

  333. 		p->CH[i].SCTRL = TMR_SCTRL_OEN | TMR_SCTRL_OPS | TMR_SCTRL_VAL | TMR_SCTRL_FORCE;

  334. 		p->CH[i].CSCTRL = TMR_CSCTRL_CL1(1) | TMR_CSCTRL_ALT_LOAD;

  335. 		// COMP must be less than LOAD - otherwise output is always low

  336. 		p->CH[i].LOAD = 24000;   // low time  (65537 - x) - 

  337. 		p->CH[i].COMP1 = 0;  // high time (0 = always low, max = LOAD-1)

  338. 		p->CH[i].CMPLD1 = 0;

  339. 		p->CH[i].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8) |

  340. 			TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);

  341. 	}

  342. }

  343. 

  344. void pwm_init(void)

  345. {

  346. 	//printf("pwm init\n");

  347. 	CCM_CCGR4 |= CCM_CCGR4_PWM1(CCM_CCGR_ON) | CCM_CCGR4_PWM2(CCM_CCGR_ON) |

  348. 		CCM_CCGR4_PWM3(CCM_CCGR_ON) | CCM_CCGR4_PWM4(CCM_CCGR_ON);

  349. 	CCM_CCGR6 |= CCM_CCGR6_QTIMER1(CCM_CCGR_ON) | CCM_CCGR6_QTIMER2(CCM_CCGR_ON) |

  350. 		CCM_CCGR6_QTIMER3(CCM_CCGR_ON) | CCM_CCGR6_QTIMER4(CCM_CCGR_ON);

  351. 	flexpwm_init(&IMXRT_FLEXPWM1);

  352. 	flexpwm_init(&IMXRT_FLEXPWM2);

  353. 	flexpwm_init(&IMXRT_FLEXPWM3);

  354. 	flexpwm_init(&IMXRT_FLEXPWM4);

  355. 	quadtimer_init(&IMXRT_TMR1);

  356. 	quadtimer_init(&IMXRT_TMR2);

  357. 	quadtimer_init(&IMXRT_TMR3);

  358. }

  359. 

  360. 

  361. 

  362. void xbar_connect(unsigned int input, unsigned int output)

  363. {

  364. 	if (input >= 88) return;

  365. 	if (output >= 132) return;

  366. #if 1

  367. 	volatile uint16_t *xbar = &XBARA1_SEL0 + (output / 2);

  368. 	uint16_t val = *xbar;

  369. 	if (!(output & 1)) {

  370. 		val = (val & 0xFF00) | input;

  371. 	} else {

  372. 		val = (val & 0x00FF) | (input << 8);

  373. 	}

  374. 	*xbar = val;

  375. #else

  376. 	// does not work, seems 8 bit access is not allowed

  377. 	volatile uint8_t *xbar = (volatile uint8_t *)XBARA1_SEL0;

  378. 	xbar[output] = input;

  379. #endif

  380. }

  381. 

  382. uint32_t analogWriteRes(uint32_t bits)

  383. {

  384. 	uint32_t prior;

  385. 	if (bits < 1) {

  386. 		bits = 1;

  387. 	} else if (bits > 16) {

  388. 		bits = 16;

  389. 	}

  390. 	prior = analog_write_res;

  391. 	analog_write_res = bits;

  392. 	return prior;

  393. }

  394.