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teensy-cores/teensy4/pwm.c

367 lines
12KB
Исходник Blame История 

  1. #include "imxrt.h"

  2. #include "core_pins.h"

  3. #include "debug/printf.h"

  4. 

  5. 

  6. struct pwm_pin_info_struct {

  7. 	uint8_t type;    // 0=no pwm, 1=flexpwm, 2=quad

  8. 	uint8_t module;  // 0-3, 0-3

  9. 	uint8_t channel; // 0=X, 1=A, 2=B

  10. 	uint8_t muxval;  //

  11. };

  12. 

  13. uint8_t analog_write_res = 8;

  14. 

  15. #define M(a, b) ((((a) - 1) << 4) | (b))

  16. 

  17. #if defined(__IMXRT1062__)

  18. 

  19. const struct pwm_pin_info_struct pwm_pin_info[] = {

  20. 	{1, M(1, 1), 0, 4},  // FlexPWM1_1_X   0  // AD_B0_03

  21. 	{1, M(1, 0), 0, 4},  // FlexPWM1_0_X   1  // AD_B0_02

  22. 	{1, M(4, 2), 1, 1},  // FlexPWM4_2_A   2  // EMC_04

  23. 	{1, M(4, 2), 2, 1},  // FlexPWM4_2_B   3  // EMC_05

  24. 	{1, M(2, 0), 1, 1},  // FlexPWM2_0_A   4  // EMC_06

  25. 	{1, M(2, 1), 1, 1},  // FlexPWM2_1_A   5  // EMC_08

  26. 	{1, M(2, 2), 1, 2},  // FlexPWM2_2_A   6  // B0_10

  27. 	{1, M(1, 3), 2, 6},  // FlexPWM1_3_B   7  // B1_01

  28. 	{1, M(1, 3), 1, 6},  // FlexPWM1_3_A   8  // B1_00

  29. 	{1, M(2, 2), 2, 2},  // FlexPWM2_2_B   9  // B0_11

  30. 	{2, M(1, 0), 0, 1},  // QuadTimer1_0  10  // B0_00

  31. 	{2, M(1, 2), 0, 1},  // QuadTimer1_2  11  // B0_02

  32. 	{2, M(1, 1), 0, 1},  // QuadTimer1_1  12  // B0_01

  33. 	{2, M(2, 0), 0, 1},  // QuadTimer2_0  13  // B0_03

  34. 	{2, M(3, 2), 0, 1},  // QuadTimer3_2  14  // AD_B1_02

  35. 	{2, M(3, 3), 0, 1},  // QuadTimer3_3  15  // AD_B1_03

  36. 	{0, M(1, 0), 0, 0},

  37. 	{0, M(1, 0), 0, 0},

  38. 	{2, M(3, 1), 0, 1},  // QuadTimer3_1  18  // AD_B1_01

  39. 	{2, M(3, 0), 0, 1},  // QuadTimer3_0  19  // AD_B1_00

  40. 	{0, M(1, 0), 0, 0},

  41. 	{0, M(1, 0), 0, 0},

  42. 	{1, M(4, 0), 1, 1},  // FlexPWM4_0_A  22  // AD_B1_08

  43. 	{1, M(4, 1), 1, 1},  // FlexPWM4_1_A  23  // AD_B1_09

  44. 	{1, M(1, 2), 0, 4},  // FlexPWM1_2_X  24  // AD_B0_12

  45. 	{1, M(1, 3), 0, 4},  // FlexPWM1_3_X  25  // AD_B0_13

  46. 	{0, M(1, 0), 0, 0},

  47. 	{0, M(1, 0), 0, 0},

  48. 	{1, M(3, 1), 2, 1},  // FlexPWM3_1_B  28  // EMC_32

  49. 	{1, M(3, 1), 1, 1},  // FlexPWM3_1_A  29  // EMC_31

  50. 	{0, M(1, 0), 0, 0},

  51. 	{0, M(1, 0), 0, 0},

  52. 	{0, M(1, 0), 0, 0},

  53. 	{1, M(2, 0), 2, 1},  // FlexPWM2_0_B  33  // EMC_07

  54. 	{1, M(1, 1), 2, 1},	 // FlexPWM1_1_B  34  // SD_B0_03

  55. 	{1, M(1, 1), 1, 1},	 // FlexPWM1_1_A  35  // SD_B0_02

  56. 	{1, M(1, 0), 2, 1},	 // FlexPWM1_0_B  36  // SD_B0_01

  57. 	{1, M(1, 0), 1, 1},	 // FlexPWM1_0_A  37  // SD_B0_00

  58. 	{1, M(1, 2), 2, 1},	 // FlexPWM1_2_B  38  // SD_B0_05

  59. 	{1, M(1, 2), 1, 1},	 // FlexPWM1_2_A  39  // SD_B0_04

  60. };

  61. 

  62. #elif defined(__IMXRT1052__)

  63. 

  64. const struct pwm_pin_info_struct pwm_pin_info[] = {

  65. 	{1, M(1, 1), 0, 4},  // FlexPWM1_1_X   0  // AD_B0_03

  66. 	{1, M(1, 0), 0, 4},  // FlexPWM1_0_X   1  // AD_B0_02

  67. 	{1, M(4, 2), 1, 1},  // FlexPWM4_2_A   2  // EMC_04

  68. 	{1, M(4, 2), 2, 1},  // FlexPWM4_2_B   3  // EMC_05

  69. 	{1, M(2, 0), 1, 1},  // FlexPWM2_0_A   4  // EMC_06

  70. 	{1, M(2, 0), 2, 1},  // FlexPWM2_0_B   5  // EMC_07

  71. 	{1, M(1, 3), 2, 6},  // FlexPWM1_3_B   6  // B1_01

  72. 	{1, M(1, 3), 1, 6},  // FlexPWM1_3_A   7  // B1_00

  73. 	{1, M(2, 2), 1, 2},  // FlexPWM2_2_A   8  // B0_10

  74. 	{1, M(2, 2), 2, 2},  // FlexPWM2_2_B   9  // B0_11

  75. 	{2, M(1, 0), 0, 1},  // QuadTimer1_0  10  // B0_00

  76. 	{2, M(1, 2), 0, 1},  // QuadTimer1_2  11  // B0_02

  77. 	{2, M(1, 1), 0, 1},  // QuadTimer1_1  12  // B0_01

  78. 	{2, M(2, 0), 0, 1},  // QuadTimer2_0  13  // B0_03

  79. 	{2, M(3, 2), 0, 1},  // QuadTimer3_2  14  // AD_B1_02

  80. 	{2, M(3, 3), 0, 1},  // QuadTimer3_3  15  // AD_B1_03

  81. 	{0, M(1, 0), 0, 0},

  82. 	{0, M(1, 0), 0, 0},

  83. 	{2, M(3, 1), 0, 1},  // QuadTimer3_1  18  // AD_B1_01

  84. 	{2, M(3, 0), 0, 1},  // QuadTimer3_0  19  // AD_B1_00

  85. 	{0, M(1, 0), 0, 0},

  86. 	{0, M(1, 0), 0, 0},

  87. 	{1, M(4, 0), 1, 1},  // FlexPWM4_0_A  22  // AD_B1_08

  88. 	{1, M(4, 1), 1, 1},  // FlexPWM4_1_A  23  // AD_B1_09

  89. 	{1, M(1, 2), 0, 4},  // FlexPWM1_2_X  24  // AD_B0_12

  90. 	{1, M(1, 3), 0, 4},  // FlexPWM1_3_X  25  // AD_B0_13

  91. 	{0, M(1, 0), 0, 0},

  92. 	{0, M(1, 0), 0, 0},

  93. 	{1, M(3, 1), 2, 1},  // FlexPWM3_1_B  28  // EMC_32

  94. 	{1, M(3, 1), 1, 1},  // FlexPWM3_1_A  29  // EMC_31

  95. 	{1, M(1, 0), 2, 1},  // FlexPWM1_0_B  30  // EMC_24

  96. 	{1, M(1, 0), 1, 1},  // FlexPWM1_0_A  31  // EMC_23

  97. 	{0, M(1, 0), 0, 0},

  98. 	{1, M(2, 1), 1, 1},  // FlexPWM2_1_A  33  // EMC_08

  99. 	{1, M(2, 0), 2, 1},  // FlexPWM2_0_B  33  // EMC_07

  100. 	{1, M(1, 1), 2, 1},	 // FlexPWM1_1_B  34  // SD_B0_03

  101. 	{1, M(1, 1), 1, 1},	 // FlexPWM1_1_A  35  // SD_B0_02

  102. 	{1, M(1, 0), 2, 1},	 // FlexPWM1_0_B  36  // SD_B0_01

  103. 	{1, M(1, 0), 1, 1},	 // FlexPWM1_0_A  37  // SD_B0_00

  104. 	{1, M(1, 2), 2, 1},	 // FlexPWM1_2_B  38  // SD_B0_05

  105. 	{1, M(1, 2), 1, 1},	 // FlexPWM1_2_A  39  // SD_B0_04

  106. };

  107. 

  108. #endif // __IMXRT1052__

  109. 

  110. void flexpwmWrite(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, uint16_t val)

  111. {

  112. 	uint16_t mask = 1 << submodule;

  113. 	uint32_t modulo = p->SM[submodule].VAL1;

  114. 	uint32_t cval = ((uint32_t)val * (modulo + 1)) >> analog_write_res;

  115. 	if (cval > modulo) cval = modulo; // TODO: is this check correct?

  116. 

  117. 	//printf("flexpwmWrite, p=%08lX, sm=%d, ch=%c, cval=%ld\n",

  118. 		//(uint32_t)p, submodule, channel == 0 ? 'X' : (channel == 1 ? 'A' : 'B'), cval);

  119. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);

  120. 	switch (channel) {

  121. 	  case 0: // X

  122. 		p->SM[submodule].VAL0 = modulo - cval;

  123. 		p->OUTEN |= FLEXPWM_OUTEN_PWMX_EN(mask);

  124. 		//printf(" write channel X\n");

  125. 		break;

  126. 	  case 1: // A

  127. 		p->SM[submodule].VAL3 = cval;

  128. 		p->OUTEN |= FLEXPWM_OUTEN_PWMA_EN(mask);

  129. 		//printf(" write channel A\n");

  130. 		break;

  131. 	  case 2: // B

  132. 		p->SM[submodule].VAL5 = cval;

  133. 		p->OUTEN |= FLEXPWM_OUTEN_PWMB_EN(mask);

  134. 		//printf(" write channel B\n");

  135. 	}

  136. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);

  137. }

  138. 

  139. void flexpwmFrequency(IMXRT_FLEXPWM_t *p, unsigned int submodule, uint8_t channel, float frequency)

  140. {

  141. 	uint16_t mask = 1 << submodule;

  142. 	uint32_t olddiv = p->SM[submodule].VAL1;

  143. 	uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5);

  144. 	uint32_t prescale = 0;

  145. 	//printf(" div=%lu\n", newdiv);

  146. 	while (newdiv > 65535 && prescale < 7) {

  147. 		newdiv = newdiv >> 1;

  148. 		prescale = prescale + 1;

  149. 	}

  150. 	if (newdiv > 65535) {

  151. 		newdiv = 65535;

  152. 	} else if (newdiv < 2) {

  153. 		newdiv = 2;

  154. 	}

  155. 	//printf(" div=%lu, scale=%lu\n", newdiv, prescale);

  156. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(mask);

  157. 	p->SM[submodule].CTRL = FLEXPWM_SMCTRL_FULL | FLEXPWM_SMCTRL_PRSC(prescale);

  158. 	p->SM[submodule].VAL1 = newdiv - 1;

  159. 	p->SM[submodule].VAL0 = (p->SM[submodule].VAL0 * newdiv) / olddiv;

  160. 	p->SM[submodule].VAL3 = (p->SM[submodule].VAL3 * newdiv) / olddiv;

  161. 	p->SM[submodule].VAL5 = (p->SM[submodule].VAL5 * newdiv) / olddiv;

  162. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(mask);

  163. }

  164. 

  165. void quadtimerWrite(IMXRT_TMR_t *p, unsigned int submodule, uint16_t val)

  166. {

  167. 	uint32_t modulo = 65537 - p->CH[submodule].LOAD + p->CH[submodule].CMPLD1;

  168. 	uint32_t high = ((uint32_t)val * (modulo - 1)) >> analog_write_res;

  169. 	if (high >= modulo) high = modulo - 1; // TODO: is this check correct?

  170. 

  171. 	//printf(" modulo=%lu\n", modulo);

  172. 	//printf(" high=%lu\n", high);

  173. 	uint32_t low = modulo - high; // TODO: low must never be 0 or 1 - can it be??

  174. 	//printf(" low=%lu\n", low);

  175. 

  176. 	p->CH[submodule].LOAD = 65537 - low;

  177. 	p->CH[submodule].CMPLD1 = high;

  178. }

  179. 

  180. void quadtimerFrequency(IMXRT_TMR_t *p, unsigned int submodule, float frequency)

  181. {

  182. 	uint32_t newdiv = (uint32_t)((float)F_BUS_ACTUAL / frequency + 0.5);

  183. 	uint32_t prescale = 0;

  184. 	//printf(" div=%lu\n", newdiv);

  185. 	while (newdiv > 65534 && prescale < 7) {

  186. 		newdiv = newdiv >> 1; 

  187. 		prescale = prescale + 1;

  188. 	}

  189. 	if (newdiv > 65534) {

  190. 		newdiv = 65534;

  191. 	} else if (newdiv < 2) {

  192. 		newdiv = 2;

  193. 	}

  194. 	//printf(" div=%lu, scale=%lu\n", newdiv, prescale);

  195. 	uint32_t oldhigh = p->CH[submodule].CMPLD1;

  196. 	uint32_t oldlow = 65537 - p->CH[submodule].LOAD;

  197. 	uint32_t high = (oldhigh * newdiv) / (oldhigh + oldlow);

  198. 	// TODO: low must never be less than 2 - can it happen with this?

  199. 	uint32_t low = newdiv - high;

  200. 	//printf(" high=%lu, low=%lu\n", high, low);

  201. 	p->CH[submodule].LOAD = 65537 - low;

  202. 	p->CH[submodule].CMPLD1 = high;

  203. 	p->CH[submodule].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8 + prescale) |

  204. 		TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);

  205. }

  206. 

  207. void analogWrite(uint8_t pin, int val)

  208. {

  209. 	const struct pwm_pin_info_struct *info;

  210. 

  211. 	if (pin >= CORE_NUM_DIGITAL) return;

  212. 	//printf("analogWrite, pin %d, val %d\n", pin, val);

  213. 	info = pwm_pin_info + pin;

  214. 	if (info->type == 1) {

  215. 		// FlexPWM pin

  216. 		IMXRT_FLEXPWM_t *flexpwm;

  217. 		switch ((info->module >> 4) & 3) {

  218. 		  case 0: flexpwm = &IMXRT_FLEXPWM1; break;

  219. 		  case 1: flexpwm = &IMXRT_FLEXPWM2; break;

  220. 		  case 2: flexpwm = &IMXRT_FLEXPWM3; break;

  221. 		  default: flexpwm = &IMXRT_FLEXPWM4;

  222. 		}

  223. 		flexpwmWrite(flexpwm, info->module & 0x03, info->channel, val);

  224. 	} else if (info->type == 2) {

  225. 		// QuadTimer pin

  226. 		IMXRT_TMR_t *qtimer;

  227. 		switch ((info->module >> 4) & 3) {

  228. 		  case 0: qtimer = &IMXRT_TMR1; break;

  229. 		  case 1: qtimer = &IMXRT_TMR2; break;

  230. 		  case 2: qtimer = &IMXRT_TMR3; break;

  231. 		  default: qtimer = &IMXRT_TMR4;

  232. 		}

  233. 		quadtimerWrite(qtimer, info->module & 0x03, val);

  234. 	} else {

  235. 		return;

  236. 	}

  237. 	*(portConfigRegister(pin)) = info->muxval;

  238. 	// TODO: pad config register

  239. }

  240. 

  241. void analogWriteFrequency(uint8_t pin, float frequency)

  242. {

  243. 	const struct pwm_pin_info_struct *info;

  244. 

  245. 	if (pin >= CORE_NUM_DIGITAL) return;

  246. 	//printf("analogWriteFrequency, pin %d, freq %d\n", pin, (int)frequency);

  247. 	info = pwm_pin_info + pin;

  248. 	if (info->type == 1) {

  249. 		// FlexPWM pin

  250. 		IMXRT_FLEXPWM_t *flexpwm;

  251. 		switch ((info->module >> 4) & 3) {

  252. 		  case 0: flexpwm = &IMXRT_FLEXPWM1; break;

  253. 		  case 1: flexpwm = &IMXRT_FLEXPWM2; break;

  254. 		  case 2: flexpwm = &IMXRT_FLEXPWM3; break;

  255. 		  default: flexpwm = &IMXRT_FLEXPWM4;

  256. 		}

  257. 		flexpwmFrequency(flexpwm, info->module & 0x03, info->channel, frequency);

  258. 	} else if (info->type == 2) {

  259. 		// QuadTimer pin

  260. 		IMXRT_TMR_t *qtimer;

  261. 		switch ((info->module >> 4) & 3) {

  262. 		  case 0: qtimer = &IMXRT_TMR1; break;

  263. 		  case 1: qtimer = &IMXRT_TMR2; break;

  264. 		  case 2: qtimer = &IMXRT_TMR3; break;

  265. 		  default: qtimer = &IMXRT_TMR4;

  266. 		}

  267. 		quadtimerFrequency(qtimer, info->module & 0x03, frequency);

  268. 	}

  269. }

  270. 

  271. void flexpwm_init(IMXRT_FLEXPWM_t *p)

  272. {

  273. 	int i;

  274. 

  275. 	p->FCTRL0 = FLEXPWM_FCTRL0_FLVL(15); // logic high = fault

  276. 	p->FSTS0 = 0x000F; // clear fault status

  277. 	p->FFILT0 = 0;

  278. 	p->MCTRL |= FLEXPWM_MCTRL_CLDOK(15);

  279. 	for (i=0; i < 4; i++) {

  280. 		p->SM[i].CTRL2 = FLEXPWM_SMCTRL2_INDEP | FLEXPWM_SMCTRL2_WAITEN

  281. 			| FLEXPWM_SMCTRL2_DBGEN;

  282. 		p->SM[i].CTRL = FLEXPWM_SMCTRL_FULL;

  283. 		p->SM[i].OCTRL = 0;

  284. 		p->SM[i].DTCNT0 = 0;

  285. 		p->SM[i].INIT = 0;

  286. 		p->SM[i].VAL0 = 0;

  287. 		p->SM[i].VAL1 = 33464;

  288. 		p->SM[i].VAL2 = 0;

  289. 		p->SM[i].VAL3 = 0;

  290. 		p->SM[i].VAL4 = 0;

  291. 		p->SM[i].VAL5 = 0;

  292. 	}

  293. 	p->MCTRL |= FLEXPWM_MCTRL_LDOK(15);

  294. 	p->MCTRL |= FLEXPWM_MCTRL_RUN(15);

  295. }

  296. 

  297. void quadtimer_init(IMXRT_TMR_t *p)

  298. {

  299. 	int i;

  300. 

  301. 	for (i=0; i < 4; i++) {

  302. 		p->CH[i].CTRL = 0; // stop timer

  303. 		p->CH[i].CNTR = 0;

  304. 		p->CH[i].SCTRL = TMR_SCTRL_OEN | TMR_SCTRL_OPS | TMR_SCTRL_VAL | TMR_SCTRL_FORCE;

  305. 		p->CH[i].CSCTRL = TMR_CSCTRL_CL1(1) | TMR_CSCTRL_ALT_LOAD;

  306. 		// COMP must be less than LOAD - otherwise output is always low

  307. 		p->CH[i].LOAD = 24000;   // low time  (65537 - x) - 

  308. 		p->CH[i].COMP1 = 0;  // high time (0 = always low, max = LOAD-1)

  309. 		p->CH[i].CMPLD1 = 0;

  310. 		p->CH[i].CTRL = TMR_CTRL_CM(1) | TMR_CTRL_PCS(8) |

  311. 			TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE(6);

  312. 	}

  313. }

  314. 

  315. void pwm_init(void)

  316. {

  317. 	//printf("pwm init\n");

  318. 	CCM_CCGR4 |= CCM_CCGR4_PWM1(CCM_CCGR_ON) | CCM_CCGR4_PWM2(CCM_CCGR_ON) |

  319. 		CCM_CCGR4_PWM3(CCM_CCGR_ON) | CCM_CCGR4_PWM4(CCM_CCGR_ON);

  320. 	CCM_CCGR6 |= CCM_CCGR6_QTIMER1(CCM_CCGR_ON) | CCM_CCGR6_QTIMER2(CCM_CCGR_ON) |

  321. 		CCM_CCGR6_QTIMER3(CCM_CCGR_ON) | CCM_CCGR6_QTIMER4(CCM_CCGR_ON);

  322. 	flexpwm_init(&IMXRT_FLEXPWM1);

  323. 	flexpwm_init(&IMXRT_FLEXPWM2);

  324. 	flexpwm_init(&IMXRT_FLEXPWM3);

  325. 	flexpwm_init(&IMXRT_FLEXPWM4);

  326. 	quadtimer_init(&IMXRT_TMR1);

  327. 	quadtimer_init(&IMXRT_TMR2);

  328. 	quadtimer_init(&IMXRT_TMR3);

  329. }

  330. 

  331. 

  332. 

  333. void xbar_connect(unsigned int input, unsigned int output)

  334. {

  335. 	if (input >= 88) return;

  336. 	if (output >= 132) return;

  337. #if 1

  338. 	volatile uint16_t *xbar = &XBARA1_SEL0 + (output / 2);

  339. 	uint16_t val = *xbar;

  340. 	if (!(output & 1)) {

  341. 		val = (val & 0xFF00) | input;

  342. 	} else {

  343. 		val = (val & 0x00FF) | (input << 8);

  344. 	}

  345. 	*xbar = val;

  346. #else

  347. 	// does not work, seems 8 bit access is not allowed

  348. 	volatile uint8_t *xbar = (volatile uint8_t *)XBARA1_SEL0;

  349. 	xbar[output] = input;

  350. #endif

  351. }

  352. 

  353. uint32_t analogWriteRes(uint32_t bits)

  354. {

  355. 	uint32_t prior;

  356. 	if (bits < 1) {

  357. 		bits = 1;

  358. 	} else if (bits > 16) {

  359. 		bits = 16;

  360. 	}

  361. 	prior = analog_write_res;

  362. 	analog_write_res = bits;

  363. 	return prior;

  364. }

  365.