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  1. #include "HardwareSerial.h"
  2. #include "debug/printf.h"
  3. /*typedef struct {
  4. const uint32_t VERID;
  5. const uint32_t PARAM;
  6. volatile uint32_t GLOBAL;
  7. volatile uint32_t PINCFG;
  8. volatile uint32_t BAUD;
  9. volatile uint32_t STAT;
  10. volatile uint32_t CTRL;
  11. volatile uint32_t DATA;
  12. volatile uint32_t MATCH;
  13. volatile uint32_t MODIR;
  14. volatile uint32_t FIFO;
  15. volatile uint32_t WATER;
  16. } IMXRT_LPUART_t; */
  17. #define UART_CLOCK 24000000
  18. void HardwareSerial::begin(uint32_t baud, uint8_t format)
  19. {
  20. //printf("HardwareSerial begin\n");
  21. float base = (float)UART_CLOCK / (float)baud;
  22. float besterr = 1e20;
  23. int bestdiv = 1;
  24. int bestosr = 4;
  25. for (int osr=4; osr <= 32; osr++) {
  26. float div = base / (float)osr;
  27. int divint = (int)(div + 0.5f);
  28. if (divint < 1) divint = 1;
  29. else if (divint > 8191) divint = 8191;
  30. float err = ((float)divint - div) / div;
  31. if (err < 0.0f) err = -err;
  32. if (err <= besterr) {
  33. besterr = err;
  34. bestdiv = divint;
  35. bestosr = osr;
  36. }
  37. }
  38. //printf(" baud %d: osr=%d, div=%d\n", baud, bestosr, bestdiv);
  39. hardware->ccm_register |= hardware->ccm_value;
  40. hardware->rx_mux_register = hardware->rx_mux_val;
  41. hardware->tx_mux_register = hardware->tx_mux_val;
  42. port->BAUD = LPUART_BAUD_OSR(bestosr - 1) | LPUART_BAUD_SBR(bestdiv);
  43. port->CTRL = LPUART_CTRL_TE | LPUART_CTRL_RE;
  44. };
  45. int HardwareSerial::available(void)
  46. {
  47. return -1;
  48. }
  49. int HardwareSerial::peek(void)
  50. {
  51. return -1;
  52. }
  53. int HardwareSerial::read(void)
  54. {
  55. return -1;
  56. }
  57. void HardwareSerial::flush(void)
  58. {
  59. }
  60. size_t HardwareSerial::write(uint8_t c)
  61. {
  62. while (!(port->STAT & LPUART_STAT_TDRE)) ; // wait
  63. port->DATA = c;
  64. return 1;
  65. }
  66. __attribute__((section(".progmem")))
  67. const HardwareSerial::hardware_t UART6_Hardware = {
  68. IRQ_LPUART6,
  69. CCM_CCGR3, CCM_CCGR3_LPUART6(CCM_CCGR_ON),
  70. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03, // pin 0
  71. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02, // pin 1
  72. 2, // page 473
  73. 2, // page 472
  74. };
  75. HardwareSerial Serial1(&IMXRT_LPUART6, &UART6_Hardware);
  76. static HardwareSerial::hardware_t UART4_Hardware = {
  77. IRQ_LPUART4,
  78. CCM_CCGR1, CCM_CCGR1_LPUART4(CCM_CCGR_ON),
  79. IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01, // pin 6
  80. IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00, // pin 7
  81. 2, // page 521
  82. 2, // page 520
  83. };
  84. HardwareSerial Serial2(&IMXRT_LPUART4, &UART4_Hardware);
  85. static HardwareSerial::hardware_t UART2_Hardware = {
  86. IRQ_LPUART2,
  87. CCM_CCGR0, CCM_CCGR0_LPUART2(CCM_CCGR_ON),
  88. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_03, // pin 15
  89. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_02, // pin 14
  90. 2, // page 491
  91. 2, // page 490
  92. };
  93. HardwareSerial Serial3(&IMXRT_LPUART2, &UART2_Hardware);
  94. static HardwareSerial::hardware_t UART3_Hardware = {
  95. IRQ_LPUART3,
  96. CCM_CCGR0, CCM_CCGR0_LPUART3(CCM_CCGR_ON),
  97. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_07, // pin 16
  98. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_06, // pin 17
  99. 2, // page 495
  100. 2, // page 494
  101. };
  102. HardwareSerial Serial4(&IMXRT_LPUART3, &UART3_Hardware);
  103. static HardwareSerial::hardware_t UART8_Hardware = {
  104. IRQ_LPUART8,
  105. CCM_CCGR6, CCM_CCGR6_LPUART8(CCM_CCGR_ON),
  106. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_11, // pin 21
  107. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_10, // pin 20
  108. 2, // page 499
  109. 2, // page 498
  110. };
  111. HardwareSerial Serial5(&IMXRT_LPUART8, &UART8_Hardware);
  112. static HardwareSerial::hardware_t UART1_Hardware = {
  113. IRQ_LPUART1,
  114. CCM_CCGR5, CCM_CCGR5_LPUART1(CCM_CCGR_ON),
  115. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_13, // pin 25
  116. IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_12, // pin 24
  117. 2, // page 486
  118. 2, // page 485
  119. };
  120. HardwareSerial Serial6(&IMXRT_LPUART1, &UART1_Hardware);
  121. static HardwareSerial::hardware_t UART7_Hardware = {
  122. IRQ_LPUART7,
  123. CCM_CCGR5, CCM_CCGR5_LPUART7(CCM_CCGR_ON),
  124. IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, // pin 28
  125. IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, // pin 29
  126. 2, // page 458
  127. 2, // page 457
  128. };
  129. HardwareSerial Serial7(&IMXRT_LPUART7, &UART7_Hardware);
  130. static HardwareSerial::hardware_t UART5_Hardware = {
  131. IRQ_LPUART5,
  132. CCM_CCGR3, CCM_CCGR3_LPUART5(CCM_CCGR_ON),
  133. IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, // pin 30
  134. IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, // pin 31
  135. 2, // page 450
  136. 2, // page 449
  137. };
  138. HardwareSerial Serial8(&IMXRT_LPUART5, &UART5_Hardware);