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Fix SDIO clock config

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PaulStoffregen 7 years ago
parent
commit
044452fc45
1 changed files with 1 additions and 1 deletions
  1. +1
    -1
      utility/KinetisSDHC.c

+ 1
- 1
utility/KinetisSDHC.c View File

// prescale can be 2, 4, 8, 16, 32, 64, 128, 256 // prescale can be 2, 4, 8, 16, 32, 64, 128, 256
// divisor can be 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 // divisor can be 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
#define SDHC_SYSCTL_DIVISOR(prescale, divisor) \ #define SDHC_SYSCTL_DIVISOR(prescale, divisor) \
(SDHC_SYSCTL_DVS((prescale)>>1)|SDHC_SYSCTL_SDCLKFS((divisor)-1))
(SDHC_SYSCTL_SDCLKFS((prescale)>>1)|SDHC_SYSCTL_DVS((divisor)-1))


#if (F_CPU == 240000000) #if (F_CPU == 240000000)
#define SDHC_SYSCTL_400KHZ SDHC_SYSCTL_DIVISOR(64, 10) // 375 kHz #define SDHC_SYSCTL_400KHZ SDHC_SYSCTL_DIVISOR(64, 10) // 375 kHz

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