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#define CSRELEASE() DIRECT_WRITE_HIGH(cspin_basereg, cspin_bitmask) |
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#define CSRELEASE() DIRECT_WRITE_HIGH(cspin_basereg, cspin_bitmask) |
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#define SPICONFIG SPISettings(50000000, MSBFIRST, SPI_MODE0) |
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#define SPICONFIG SPISettings(50000000, MSBFIRST, SPI_MODE0) |
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#if defined(__arc__) |
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// Use SPI1 on Arduino 101 (accesses chip already on the board) |
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#define SPIPORT SPI1 |
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#elif 0 |
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// Add cases here, if you wish to use other SPI ports... |
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#else |
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// Otherwise, use the normal SPI port. |
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#define SPIPORT SPI |
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#endif |
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uint16_t SerialFlashChip::dirindex = 0; |
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uint16_t SerialFlashChip::dirindex = 0; |
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uint8_t SerialFlashChip::flags = 0; |
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uint8_t SerialFlashChip::flags = 0; |
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uint8_t SerialFlashChip::busy = 0; |
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uint8_t SerialFlashChip::busy = 0; |
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uint32_t status; |
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uint32_t status; |
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//Serial.print("wait-"); |
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//Serial.print("wait-"); |
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while (1) { |
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while (1) { |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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CSASSERT(); |
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CSASSERT(); |
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if (flags & FLAG_STATUS_CMD70) { |
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if (flags & FLAG_STATUS_CMD70) { |
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// some Micron chips require this different |
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// some Micron chips require this different |
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// command to detect program and erase completion |
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// command to detect program and erase completion |
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SPI.transfer(0x70); |
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status = SPI.transfer(0); |
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SPIPORT.transfer(0x70); |
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status = SPIPORT.transfer(0); |
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CSRELEASE(); |
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CSRELEASE(); |
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SPI.endTransaction(); |
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SPIPORT.endTransaction(); |
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//Serial.printf("b=%02x.", status & 0xFF); |
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//Serial.printf("b=%02x.", status & 0xFF); |
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if ((status & 0x80)) break; |
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if ((status & 0x80)) break; |
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} else { |
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} else { |
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// all others work by simply reading the status reg |
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// all others work by simply reading the status reg |
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SPI.transfer(0x05); |
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status = SPI.transfer(0); |
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SPIPORT.transfer(0x05); |
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status = SPIPORT.transfer(0); |
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CSRELEASE(); |
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CSRELEASE(); |
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SPI.endTransaction(); |
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SPIPORT.endTransaction(); |
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//Serial.printf("b=%02x.", status & 0xFF); |
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//Serial.printf("b=%02x.", status & 0xFF); |
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if (!(status & 1)) break; |
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if (!(status & 1)) break; |
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} |
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} |
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memset(p, 0, len); |
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memset(p, 0, len); |
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f = flags; |
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f = flags; |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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b = busy; |
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b = busy; |
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if (b) { |
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if (b) { |
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// read status register ... chip may no longer be busy |
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// read status register ... chip may no longer be busy |
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CSASSERT(); |
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CSASSERT(); |
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if (flags & FLAG_STATUS_CMD70) { |
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if (flags & FLAG_STATUS_CMD70) { |
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SPI.transfer(0x70); |
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status = SPI.transfer(0); |
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SPIPORT.transfer(0x70); |
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status = SPIPORT.transfer(0); |
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if ((status & 0x80)) b = 0; |
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if ((status & 0x80)) b = 0; |
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} else { |
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} else { |
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SPI.transfer(0x05); |
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status = SPI.transfer(0); |
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SPIPORT.transfer(0x05); |
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status = SPIPORT.transfer(0); |
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if (!(status & 1)) b = 0; |
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if (!(status & 1)) b = 0; |
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} |
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} |
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CSRELEASE(); |
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CSRELEASE(); |
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// which apparently have 2 different suspend |
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// which apparently have 2 different suspend |
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// commands, for program vs erase |
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// commands, for program vs erase |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x06); // write enable (Micron req'd) |
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SPIPORT.transfer(0x06); // write enable (Micron req'd) |
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CSRELEASE(); |
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CSRELEASE(); |
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delayMicroseconds(1); |
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delayMicroseconds(1); |
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cmd = 0x75; //Suspend program/erase for almost all chips |
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cmd = 0x75; //Suspend program/erase for almost all chips |
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// but Spansion just has to be different for program suspend! |
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// but Spansion just has to be different for program suspend! |
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if ((f & FLAG_DIFF_SUSPEND) && (b == 1)) cmd = 0x85; |
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if ((f & FLAG_DIFF_SUSPEND) && (b == 1)) cmd = 0x85; |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(cmd); // Suspend command |
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SPIPORT.transfer(cmd); // Suspend command |
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CSRELEASE(); |
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CSRELEASE(); |
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if (f & FLAG_STATUS_CMD70) { |
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if (f & FLAG_STATUS_CMD70) { |
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// Micron chips don't actually suspend until flags read |
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// Micron chips don't actually suspend until flags read |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x70); |
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SPIPORT.transfer(0x70); |
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do { |
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do { |
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status = SPI.transfer(0); |
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status = SPIPORT.transfer(0); |
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} while (!(status & 0x80)); |
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} while (!(status & 0x80)); |
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CSRELEASE(); |
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CSRELEASE(); |
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} else { |
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} else { |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x05); |
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SPIPORT.transfer(0x05); |
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do { |
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do { |
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status = SPI.transfer(0); |
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status = SPIPORT.transfer(0); |
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} while ((status & 0x01)); |
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} while ((status & 0x01)); |
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CSRELEASE(); |
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CSRELEASE(); |
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} |
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} |
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} else { |
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} else { |
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// chip is busy with an operation that can not suspend |
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// chip is busy with an operation that can not suspend |
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SPI.endTransaction(); // is this a good idea? |
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SPIPORT.endTransaction(); // is this a good idea? |
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wait(); // should we wait without ending |
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wait(); // should we wait without ending |
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b = 0; // the transaction?? |
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b = 0; // the transaction?? |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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} |
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} |
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} |
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} |
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do { |
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do { |
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CSASSERT(); |
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CSASSERT(); |
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// TODO: FIFO optimize.... |
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// TODO: FIFO optimize.... |
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if (f & FLAG_32BIT_ADDR) { |
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if (f & FLAG_32BIT_ADDR) { |
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SPI.transfer(0x03); |
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SPI.transfer16(addr >> 16); |
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SPI.transfer16(addr); |
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SPIPORT.transfer(0x03); |
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SPIPORT.transfer16(addr >> 16); |
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SPIPORT.transfer16(addr); |
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} else { |
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} else { |
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SPI.transfer16(0x0300 | ((addr >> 16) & 255)); |
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SPI.transfer16(addr); |
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SPIPORT.transfer16(0x0300 | ((addr >> 16) & 255)); |
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SPIPORT.transfer16(addr); |
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} |
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} |
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SPI.transfer(p, rdlen); |
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SPIPORT.transfer(p, rdlen); |
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CSRELEASE(); |
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CSRELEASE(); |
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p += rdlen; |
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p += rdlen; |
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addr += rdlen; |
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addr += rdlen; |
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} while (len > 0); |
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} while (len > 0); |
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if (b) { |
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if (b) { |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x06); // write enable (Micron req'd) |
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SPIPORT.transfer(0x06); // write enable (Micron req'd) |
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CSRELEASE(); |
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CSRELEASE(); |
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delayMicroseconds(1); |
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delayMicroseconds(1); |
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cmd = 0x7A; |
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cmd = 0x7A; |
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if ((f & FLAG_DIFF_SUSPEND) && (b == 1)) cmd = 0x8A; |
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if ((f & FLAG_DIFF_SUSPEND) && (b == 1)) cmd = 0x8A; |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(cmd); // Resume program/erase |
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SPIPORT.transfer(cmd); // Resume program/erase |
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CSRELEASE(); |
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CSRELEASE(); |
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} |
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} |
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SPI.endTransaction(); |
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SPIPORT.endTransaction(); |
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} |
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} |
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void SerialFlashChip::write(uint32_t addr, const void *buf, uint32_t len) |
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void SerialFlashChip::write(uint32_t addr, const void *buf, uint32_t len) |
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//Serial.printf("WR: addr %08X, len %d\n", addr, len); |
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//Serial.printf("WR: addr %08X, len %d\n", addr, len); |
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do { |
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do { |
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if (busy) wait(); |
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if (busy) wait(); |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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CSASSERT(); |
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CSASSERT(); |
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// write enable command |
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// write enable command |
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SPI.transfer(0x06); |
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SPIPORT.transfer(0x06); |
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CSRELEASE(); |
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CSRELEASE(); |
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max = 256 - (addr & 0xFF); |
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max = 256 - (addr & 0xFF); |
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pagelen = (len <= max) ? len : max; |
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pagelen = (len <= max) ? len : max; |
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delayMicroseconds(1); // TODO: reduce this, but prefer safety first |
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delayMicroseconds(1); // TODO: reduce this, but prefer safety first |
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CSASSERT(); |
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CSASSERT(); |
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if (flags & FLAG_32BIT_ADDR) { |
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if (flags & FLAG_32BIT_ADDR) { |
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SPI.transfer(0x02); // program page command |
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SPI.transfer16(addr >> 16); |
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SPI.transfer16(addr); |
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SPIPORT.transfer(0x02); // program page command |
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SPIPORT.transfer16(addr >> 16); |
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SPIPORT.transfer16(addr); |
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} else { |
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} else { |
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SPI.transfer16(0x0200 | ((addr >> 16) & 255)); |
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SPI.transfer16(addr); |
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SPIPORT.transfer16(0x0200 | ((addr >> 16) & 255)); |
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SPIPORT.transfer16(addr); |
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} |
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} |
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addr += pagelen; |
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addr += pagelen; |
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len -= pagelen; |
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len -= pagelen; |
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do { |
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do { |
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SPI.transfer(*p++); |
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SPIPORT.transfer(*p++); |
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} while (--pagelen > 0); |
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} while (--pagelen > 0); |
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CSRELEASE(); |
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CSRELEASE(); |
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busy = 4; |
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busy = 4; |
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SPI.endTransaction(); |
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SPIPORT.endTransaction(); |
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} while (len > 0); |
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} while (len > 0); |
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} |
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} |
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if (die_index >= die_count) return; // all dies erased :-) |
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if (die_index >= die_count) return; // all dies erased :-) |
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uint8_t die_size = 2; // in 16 Mbyte units |
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uint8_t die_size = 2; // in 16 Mbyte units |
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if (id[2] == 0x22) die_size = 8; |
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if (id[2] == 0x22) die_size = 8; |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x06); // write enable command |
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SPIPORT.transfer(0x06); // write enable command |
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CSRELEASE(); |
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CSRELEASE(); |
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delayMicroseconds(1); |
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delayMicroseconds(1); |
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CSASSERT(); |
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CSASSERT(); |
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// die erase command |
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// die erase command |
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SPI.transfer(0xC4); |
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SPI.transfer16((die_index * die_size) << 8); |
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SPI.transfer16(0x0000); |
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SPIPORT.transfer(0xC4); |
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SPIPORT.transfer16((die_index * die_size) << 8); |
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SPIPORT.transfer16(0x0000); |
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CSRELEASE(); |
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CSRELEASE(); |
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//Serial.printf("Micron erase begin\n"); |
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//Serial.printf("Micron erase begin\n"); |
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flags |= (die_index + 1) << 6; |
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flags |= (die_index + 1) << 6; |
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} else { |
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} else { |
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// All other chips support the bulk erase command |
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// All other chips support the bulk erase command |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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CSASSERT(); |
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CSASSERT(); |
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// write enable command |
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// write enable command |
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SPI.transfer(0x06); |
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SPIPORT.transfer(0x06); |
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CSRELEASE(); |
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CSRELEASE(); |
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delayMicroseconds(1); |
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delayMicroseconds(1); |
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CSASSERT(); |
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CSASSERT(); |
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// bulk erase command |
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// bulk erase command |
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SPI.transfer(0xC7); |
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SPIPORT.transfer(0xC7); |
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CSRELEASE(); |
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CSRELEASE(); |
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SPI.endTransaction(); |
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SPIPORT.endTransaction(); |
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} |
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} |
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busy = 3; |
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busy = 3; |
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} |
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} |
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{ |
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{ |
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uint8_t f = flags; |
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uint8_t f = flags; |
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if (busy) wait(); |
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if (busy) wait(); |
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SPI.beginTransaction(SPICONFIG); |
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SPIPORT.beginTransaction(SPICONFIG); |
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CSASSERT(); |
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CSASSERT(); |
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SPI.transfer(0x06); // write enable command |
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SPIPORT.transfer(0x06); // write enable command |
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CSRELEASE(); |
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CSRELEASE(); |
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delayMicroseconds(1); |
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delayMicroseconds(1); |
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|
CSASSERT(); |
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CSASSERT(); |
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if (f & FLAG_32BIT_ADDR) { |
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if (f & FLAG_32BIT_ADDR) { |
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SPI.transfer(0xD8); |
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SPI.transfer16(addr >> 16); |
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SPI.transfer16(addr); |
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SPIPORT.transfer(0xD8); |
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SPIPORT.transfer16(addr >> 16); |
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SPIPORT.transfer16(addr); |
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|
} else { |
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|
} else { |
|
|
SPI.transfer16(0xD800 | ((addr >> 16) & 255)); |
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|
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SPI.transfer16(addr); |
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|
SPIPORT.transfer16(0xD800 | ((addr >> 16) & 255)); |
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|
|
SPIPORT.transfer16(addr); |
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|
} |
|
|
} |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
SPI.endTransaction(); |
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|
|
SPIPORT.endTransaction(); |
|
|
busy = 2; |
|
|
busy = 2; |
|
|
} |
|
|
} |
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|
|
{ |
|
|
{ |
|
|
uint32_t status; |
|
|
uint32_t status; |
|
|
if (!busy) return true; |
|
|
if (!busy) return true; |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
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|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
if (flags & FLAG_STATUS_CMD70) { |
|
|
if (flags & FLAG_STATUS_CMD70) { |
|
|
// some Micron chips require this different |
|
|
// some Micron chips require this different |
|
|
// command to detect program and erase completion |
|
|
// command to detect program and erase completion |
|
|
SPI.transfer(0x70); |
|
|
|
|
|
status = SPI.transfer(0); |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0x70); |
|
|
|
|
|
status = SPIPORT.transfer(0); |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
SPI.endTransaction(); |
|
|
|
|
|
|
|
|
SPIPORT.endTransaction(); |
|
|
//Serial.printf("ready=%02x\n", status & 0xFF); |
|
|
//Serial.printf("ready=%02x\n", status & 0xFF); |
|
|
if ((status & 0x80) == 0) return false; |
|
|
if ((status & 0x80) == 0) return false; |
|
|
} else { |
|
|
} else { |
|
|
// all others work by simply reading the status reg |
|
|
// all others work by simply reading the status reg |
|
|
SPI.transfer(0x05); |
|
|
|
|
|
status = SPI.transfer(0); |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0x05); |
|
|
|
|
|
status = SPIPORT.transfer(0); |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
SPI.endTransaction(); |
|
|
|
|
|
|
|
|
SPIPORT.endTransaction(); |
|
|
//Serial.printf("ready=%02x\n", status & 0xFF); |
|
|
//Serial.printf("ready=%02x\n", status & 0xFF); |
|
|
if ((status & 1)) return false; |
|
|
if ((status & 1)) return false; |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
cspin_basereg = PIN_TO_BASEREG(pin); |
|
|
cspin_basereg = PIN_TO_BASEREG(pin); |
|
|
cspin_bitmask = PIN_TO_BITMASK(pin); |
|
|
cspin_bitmask = PIN_TO_BITMASK(pin); |
|
|
SPI.begin(); |
|
|
|
|
|
|
|
|
SPIPORT.begin(); |
|
|
pinMode(pin, OUTPUT); |
|
|
pinMode(pin, OUTPUT); |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
readID(id); |
|
|
readID(id); |
|
|
|
|
|
|
|
|
if (size > 16777216) { |
|
|
if (size > 16777216) { |
|
|
// more than 16 Mbyte requires 32 bit addresses |
|
|
// more than 16 Mbyte requires 32 bit addresses |
|
|
f |= FLAG_32BIT_ADDR; |
|
|
f |= FLAG_32BIT_ADDR; |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
|
|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
if (id[0] == ID0_SPANSION) { |
|
|
if (id[0] == ID0_SPANSION) { |
|
|
// spansion uses MSB of bank register |
|
|
// spansion uses MSB of bank register |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer16(0x1780); // bank register write |
|
|
|
|
|
|
|
|
SPIPORT.transfer16(0x1780); // bank register write |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
} else { |
|
|
} else { |
|
|
// micron & winbond & macronix use command |
|
|
// micron & winbond & macronix use command |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0x06); // write enable |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0x06); // write enable |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
delayMicroseconds(1); |
|
|
delayMicroseconds(1); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0xB7); // enter 4 byte addr mode |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0xB7); // enter 4 byte addr mode |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
} |
|
|
} |
|
|
SPI.endTransaction(); |
|
|
|
|
|
|
|
|
SPIPORT.endTransaction(); |
|
|
if (id[0] == ID0_MICRON) f |= FLAG_MULTI_DIE; |
|
|
if (id[0] == ID0_MICRON) f |= FLAG_MULTI_DIE; |
|
|
} |
|
|
} |
|
|
if (id[0] == ID0_SPANSION) { |
|
|
if (id[0] == ID0_SPANSION) { |
|
|
|
|
|
|
|
|
void SerialFlashChip::sleep() |
|
|
void SerialFlashChip::sleep() |
|
|
{ |
|
|
{ |
|
|
if (busy) wait(); |
|
|
if (busy) wait(); |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
|
|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0xB9); // Deep power down command |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0xB9); // Deep power down command |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void SerialFlashChip::wakeup() |
|
|
void SerialFlashChip::wakeup() |
|
|
{ |
|
|
{ |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
|
|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0xAB); // Wake up from deep power down command |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0xAB); // Wake up from deep power down command |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void SerialFlashChip::readID(uint8_t *buf) |
|
|
void SerialFlashChip::readID(uint8_t *buf) |
|
|
{ |
|
|
{ |
|
|
if (busy) wait(); |
|
|
if (busy) wait(); |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
|
|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0x9F); |
|
|
|
|
|
buf[0] = SPI.transfer(0); // manufacturer ID |
|
|
|
|
|
buf[1] = SPI.transfer(0); // memory type |
|
|
|
|
|
buf[2] = SPI.transfer(0); // capacity |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0x9F); |
|
|
|
|
|
buf[0] = SPIPORT.transfer(0); // manufacturer ID |
|
|
|
|
|
buf[1] = SPIPORT.transfer(0); // memory type |
|
|
|
|
|
buf[2] = SPIPORT.transfer(0); // capacity |
|
|
if (buf[0] == ID0_SPANSION) { |
|
|
if (buf[0] == ID0_SPANSION) { |
|
|
buf[3] = SPI.transfer(0); // ID-CFI |
|
|
|
|
|
buf[4] = SPI.transfer(0); // sector size |
|
|
|
|
|
|
|
|
buf[3] = SPIPORT.transfer(0); // ID-CFI |
|
|
|
|
|
buf[4] = SPIPORT.transfer(0); // sector size |
|
|
} |
|
|
} |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
SPI.endTransaction(); |
|
|
|
|
|
|
|
|
SPIPORT.endTransaction(); |
|
|
//Serial.printf("ID: %02X %02X %02X\n", buf[0], buf[1], buf[2]); |
|
|
//Serial.printf("ID: %02X %02X %02X\n", buf[0], buf[1], buf[2]); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
void SerialFlashChip::readSerialNumber(uint8_t *buf) //needs room for 8 bytes |
|
|
void SerialFlashChip::readSerialNumber(uint8_t *buf) //needs room for 8 bytes |
|
|
{ |
|
|
{ |
|
|
if (busy) wait(); |
|
|
if (busy) wait(); |
|
|
SPI.beginTransaction(SPICONFIG); |
|
|
|
|
|
|
|
|
SPIPORT.beginTransaction(SPICONFIG); |
|
|
CSASSERT(); |
|
|
CSASSERT(); |
|
|
SPI.transfer(0x4B); |
|
|
|
|
|
SPI.transfer16(0); |
|
|
|
|
|
SPI.transfer16(0); |
|
|
|
|
|
|
|
|
SPIPORT.transfer(0x4B); |
|
|
|
|
|
SPIPORT.transfer16(0); |
|
|
|
|
|
SPIPORT.transfer16(0); |
|
|
for (int i=0; i<8; i++) { |
|
|
for (int i=0; i<8; i++) { |
|
|
buf[i] = SPI.transfer(0); |
|
|
|
|
|
|
|
|
buf[i] = SPIPORT.transfer(0); |
|
|
} |
|
|
} |
|
|
CSRELEASE(); |
|
|
CSRELEASE(); |
|
|
SPI.endTransaction(); |
|
|
|
|
|
|
|
|
SPIPORT.endTransaction(); |
|
|
// Serial.printf("Serial Number: %02X %02X %02X %02X %02X %02X %02X %02X\n", buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); |
|
|
// Serial.printf("Serial Number: %02X %02X %02X %02X %02X %02X %02X %02X\n", buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); |
|
|
} |
|
|
} |
|
|
|
|
|
|