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@@ -63,6 +63,7 @@ private: |
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void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) { |
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init_AlwaysInline(clock, bitOrder, dataMode); |
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} |
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#if defined(__AVR__) |
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void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) |
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__attribute__((__always_inline__)) { |
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// Clock settings are defined as follows. Note that this shows SPI2X |
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@@ -127,6 +128,78 @@ private: |
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} |
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uint8_t spcr; |
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uint8_t spsr; |
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#elif defined(__arm__) && defined(TEENSYDUINO) |
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void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) |
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__attribute__((__always_inline__)) { |
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uint32_t t, c = SPI_CTAR_FMSZ(7); |
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if (bitOrder == LSBFIRST) c |= SPI_CTAR_LSBFE; |
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if (__builtin_constant_p(clock)) { |
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if (clock >= F_BUS / 2) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_DBR | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 3) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_DBR | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 4) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 5) { |
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t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_DBR | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 6) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 8) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1); |
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} else if (clock >= F_BUS / 10) { |
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t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 12) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1); |
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} else if (clock >= F_BUS / 16) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2); |
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} else if (clock >= F_BUS / 20) { |
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t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(0); |
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} else if (clock >= F_BUS / 24) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2); |
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} else if (clock >= F_BUS / 32) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(4) | SPI_CTAR_CSSCK(3); |
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} else if (clock >= F_BUS / 40) { |
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t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2); |
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} else if (clock >= F_BUS / 56) { |
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t = SPI_CTAR_PBR(3) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2); |
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} else if (clock >= F_BUS / 64) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4); |
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} else if (clock >= F_BUS / 96) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4); |
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} else if (clock >= F_BUS / 128) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5); |
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} else if (clock >= F_BUS / 192) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5); |
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} else if (clock >= F_BUS / 256) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6); |
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} else if (clock >= F_BUS / 384) { |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6); |
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} else if (clock >= F_BUS / 512) { |
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t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7); |
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} else if (clock >= F_BUS / 640) { |
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t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6); |
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} else { /* F_BUS / 768 */ |
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t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7); |
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} |
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} else { |
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for (uint32_t i=0; i<23; i++) { |
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t = ctar_clock_table[i]; |
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if (clock >= F_BUS / ctar_div_table[i]) break; |
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} |
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} |
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if (dataMode & 0x08) { |
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c |= SPI_CTAR_CPOL; |
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} |
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if (dataMode & 0x04) { |
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c |= SPI_CTAR_CPHA; |
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t = (t & 0xFFFF0FFF) | ((t & 0xF000) >> 4); |
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} |
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ctar = c | t; |
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} |
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static const uint16_t ctar_div_table[23]; |
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static const uint32_t ctar_clock_table[23]; |
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uint32_t ctar; |
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#endif |
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friend class SPIClass; |
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}; |
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@@ -143,7 +216,7 @@ public: |
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// with attachInterrupt. If SPI is used from a different interrupt |
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// (eg, a timer), interruptNumber should be 255. |
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static void usingInterrupt(uint8_t interruptNumber); |
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#if defined(__arm__) && defined(CORE_TEENSY) |
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#if defined(__arm__) && defined(TEENSYDUINO) |
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static void usingInterrupt(IRQ_NUMBER_t interruptName); |
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#endif |
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@@ -163,12 +236,21 @@ public: |
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cli(); |
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} |
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} |
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#if defined(__AVR__) |
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SPCR = settings.spcr; |
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SPSR = settings.spsr; |
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#elif defined(__arm__) && defined(TEENSYDUINO) |
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if (SPI0_CTAR0 != settings.ctar) { |
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SPI0_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F); |
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SPI0_CTAR0 = settings.ctar; |
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SPI0_CTAR1 = settings.ctar | SPI_CTAR_FMSZ(7); |
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SPI0_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F); |
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} |
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#endif |
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} |
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// Write to the SPI bus (MOSI pin) and also receive (MISO pin) |
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inline static byte transfer(byte data) { |
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inline static uint8_t transfer(uint8_t data) { |
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SPDR = data; |
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asm volatile("nop"); |
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while (!(SPSR & _BV(SPIF))) ; // wait |
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@@ -230,7 +312,7 @@ public: |
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inline static void attachInterrupt() { SPCR |= _BV(SPIE); } |
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inline static void detachInterrupt() { SPCR &= ~_BV(SPIE); } |
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#if defined(__arm__) && defined(CORE_TEENSY) |
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#if defined(__arm__) && defined(TEENSYDUINO) |
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inline void setMOSI(uint8_t pin) __attribute__((always_inline)) { SPCR.setMOSI(pin); } |
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inline void setMISO(uint8_t pin) __attribute__((always_inline)) { SPCR.setMISO(pin); } |
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inline void setSCK(uint8_t pin) __attribute__((always_inline)) { SPCR.setSCK(pin); } |