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if (buf) { |
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if (buf) { |
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_dmaTX->sourceBuffer((uint8_t*)write_data, count); |
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_dmaTX->sourceBuffer((uint8_t*)write_data, count); |
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_dmaTX->TCD->SLAST = 0; // Finish with it pointing to next location |
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_dmaTX->TCD->SLAST = 0; // Finish with it pointing to next location |
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if ((uint32_t)write_data >= 0x20200000u) arm_dcache_flush(write_data, count); |
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} else { |
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} else { |
|
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_dmaTX->source((uint8_t&)_transferWriteFill); // maybe have setable value |
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_dmaTX->source((uint8_t&)_transferWriteFill); // maybe have setable value |
|
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DMAChanneltransferCount(_dmaTX, count); |
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DMAChanneltransferCount(_dmaTX, count); |
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_dmaRX->TCD->ATTR_SRC = 0; //Make sure set for 8 bit mode... |
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_dmaRX->TCD->ATTR_SRC = 0; //Make sure set for 8 bit mode... |
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_dmaRX->destinationBuffer((uint8_t*)retbuf, count); |
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_dmaRX->destinationBuffer((uint8_t*)retbuf, count); |
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_dmaRX->TCD->DLASTSGA = 0; // At end point after our bufffer |
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_dmaRX->TCD->DLASTSGA = 0; // At end point after our bufffer |
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|
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if ((uint32_t)retbuf >= 0x20200000u) arm_dcache_delete(retbuf, count); |
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} else { |
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} else { |
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// Write only mode |
|
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// Write only mode |
|
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_dmaRX->TCD->ATTR_SRC = 0; //Make sure set for 8 bit mode... |
|
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_dmaRX->TCD->ATTR_SRC = 0; //Make sure set for 8 bit mode... |